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[JAEGER] Fix broken logic from my previous patch (c5754250e813). [Bug 585918] [r=me]
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@ -1191,9 +1191,16 @@ namespace JSC {
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ASSERT((op2 & ~0xfff) == 0);
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uint32_t imm8 = op2 & 0xff;
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uint32_t rot = 32 - ((op2 >> 7) & 0x1e);
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uint32_t rot = ((op2 >> 7) & 0x1e);
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return imm8 << (rot & 0x1f);
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// 'rot' is a right-rotate count.
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uint32_t imm = (imm8 >> rot);
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if (rot > 0) {
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imm |= (imm8 << (32-rot));
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}
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return imm;
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}
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// Format the operand 2 argument for debug spew. The operand can be
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@ -980,7 +980,7 @@ public:
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// integer, it saturates at INT_MAX or INT_MIN. Testing this is
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// probably quicker than testing FPSCR for exception.
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m_assembler.fmrs_r(dest, ARMRegisters::SD0);
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m_assembler.cmn_r(dest, ARMAssembler::getOp2(1));
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m_assembler.cmn_r(dest, ARMAssembler::getOp2(-0x7fffffff));
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m_assembler.cmp_r(dest, ARMAssembler::getOp2(0x80000000), ARMCondition(NonZero));
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return Jump(m_assembler.jmp(ARMCondition(Zero)));
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}
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