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Bug 1186122 - Part 2/2 - Remove BaselineStackReg from ARM64. r=efaust

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This commit is contained in:
Sean Stangl 2015-07-21 11:56:33 -07:00
parent b21caa0bef
commit 8ce18ee5d0
6 changed files with 15 additions and 11 deletions
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4
js/src/jit/BaselineCompiler.cpp
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@ -870,7 +870,7 @@ BaselineCompiler::emitProfilerEnterFrame()
// Starts off initially disabled.
Label noInstrument;
CodeOffsetLabel toggleOffset = masm.toggledJump(&noInstrument);
masm.profilerEnterFrame(BaselineStackReg, R0.scratchReg());
masm.profilerEnterFrame(masm.getStackPointer(), R0.scratchReg());
masm.bind(&noInstrument);
// Store the start offset in the appropriate location.
@ -3780,7 +3780,7 @@ BaselineCompiler::emit_JSOP_RESUME()
AbsoluteAddress addressOfEnabled(cx->runtime()->spsProfiler.addressOfEnabled());
masm.branch32(Assembler::Equal, addressOfEnabled, Imm32(0), &skip);
masm.loadPtr(AbsoluteAddress(cx->runtime()->addressOfProfilingActivation()), scratchReg);
masm.storePtr(BaselineStackReg,
masm.storePtr(masm.getStackPointer(),
Address(scratchReg, JitActivation::offsetOfLastProfilingFrame()));
masm.bind(&skip);
}

4
js/src/jit/BaselineFrameInfo.h
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@ -228,7 +228,7 @@ class FrameInfo
StackValue* popped = &stack[spIndex];
if (adjust == AdjustStack && popped->kind() == StackValue::Stack)
masm.addPtr(Imm32(sizeof(Value)), BaselineStackReg);
masm.addToStackPtr(Imm32(sizeof(Value)));
// Assert when anything uses this value.
popped->reset();
@ -241,7 +241,7 @@ class FrameInfo
pop(DontAdjustStack);
}
if (adjust == AdjustStack && poppedStack > 0)
masm.addPtr(Imm32(sizeof(Value) * poppedStack), BaselineStackReg);
masm.addToStackPtr(Imm32(sizeof(Value) * poppedStack));
}
inline void push(const Value& val) {
StackValue* sv = rawPush();

2
js/src/jit/BaselineIC.cpp
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@ -3956,7 +3956,7 @@ ICGetElemNativeCompiler::generateStubCode(MacroAssembler& masm)
masm.loadUnboxedProperty(BaseIndex(objReg, scratchReg, TimesOne), unboxedType_,
TypedOrValueRegister(R0));
if (popR1)
masm.addPtr(ImmWord(sizeof(size_t)), BaselineStackReg);
masm.addToStackPtr(ImmWord(sizeof(size_t)));
} else {
MOZ_ASSERT(acctype_ == ICGetElemNativeStub::NativeGetter ||
acctype_ == ICGetElemNativeStub::ScriptedGetter);

4
js/src/jit/MacroAssembler.cpp
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@ -1633,7 +1633,7 @@ MacroAssembler::generateBailoutTail(Register scratch, Register bailoutInfo)
{
// Prepare a register set for use in this case.
AllocatableGeneralRegisterSet regs(GeneralRegisterSet::All());
MOZ_ASSERT(!regs.has(BaselineStackReg));
MOZ_ASSERT(!regs.has(getStackPointer()));
regs.take(bailoutInfo);
// Reset SP to the point where clobbering starts.
@ -1654,7 +1654,7 @@ MacroAssembler::generateBailoutTail(Register scratch, Register bailoutInfo)
subPtr(Imm32(4), copyCur);
subFromStackPtr(Imm32(4));
load32(Address(copyCur, 0), temp);
store32(temp, Address(BaselineStackReg, 0));
store32(temp, Address(getStackPointer(), 0));
jump(&copyLoop);
bind(&endOfCopy);
}

7
js/src/jit/SharedIC.h
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@ -1012,15 +1012,20 @@ class ICStubCompiler
inline AllocatableGeneralRegisterSet availableGeneralRegs(size_t numInputs) const {
AllocatableGeneralRegisterSet regs(GeneralRegisterSet::All());
MOZ_ASSERT(!regs.has(BaselineStackReg));
#if defined(JS_CODEGEN_ARM)
MOZ_ASSERT(!regs.has(BaselineStackReg));
MOZ_ASSERT(!regs.has(ICTailCallReg));
regs.take(BaselineSecondScratchReg);
#elif defined(JS_CODEGEN_MIPS)
MOZ_ASSERT(!regs.has(BaselineStackReg));
MOZ_ASSERT(!regs.has(ICTailCallReg));
MOZ_ASSERT(!regs.has(BaselineSecondScratchReg));
#elif defined(JS_CODEGEN_ARM64)
MOZ_ASSERT(!regs.has(PseudoStackPointer));
MOZ_ASSERT(!regs.has(RealStackPointer));
MOZ_ASSERT(!regs.has(ICTailCallReg));
#else
MOZ_ASSERT(!regs.has(BaselineStackReg));
#endif
regs.take(BaselineFrameReg);
regs.take(ICStubReg);

5
js/src/jit/arm64/SharedICRegisters-arm64.h
View File

@ -16,9 +16,8 @@ namespace jit {
static constexpr Register BaselineFrameReg = r23;
static constexpr ARMRegister BaselineFrameReg64 = { BaselineFrameReg, 64 };
// The BaselineStackReg cannot be sp, because that register is treated
// as xzr/wzr during load/store operations.
static constexpr Register BaselineStackReg = PseudoStackPointer;
// BaselineStackReg is intentionally undefined on ARM64.
// Refer to the comment next to the definition of RealStackPointer.
// ValueOperands R0, R1, and R2.
// R0 == JSReturnReg, and R2 uses registers not preserved across calls.