Add detection for all levels of SSE support; fix x64 cpuid. b=601016, r=sstangl.

This commit is contained in:
Alex Miller 2010-09-30 21:45:22 -04:00
parent 00704fa52d
commit 82319558ba
2 changed files with 70 additions and 5 deletions

View File

@ -1078,12 +1078,17 @@ public:
m_assembler.movzbl_rr(dest, dest);
}
// As the SSE's were introduced in order, the presence of a later SSE implies
// the presence of an earlier SSE. For example, SSE4_2 support implies SSE2 support.
enum SSECheckState {
NotCheckedSSE = 0,
NoSSE = 1,
HasSSE2 = 2,
HasSSE4_1 = 3, // implies HasSSE2
HasSSE4_2 = 4 // implies HasSSE4_1
HasSSE = 2,
HasSSE2 = 3,
HasSSE3 = 4,
HasSSSE3 = 5,
HasSSE4_1 = 6,
HasSSE4_2 = 7
};
static SSECheckState getSSEState()
@ -1131,6 +1136,19 @@ private:
}
#endif
#elif WTF_COMPILER_GCC
#if WTF_CPU_X86_64
asm (
"movl $0x1, %%eax;"
"pushq %%rbx;"
"cpuid;"
"popq %%rbx;"
"movl %%ecx, %0;"
"movl %%edx, %1;"
: "=g" (flags_ecx), "=g" (flags_edx)
:
: "%eax", "%ecx", "%edx"
);
#else
asm (
"movl $0x1, %%eax;"
"pushl %%ebx;"
@ -1142,6 +1160,7 @@ private:
:
: "%eax", "%ecx", "%edx"
);
#endif
#elif WTF_COMPILER_SUNPRO
asm (
"movl $0x1, %eax;"
@ -1155,15 +1174,24 @@ private:
: "%eax", "%ecx", "%edx"
);
#endif
static const int SSEFeatureBit = 1 << 25;
static const int SSE2FeatureBit = 1 << 26;
static const int SSE3FeatureBit = 1 << 0;
static const int SSSE3FeatureBit = 1 << 9;
static const int SSE41FeatureBit = 1 << 19;
static const int SSE42FeatureBit = 1 << 20;
if (flags_ecx & SSE42FeatureBit)
s_sseCheckState = HasSSE4_2;
else if (flags_ecx & SSE41FeatureBit)
s_sseCheckState = HasSSE4_1;
else if (flags_ecx & SSSE3FeatureBit)
s_sseCheckState = HasSSSE3;
else if (flags_ecx & SSE3FeatureBit)
s_sseCheckState = HasSSE3;
else if (flags_edx & SSE2FeatureBit)
s_sseCheckState = HasSSE2;
else if (flags_edx & SSEFeatureBit)
s_sseCheckState = HasSSE;
else
s_sseCheckState = NoSSE;
}
@ -1171,7 +1199,12 @@ private:
#if WTF_CPU_X86
#if WTF_PLATFORM_MAC
// All X86 Macs are guaranteed to support at least SSE2,
// All X86 Macs are guaranteed to support at least SSE2
static bool isSSEPresent()
{
return true;
}
static bool isSSE2Present()
{
return true;
@ -1179,6 +1212,17 @@ private:
#else // PLATFORM(MAC)
static bool isSSEPresent()
{
if (s_sseCheckState == NotCheckedSSE) {
setSSECheckState();
}
// Only check once.
ASSERT(s_sseCheckState != NotCheckedSSE);
return s_sseCheckState >= HasSSE;
}
static bool isSSE2Present()
{
if (s_sseCheckState == NotCheckedSSE) {
@ -1202,6 +1246,27 @@ private:
}
#endif
static bool isSSE3Present()
{
if (s_sseCheckState == NotCheckedSSE) {
setSSECheckState();
}
// Only check once.
ASSERT(s_sseCheckState != NotCheckedSSE);
return s_sseCheckState >= HasSSE3;
}
static bool isSSSE3Present()
{
if (s_sseCheckState == NotCheckedSSE) {
setSSECheckState();
}
// Only check once.
ASSERT(s_sseCheckState != NotCheckedSSE);
return s_sseCheckState >= HasSSSE3;
}
static bool isSSE41Present()
{

View File

@ -2198,7 +2198,7 @@ JSContext::updateJITEnabled()
#endif
#ifdef JS_METHODJIT
methodJitEnabled = (options & JSOPTION_METHODJIT)
# ifdef JS_CPU_X86
# if defined JS_CPU_X86 || defined JS_CPU_X64
&& JSC::MacroAssemblerX86Common::getSSEState() >=
JSC::MacroAssemblerX86Common::HasSSE2
# endif