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[JAEGER] Merge from Tracemonkey.

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This commit is contained in:
David Mandelin 2010-08-16 14:20:34 -07:00
commit 7f4571bf6a
4 changed files with 22 additions and 9 deletions
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1
js/src/jscntxt.cpp
View File

@ -1132,6 +1132,7 @@ FreeContext(JSContext *cx)
cx->regExpStatics.clear();
VOUCH_DOES_NOT_REQUIRE_STACK();
JS_FinishArenaPool(&cx->tempPool);
JS_FinishArenaPool(&cx->regExpPool);
if (cx->lastMessage)
js_free(cx->lastMessage);

10
js/src/nanojit/NativeARM.cpp
View File

@ -2777,13 +2777,14 @@ Assembler::asm_cmov(LIns* ins)
Register rf = findRegFor(iffalse, allow & ~rmask(rr));
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
if (ins->isop(LIR_cmovd)) {
NIns* target = _nIns;
asm_nongp_copy(rr, rf);
asm_branch(false, condval, target);
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
if (rr != rt)
asm_nongp_copy(rr, rt);
freeResourcesOf(ins);
@ -2794,6 +2795,9 @@ Assembler::asm_cmov(LIns* ins)
return;
}
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
// WARNING: We cannot generate any code that affects the condition
// codes between the MRcc generation here and the asm_cmp() call
// below. See asm_cmp() for more details.

10
js/src/nanojit/NativeX64.cpp
View File

@ -1119,13 +1119,14 @@ namespace nanojit
Register rf = findRegFor(iffalse, allow & ~rmask(rr));
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
if (ins->isop(LIR_cmovd)) {
NIns* target = _nIns;
asm_nongp_copy(rr, rf);
asm_branch(false, cond, target);
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
if (rr != rt)
asm_nongp_copy(rr, rt);
freeResourcesOf(ins);
@ -1136,6 +1137,9 @@ namespace nanojit
return;
}
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
// WARNING: We cannot generate any code that affects the condition
// codes between the MRcc generation here and the asm_cmp() call
// below. See asm_cmp() for more details.

10
js/src/nanojit/Nativei386.cpp
View File

@ -2059,13 +2059,14 @@ namespace nanojit
Register rf = findRegFor(iffalse, allow & ~rmask(rr));
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
if (ins->isop(LIR_cmovd)) {
NIns* target = _nIns;
asm_nongp_copy(rr, rf);
asm_branch(false, condval, target);
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
if (rr != rt)
asm_nongp_copy(rr, rt);
freeResourcesOf(ins);
@ -2076,6 +2077,9 @@ namespace nanojit
return;
}
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
NanoAssert(ins->isop(LIR_cmovi));
// WARNING: We cannot generate any code that affects the condition