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Bug 969375 - MIPS port: Moved SecondScratchReg constant to Assembler-mips.h r=nbp
This commit is contained in:
Branislav Rankov
parent
976a7cf7e1
commit
6259b9e0f0
@ -55,6 +55,7 @@ static MOZ_CONSTEXPR_VAR Register fp = { Registers::fp };
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static MOZ_CONSTEXPR_VAR Register ra = { Registers::ra };
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static MOZ_CONSTEXPR_VAR Register ScratchRegister = at;
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static MOZ_CONSTEXPR_VAR Register SecondScratchReg = t8;
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// Use arg reg from EnterJIT function as OsrFrameReg.
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static MOZ_CONSTEXPR_VAR Register OsrFrameReg = a3;
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@ -212,18 +212,18 @@ void
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MacroAssemblerMIPS::inc64(AbsoluteAddress dest)
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{
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ma_li(ScratchRegister, Imm32((int32_t)dest.addr));
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as_lw(secondScratchReg_, ScratchRegister, 0);
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as_lw(SecondScratchReg, ScratchRegister, 0);
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as_addiu(secondScratchReg_, secondScratchReg_, 1);
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as_sw(secondScratchReg_, ScratchRegister, 0);
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as_addiu(SecondScratchReg, SecondScratchReg, 1);
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as_sw(SecondScratchReg, ScratchRegister, 0);
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as_sltiu(secondScratchReg_, secondScratchReg_, 1);
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as_sltiu(SecondScratchReg, SecondScratchReg, 1);
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as_lw(ScratchRegister, ScratchRegister, 4);
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as_addu(secondScratchReg_, ScratchRegister, secondScratchReg_);
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as_addu(SecondScratchReg, ScratchRegister, SecondScratchReg);
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ma_li(ScratchRegister, Imm32((int32_t)dest.addr));
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as_sw(secondScratchReg_, ScratchRegister, 4);
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as_sw(SecondScratchReg, ScratchRegister, 4);
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}
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void
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@ -476,17 +476,17 @@ void
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MacroAssemblerMIPS::ma_addTestOverflow(Register rd, Register rs, Register rt, Label *overflow)
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{
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Label goodAddition;
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as_addu(secondScratchReg_, rs, rt);
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as_addu(SecondScratchReg, rs, rt);
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as_xor(ScratchRegister, rs, rt); // If different sign, no overflow
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ma_b(ScratchRegister, Imm32(0), &goodAddition, Assembler::LessThan, ShortJump);
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// If different sign, then overflow
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as_xor(ScratchRegister, rs, secondScratchReg_);
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as_xor(ScratchRegister, rs, SecondScratchReg);
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ma_b(ScratchRegister, Imm32(0), overflow, Assembler::LessThan);
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bind(&goodAddition);
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ma_move(rd, secondScratchReg_);
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ma_move(rd, SecondScratchReg);
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}
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void
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@ -496,18 +496,18 @@ MacroAssemblerMIPS::ma_addTestOverflow(Register rd, Register rs, Imm32 imm, Labe
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// Check for unsigned range because of as_xori
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if (Imm16::isInSignedRange(imm.value) && Imm16::isInUnsignedRange(imm.value)) {
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Label goodAddition;
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as_addiu(secondScratchReg_, rs, imm.value);
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as_addiu(SecondScratchReg, rs, imm.value);
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// If different sign, no overflow
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as_xori(ScratchRegister, rs, imm.value);
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ma_b(ScratchRegister, Imm32(0), &goodAddition, Assembler::LessThan, ShortJump);
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// If different sign, then overflow
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as_xor(ScratchRegister, rs, secondScratchReg_);
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as_xor(ScratchRegister, rs, SecondScratchReg);
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ma_b(ScratchRegister, Imm32(0), overflow, Assembler::LessThan);
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bind(&goodAddition);
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ma_move(rd, secondScratchReg_);
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ma_move(rd, SecondScratchReg);
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} else {
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ma_li(ScratchRegister, imm);
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ma_addTestOverflow(rd, rs, ScratchRegister, overflow);
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@ -544,17 +544,17 @@ MacroAssemblerMIPS::ma_subTestOverflow(Register rd, Register rs, Register rt, La
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Label goodSubtraction;
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// Use second scratch. The instructions generated by ma_b don't use the
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// second scratch register.
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ma_subu(secondScratchReg_, rs, rt);
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ma_subu(SecondScratchReg, rs, rt);
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as_xor(ScratchRegister, rs, rt); // If same sign, no overflow
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ma_b(ScratchRegister, Imm32(0), &goodSubtraction, Assembler::GreaterThanOrEqual, ShortJump);
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// If different sign, then overflow
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as_xor(ScratchRegister, rs, secondScratchReg_);
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as_xor(ScratchRegister, rs, SecondScratchReg);
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ma_b(ScratchRegister, Imm32(0), overflow, Assembler::LessThan);
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bind(&goodSubtraction);
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ma_move(rd, secondScratchReg_);
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ma_move(rd, SecondScratchReg);
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}
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void
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@ -581,8 +581,8 @@ MacroAssemblerMIPS::ma_mul_branch_overflow(Register rd, Register rs, Register rt
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as_mult(rs, rt);
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as_mflo(rd);
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as_sra(ScratchRegister, rd, 31);
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as_mfhi(secondScratchReg_);
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ma_b(ScratchRegister, secondScratchReg_, overflow, Assembler::NotEqual);
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as_mfhi(SecondScratchReg);
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ma_b(ScratchRegister, SecondScratchReg, overflow, Assembler::NotEqual);
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}
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void
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@ -653,16 +653,16 @@ MacroAssemblerMIPS::ma_mod_mask(Register src, Register dest, Register hold, int3
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bind(&head);
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// Extract the bottom bits into lr.
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ma_and(secondScratchReg_, ScratchRegister, Imm32(mask));
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ma_and(SecondScratchReg, ScratchRegister, Imm32(mask));
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// Add those bits to the accumulator.
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as_addu(dest, dest, secondScratchReg_);
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as_addu(dest, dest, SecondScratchReg);
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// Do a trial subtraction, this is the same operation as cmp, but we
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// store the dest
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ma_subu(secondScratchReg_, dest, Imm32(mask));
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ma_subu(SecondScratchReg, dest, Imm32(mask));
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// If (sum - C) > 0, store sum - C back into sum, thus performing a
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// modulus.
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ma_b(secondScratchReg_, secondScratchReg_, &sumSigned, Signed, ShortJump);
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ma_move(dest, secondScratchReg_);
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ma_b(SecondScratchReg, SecondScratchReg, &sumSigned, Signed, ShortJump);
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ma_move(dest, SecondScratchReg);
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bind(&sumSigned);
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// Get rid of the bits that we extracted before.
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as_srl(ScratchRegister, ScratchRegister, shift);
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@ -728,8 +728,8 @@ void
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MacroAssemblerMIPS::ma_load(const Register &dest, const BaseIndex &src,
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LoadStoreSize size, LoadStoreExtension extension)
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{
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computeScaledAddress(src, secondScratchReg_);
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ma_load(dest, Address(secondScratchReg_, src.offset), size, extension);
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computeScaledAddress(src, SecondScratchReg);
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ma_load(dest, Address(SecondScratchReg, src.offset), size, extension);
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}
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void
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@ -768,24 +768,24 @@ void
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MacroAssemblerMIPS::ma_store(const Register &data, const BaseIndex &dest,
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LoadStoreSize size, LoadStoreExtension extension)
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{
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computeScaledAddress(dest, secondScratchReg_);
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ma_store(data, Address(secondScratchReg_, dest.offset), size, extension);
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computeScaledAddress(dest, SecondScratchReg);
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ma_store(data, Address(SecondScratchReg, dest.offset), size, extension);
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}
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void
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MacroAssemblerMIPS::ma_store(const Imm32 &imm, const BaseIndex &dest,
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LoadStoreSize size, LoadStoreExtension extension)
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{
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// Make sure that secondScratchReg_ contains absolute address so that
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// Make sure that SecondScratchReg contains absolute address so that
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// offset is 0.
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computeEffectiveAddress(dest, secondScratchReg_);
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computeEffectiveAddress(dest, SecondScratchReg);
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// Scrach register is free now, use it for loading imm value
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ma_li(ScratchRegister, imm);
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// with offset=0 ScratchRegister will not be used in ma_store()
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// so we can use it as a parameter here
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ma_store(ScratchRegister, Address(secondScratchReg_, 0), size, extension);
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ma_store(ScratchRegister, Address(SecondScratchReg, 0), size, extension);
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}
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void
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@ -822,11 +822,11 @@ MacroAssemblerMIPS::ma_sw(Imm32 imm, Address address)
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if (Imm16::isInSignedRange(address.offset)) {
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as_sw(ScratchRegister, address.base, Imm16(address.offset).encode());
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} else {
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MOZ_ASSERT(address.base != secondScratchReg_);
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MOZ_ASSERT(address.base != SecondScratchReg);
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ma_li(secondScratchReg_, Imm32(address.offset));
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as_addu(secondScratchReg_, address.base, secondScratchReg_);
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as_sw(ScratchRegister, secondScratchReg_, 0);
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ma_li(SecondScratchReg, Imm32(address.offset));
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as_addu(SecondScratchReg, address.base, SecondScratchReg);
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as_sw(ScratchRegister, SecondScratchReg, 0);
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}
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}
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@ -905,8 +905,8 @@ MacroAssemblerMIPS::ma_b(Register lhs, Address addr, Label *label, Condition c,
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void
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MacroAssemblerMIPS::ma_b(Address addr, Imm32 imm, Label *label, Condition c, JumpKind jumpKind)
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{
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ma_lw(secondScratchReg_, addr);
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ma_b(secondScratchReg_, imm, label, c, jumpKind);
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ma_lw(SecondScratchReg, addr);
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ma_b(SecondScratchReg, imm, label, c, jumpKind);
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}
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void
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@ -1395,8 +1395,8 @@ MacroAssemblerMIPS::ma_sd(FloatRegister ft, Address address)
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void
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MacroAssemblerMIPS::ma_sd(FloatRegister ft, BaseIndex address)
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{
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computeScaledAddress(address, secondScratchReg_);
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ma_sd(ft, Address(secondScratchReg_, address.offset));
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computeScaledAddress(address, SecondScratchReg);
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ma_sd(ft, Address(SecondScratchReg, address.offset));
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}
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void
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@ -1414,8 +1414,8 @@ MacroAssemblerMIPS::ma_ss(FloatRegister ft, Address address)
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void
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MacroAssemblerMIPS::ma_ss(FloatRegister ft, BaseIndex address)
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{
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computeScaledAddress(address, secondScratchReg_);
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ma_ss(ft, Address(secondScratchReg_, address.offset));
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computeScaledAddress(address, SecondScratchReg);
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ma_ss(ft, Address(SecondScratchReg, address.offset));
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}
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void
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@ -1555,9 +1555,9 @@ void
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MacroAssemblerMIPSCompat::add32(Imm32 imm, const Address &dest)
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{
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load32(dest, secondScratchReg_);
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ma_addu(secondScratchReg_, imm);
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store32(secondScratchReg_, dest);
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load32(dest, SecondScratchReg);
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ma_addu(SecondScratchReg, imm);
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store32(SecondScratchReg, dest);
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}
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void
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@ -1601,17 +1601,17 @@ MacroAssemblerMIPSCompat::and32(Imm32 imm, Register dest)
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void
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MacroAssemblerMIPSCompat::and32(Imm32 imm, const Address &dest)
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{
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load32(dest, secondScratchReg_);
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ma_and(secondScratchReg_, imm);
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store32(secondScratchReg_, dest);
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load32(dest, SecondScratchReg);
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ma_and(SecondScratchReg, imm);
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store32(SecondScratchReg, dest);
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}
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void
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MacroAssemblerMIPSCompat::or32(Imm32 imm, const Address &dest)
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{
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load32(dest, secondScratchReg_);
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ma_or(secondScratchReg_, imm);
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store32(secondScratchReg_, dest);
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load32(dest, SecondScratchReg);
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ma_or(SecondScratchReg, imm);
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store32(SecondScratchReg, dest);
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}
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void
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@ -1802,8 +1802,8 @@ MacroAssemblerMIPSCompat::loadDouble(const Address &address, const FloatRegister
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void
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MacroAssemblerMIPSCompat::loadDouble(const BaseIndex &src, const FloatRegister &dest)
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{
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computeScaledAddress(src, secondScratchReg_);
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ma_ld(dest, Address(secondScratchReg_, src.offset));
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computeScaledAddress(src, SecondScratchReg);
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ma_ld(dest, Address(SecondScratchReg, src.offset));
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}
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void
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@ -1829,15 +1829,15 @@ MacroAssemblerMIPSCompat::loadFloat32(const Address &address, const FloatRegiste
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void
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MacroAssemblerMIPSCompat::loadFloat32(const BaseIndex &src, const FloatRegister &dest)
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{
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computeScaledAddress(src, secondScratchReg_);
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ma_ls(dest, Address(secondScratchReg_, src.offset));
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computeScaledAddress(src, SecondScratchReg);
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ma_ls(dest, Address(SecondScratchReg, src.offset));
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}
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void
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MacroAssemblerMIPSCompat::store8(const Imm32 &imm, const Address &address)
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{
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ma_li(secondScratchReg_, imm);
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ma_store(secondScratchReg_, address, SizeByte);
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ma_li(SecondScratchReg, imm);
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ma_store(SecondScratchReg, address, SizeByte);
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}
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void
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@ -1861,8 +1861,8 @@ MacroAssemblerMIPSCompat::store8(const Register &src, const BaseIndex &dest)
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void
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MacroAssemblerMIPSCompat::store16(const Imm32 &imm, const Address &address)
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{
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ma_li(secondScratchReg_, imm);
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ma_store(secondScratchReg_, address, SizeHalfWord);
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ma_li(SecondScratchReg, imm);
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ma_store(SecondScratchReg, address, SizeHalfWord);
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}
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void
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@ -1998,16 +1998,16 @@ void
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MacroAssemblerMIPSCompat::branchTestGCThing(Condition cond, const Address &address, Label *label)
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{
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MOZ_ASSERT(cond == Equal || cond == NotEqual);
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extractTag(address, secondScratchReg_);
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ma_b(secondScratchReg_, ImmTag(JSVAL_LOWER_INCL_TAG_OF_GCTHING_SET), label,
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extractTag(address, SecondScratchReg);
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ma_b(SecondScratchReg, ImmTag(JSVAL_LOWER_INCL_TAG_OF_GCTHING_SET), label,
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(cond == Equal) ? AboveOrEqual : Below);
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}
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void
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MacroAssemblerMIPSCompat::branchTestGCThing(Condition cond, const BaseIndex &src, Label *label)
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{
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MOZ_ASSERT(cond == Equal || cond == NotEqual);
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extractTag(src, secondScratchReg_);
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ma_b(secondScratchReg_, ImmTag(JSVAL_LOWER_INCL_TAG_OF_GCTHING_SET), label,
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extractTag(src, SecondScratchReg);
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ma_b(SecondScratchReg, ImmTag(JSVAL_LOWER_INCL_TAG_OF_GCTHING_SET), label,
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(cond == Equal) ? AboveOrEqual : Below);
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}
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@ -2043,16 +2043,16 @@ void
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MacroAssemblerMIPSCompat::branchTestInt32(Condition cond, const Address &address, Label *label)
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{
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MOZ_ASSERT(cond == Equal || cond == NotEqual);
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extractTag(address, secondScratchReg_);
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ma_b(secondScratchReg_, ImmTag(JSVAL_TAG_INT32), label, cond);
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extractTag(address, SecondScratchReg);
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ma_b(SecondScratchReg, ImmTag(JSVAL_TAG_INT32), label, cond);
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}
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void
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MacroAssemblerMIPSCompat::branchTestInt32(Condition cond, const BaseIndex &src, Label *label)
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{
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MOZ_ASSERT(cond == Equal || cond == NotEqual);
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extractTag(src, secondScratchReg_);
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ma_b(secondScratchReg_, ImmTag(JSVAL_TAG_INT32), label, cond);
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extractTag(src, SecondScratchReg);
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ma_b(SecondScratchReg, ImmTag(JSVAL_TAG_INT32), label, cond);
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}
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void
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@ -2074,8 +2074,8 @@ void
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MacroAssemblerMIPSCompat::branchTestBoolean(Condition cond, const BaseIndex &src, Label *label)
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{
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MOZ_ASSERT(cond == Equal || cond == NotEqual);
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extractTag(src, secondScratchReg_);
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ma_b(secondScratchReg_, ImmType(JSVAL_TYPE_BOOLEAN), label, cond);
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extractTag(src, SecondScratchReg);
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ma_b(SecondScratchReg, ImmType(JSVAL_TYPE_BOOLEAN), label, cond);
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}
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void
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@ -2098,8 +2098,8 @@ void
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MacroAssemblerMIPSCompat::branchTestDouble(Condition cond, const Address &address, Label *label)
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{
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MOZ_ASSERT(cond == Equal || cond == NotEqual);
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extractTag(address, secondScratchReg_);
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ma_b(secondScratchReg_, ImmTag(JSVAL_TAG_CLEAR), label, cond);
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extractTag(address, SecondScratchReg);
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ma_b(SecondScratchReg, ImmTag(JSVAL_TAG_CLEAR), label, cond);
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}
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void
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@ -2107,8 +2107,8 @@ MacroAssemblerMIPSCompat::branchTestDouble(Condition cond, const BaseIndex &src,
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{
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MOZ_ASSERT(cond == Equal || cond == NotEqual);
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Condition actual = (cond == Equal) ? Below : AboveOrEqual;
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extractTag(src, secondScratchReg_);
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ma_b(secondScratchReg_, ImmTag(JSVAL_TAG_CLEAR), label, actual);
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extractTag(src, SecondScratchReg);
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ma_b(SecondScratchReg, ImmTag(JSVAL_TAG_CLEAR), label, actual);
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}
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void
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@ -2129,8 +2129,8 @@ void
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MacroAssemblerMIPSCompat::branchTestNull(Condition cond, const BaseIndex &src, Label *label)
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{
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MOZ_ASSERT(cond == Equal || cond == NotEqual);
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extractTag(src, secondScratchReg_);
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ma_b(secondScratchReg_, ImmTag(JSVAL_TAG_NULL), label, cond);
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extractTag(src, SecondScratchReg);
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ma_b(SecondScratchReg, ImmTag(JSVAL_TAG_NULL), label, cond);
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}
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@ -2151,8 +2151,8 @@ void
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MacroAssemblerMIPSCompat::branchTestObject(Condition cond, const BaseIndex &src, Label *label)
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{
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MOZ_ASSERT(cond == Equal || cond == NotEqual);
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extractTag(src, secondScratchReg_);
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ma_b(secondScratchReg_, ImmTag(JSVAL_TAG_OBJECT), label, cond);
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extractTag(src, SecondScratchReg);
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ma_b(SecondScratchReg, ImmTag(JSVAL_TAG_OBJECT), label, cond);
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}
|
||||
|
||||
|
||||
@ -2173,8 +2173,8 @@ void
|
||||
MacroAssemblerMIPSCompat::branchTestString(Condition cond, const BaseIndex &src, Label *label)
|
||||
{
|
||||
MOZ_ASSERT(cond == Equal || cond == NotEqual);
|
||||
extractTag(src, secondScratchReg_);
|
||||
ma_b(secondScratchReg_, ImmTag(JSVAL_TAG_STRING), label, cond);
|
||||
extractTag(src, SecondScratchReg);
|
||||
ma_b(SecondScratchReg, ImmTag(JSVAL_TAG_STRING), label, cond);
|
||||
}
|
||||
|
||||
void
|
||||
@ -2196,16 +2196,16 @@ void
|
||||
MacroAssemblerMIPSCompat::branchTestUndefined(Condition cond, const BaseIndex &src, Label *label)
|
||||
{
|
||||
MOZ_ASSERT(cond == Equal || cond == NotEqual);
|
||||
extractTag(src, secondScratchReg_);
|
||||
ma_b(secondScratchReg_, ImmTag(JSVAL_TAG_UNDEFINED), label, cond);
|
||||
extractTag(src, SecondScratchReg);
|
||||
ma_b(SecondScratchReg, ImmTag(JSVAL_TAG_UNDEFINED), label, cond);
|
||||
}
|
||||
|
||||
void
|
||||
MacroAssemblerMIPSCompat::branchTestUndefined(Condition cond, const Address &address, Label *label)
|
||||
{
|
||||
MOZ_ASSERT(cond == Equal || cond == NotEqual);
|
||||
extractTag(address, secondScratchReg_);
|
||||
ma_b(secondScratchReg_, ImmTag(JSVAL_TAG_UNDEFINED), label, cond);
|
||||
extractTag(address, SecondScratchReg);
|
||||
ma_b(SecondScratchReg, ImmTag(JSVAL_TAG_UNDEFINED), label, cond);
|
||||
}
|
||||
|
||||
|
||||
@ -2240,16 +2240,16 @@ void
|
||||
MacroAssemblerMIPSCompat::branchTestMagic(Condition cond, const Address &address, Label *label)
|
||||
{
|
||||
MOZ_ASSERT(cond == Equal || cond == NotEqual);
|
||||
extractTag(address, secondScratchReg_);
|
||||
ma_b(secondScratchReg_, ImmTag(JSVAL_TAG_MAGIC), label, cond);
|
||||
extractTag(address, SecondScratchReg);
|
||||
ma_b(SecondScratchReg, ImmTag(JSVAL_TAG_MAGIC), label, cond);
|
||||
}
|
||||
|
||||
void
|
||||
MacroAssemblerMIPSCompat::branchTestMagic(Condition cond, const BaseIndex &src, Label *label)
|
||||
{
|
||||
MOZ_ASSERT(cond == Equal || cond == NotEqual);
|
||||
extractTag(src, secondScratchReg_);
|
||||
ma_b(secondScratchReg_, ImmTag(JSVAL_TAG_MAGIC), label, cond);
|
||||
extractTag(src, SecondScratchReg);
|
||||
ma_b(SecondScratchReg, ImmTag(JSVAL_TAG_MAGIC), label, cond);
|
||||
}
|
||||
|
||||
void
|
||||
@ -2427,10 +2427,10 @@ MacroAssemblerMIPSCompat::loadInt32OrDouble(const Address &src, const FloatRegis
|
||||
{
|
||||
Label notInt32, end;
|
||||
// If it's an int, convert it to double.
|
||||
ma_lw(secondScratchReg_, Address(src.base, src.offset + TAG_OFFSET));
|
||||
branchTestInt32(Assembler::NotEqual, secondScratchReg_, ¬Int32);
|
||||
ma_lw(secondScratchReg_, Address(src.base, src.offset + PAYLOAD_OFFSET));
|
||||
convertInt32ToDouble(secondScratchReg_, dest);
|
||||
ma_lw(SecondScratchReg, Address(src.base, src.offset + TAG_OFFSET));
|
||||
branchTestInt32(Assembler::NotEqual, SecondScratchReg, ¬Int32);
|
||||
ma_lw(SecondScratchReg, Address(src.base, src.offset + PAYLOAD_OFFSET));
|
||||
convertInt32ToDouble(SecondScratchReg, dest);
|
||||
ma_b(&end, ShortJump);
|
||||
|
||||
// Not an int, just load as double.
|
||||
@ -2447,22 +2447,22 @@ MacroAssemblerMIPSCompat::loadInt32OrDouble(Register base, Register index,
|
||||
|
||||
// If it's an int, convert it to double.
|
||||
|
||||
computeScaledAddress(BaseIndex(base, index, ShiftToScale(shift)), secondScratchReg_);
|
||||
computeScaledAddress(BaseIndex(base, index, ShiftToScale(shift)), SecondScratchReg);
|
||||
// Since we only have one scratch, we need to stomp over it with the tag.
|
||||
load32(Address(secondScratchReg_, TAG_OFFSET), secondScratchReg_);
|
||||
branchTestInt32(Assembler::NotEqual, secondScratchReg_, ¬Int32);
|
||||
load32(Address(SecondScratchReg, TAG_OFFSET), SecondScratchReg);
|
||||
branchTestInt32(Assembler::NotEqual, SecondScratchReg, ¬Int32);
|
||||
|
||||
computeScaledAddress(BaseIndex(base, index, ShiftToScale(shift)), secondScratchReg_);
|
||||
load32(Address(secondScratchReg_, PAYLOAD_OFFSET), secondScratchReg_);
|
||||
convertInt32ToDouble(secondScratchReg_, dest);
|
||||
computeScaledAddress(BaseIndex(base, index, ShiftToScale(shift)), SecondScratchReg);
|
||||
load32(Address(SecondScratchReg, PAYLOAD_OFFSET), SecondScratchReg);
|
||||
convertInt32ToDouble(SecondScratchReg, dest);
|
||||
ma_b(&end, ShortJump);
|
||||
|
||||
// Not an int, just load as double.
|
||||
bind(¬Int32);
|
||||
// First, recompute the offset that had been stored in the scratch register
|
||||
// since the scratch register was overwritten loading in the type.
|
||||
computeScaledAddress(BaseIndex(base, index, ShiftToScale(shift)), secondScratchReg_);
|
||||
loadDouble(Address(secondScratchReg_, 0), dest);
|
||||
computeScaledAddress(BaseIndex(base, index, ShiftToScale(shift)), SecondScratchReg);
|
||||
loadDouble(Address(SecondScratchReg, 0), dest);
|
||||
bind(&end);
|
||||
}
|
||||
|
||||
@ -2484,10 +2484,10 @@ MacroAssemblerMIPSCompat::branchTestStringTruthy(bool b, const ValueOperand &val
|
||||
{
|
||||
Register string = value.payloadReg();
|
||||
size_t mask = (0xFFFFFFFF << JSString::LENGTH_SHIFT);
|
||||
ma_lw(secondScratchReg_, Address(string, JSString::offsetOfLengthAndFlags()));
|
||||
ma_lw(SecondScratchReg, Address(string, JSString::offsetOfLengthAndFlags()));
|
||||
|
||||
// Use secondScratchReg_ because ma_and will clobber ScratchRegister
|
||||
ma_and(ScratchRegister, secondScratchReg_, Imm32(mask));
|
||||
// Use SecondScratchReg because ma_and will clobber ScratchRegister
|
||||
ma_and(ScratchRegister, SecondScratchReg, Imm32(mask));
|
||||
ma_b(ScratchRegister, ScratchRegister, label, b ? NonZero : Zero);
|
||||
}
|
||||
|
||||
@ -2587,8 +2587,8 @@ MacroAssemblerMIPSCompat::storeValue(ValueOperand val, Operand dst)
|
||||
void
|
||||
MacroAssemblerMIPSCompat::storeValue(ValueOperand val, const BaseIndex &dest)
|
||||
{
|
||||
computeScaledAddress(dest, secondScratchReg_);
|
||||
storeValue(val, Address(secondScratchReg_, dest.offset));
|
||||
computeScaledAddress(dest, SecondScratchReg);
|
||||
storeValue(val, Address(SecondScratchReg, dest.offset));
|
||||
}
|
||||
|
||||
void
|
||||
@ -2599,8 +2599,8 @@ MacroAssemblerMIPSCompat::storeValue(JSValueType type, Register reg, BaseIndex d
|
||||
// Make sure that ma_sw doesn't clobber ScratchRegister
|
||||
int32_t offset = dest.offset;
|
||||
if (!Imm16::isInSignedRange(offset)) {
|
||||
ma_li(secondScratchReg_, Imm32(offset));
|
||||
as_addu(ScratchRegister, ScratchRegister, secondScratchReg_);
|
||||
ma_li(SecondScratchReg, Imm32(offset));
|
||||
as_addu(ScratchRegister, ScratchRegister, SecondScratchReg);
|
||||
offset = 0;
|
||||
}
|
||||
|
||||
@ -2617,22 +2617,22 @@ MacroAssemblerMIPSCompat::storeValue(ValueOperand val, const Address &dest)
|
||||
void
|
||||
MacroAssemblerMIPSCompat::storeValue(JSValueType type, Register reg, Address dest)
|
||||
{
|
||||
MOZ_ASSERT(dest.base != secondScratchReg_);
|
||||
MOZ_ASSERT(dest.base != SecondScratchReg);
|
||||
|
||||
ma_sw(reg, Address(dest.base, dest.offset + PAYLOAD_OFFSET));
|
||||
ma_li(secondScratchReg_, ImmTag(JSVAL_TYPE_TO_TAG(type)));
|
||||
ma_sw(secondScratchReg_, Address(dest.base, dest.offset + TAG_OFFSET));
|
||||
ma_li(SecondScratchReg, ImmTag(JSVAL_TYPE_TO_TAG(type)));
|
||||
ma_sw(SecondScratchReg, Address(dest.base, dest.offset + TAG_OFFSET));
|
||||
}
|
||||
|
||||
void
|
||||
MacroAssemblerMIPSCompat::storeValue(const Value &val, Address dest)
|
||||
{
|
||||
MOZ_ASSERT(dest.base != secondScratchReg_);
|
||||
MOZ_ASSERT(dest.base != SecondScratchReg);
|
||||
|
||||
ma_li(secondScratchReg_, Imm32(getType(val)));
|
||||
ma_sw(secondScratchReg_, Address(dest.base, dest.offset + TAG_OFFSET));
|
||||
moveData(val, secondScratchReg_);
|
||||
ma_sw(secondScratchReg_, Address(dest.base, dest.offset + PAYLOAD_OFFSET));
|
||||
ma_li(SecondScratchReg, Imm32(getType(val)));
|
||||
ma_sw(SecondScratchReg, Address(dest.base, dest.offset + TAG_OFFSET));
|
||||
moveData(val, SecondScratchReg);
|
||||
ma_sw(SecondScratchReg, Address(dest.base, dest.offset + PAYLOAD_OFFSET));
|
||||
}
|
||||
|
||||
void
|
||||
@ -2643,8 +2643,8 @@ MacroAssemblerMIPSCompat::storeValue(const Value &val, BaseIndex dest)
|
||||
// Make sure that ma_sw doesn't clobber ScratchRegister
|
||||
int32_t offset = dest.offset;
|
||||
if (!Imm16::isInSignedRange(offset)) {
|
||||
ma_li(secondScratchReg_, Imm32(offset));
|
||||
as_addu(ScratchRegister, ScratchRegister, secondScratchReg_);
|
||||
ma_li(SecondScratchReg, Imm32(offset));
|
||||
as_addu(ScratchRegister, ScratchRegister, SecondScratchReg);
|
||||
offset = 0;
|
||||
}
|
||||
storeValue(val, Address(ScratchRegister, offset));
|
||||
@ -2653,8 +2653,8 @@ MacroAssemblerMIPSCompat::storeValue(const Value &val, BaseIndex dest)
|
||||
void
|
||||
MacroAssemblerMIPSCompat::loadValue(const BaseIndex &addr, ValueOperand val)
|
||||
{
|
||||
computeScaledAddress(addr, secondScratchReg_);
|
||||
loadValue(Address(secondScratchReg_, addr.offset), val);
|
||||
computeScaledAddress(addr, SecondScratchReg);
|
||||
loadValue(Address(SecondScratchReg, addr.offset), val);
|
||||
}
|
||||
|
||||
void
|
||||
@ -2714,8 +2714,8 @@ MacroAssemblerMIPSCompat::popValue(ValueOperand val)
|
||||
void
|
||||
MacroAssemblerMIPSCompat::storePayload(const Value &val, Address dest)
|
||||
{
|
||||
moveData(val, secondScratchReg_);
|
||||
ma_sw(secondScratchReg_, Address(dest.base, dest.offset + PAYLOAD_OFFSET));
|
||||
moveData(val, SecondScratchReg);
|
||||
ma_sw(SecondScratchReg, Address(dest.base, dest.offset + PAYLOAD_OFFSET));
|
||||
}
|
||||
|
||||
void
|
||||
@ -2729,33 +2729,33 @@ void
|
||||
MacroAssemblerMIPSCompat::storePayload(const Value &val, Register base, Register index,
|
||||
int32_t shift)
|
||||
{
|
||||
computeScaledAddress(BaseIndex(base, index, ShiftToScale(shift)), secondScratchReg_);
|
||||
computeScaledAddress(BaseIndex(base, index, ShiftToScale(shift)), SecondScratchReg);
|
||||
|
||||
moveData(val, ScratchRegister);
|
||||
|
||||
as_sw(ScratchRegister, secondScratchReg_, NUNBOX32_PAYLOAD_OFFSET);
|
||||
as_sw(ScratchRegister, SecondScratchReg, NUNBOX32_PAYLOAD_OFFSET);
|
||||
}
|
||||
|
||||
void
|
||||
MacroAssemblerMIPSCompat::storePayload(Register src, Register base, Register index, int32_t shift)
|
||||
{
|
||||
computeScaledAddress(BaseIndex(base, index, ShiftToScale(shift)), secondScratchReg_);
|
||||
as_sw(src, secondScratchReg_, NUNBOX32_PAYLOAD_OFFSET);
|
||||
computeScaledAddress(BaseIndex(base, index, ShiftToScale(shift)), SecondScratchReg);
|
||||
as_sw(src, SecondScratchReg, NUNBOX32_PAYLOAD_OFFSET);
|
||||
}
|
||||
|
||||
void
|
||||
MacroAssemblerMIPSCompat::storeTypeTag(ImmTag tag, Address dest)
|
||||
{
|
||||
ma_li(secondScratchReg_, tag);
|
||||
ma_sw(secondScratchReg_, Address(dest.base, dest.offset + TAG_OFFSET));
|
||||
ma_li(SecondScratchReg, tag);
|
||||
ma_sw(SecondScratchReg, Address(dest.base, dest.offset + TAG_OFFSET));
|
||||
}
|
||||
|
||||
void
|
||||
MacroAssemblerMIPSCompat::storeTypeTag(ImmTag tag, Register base, Register index, int32_t shift)
|
||||
{
|
||||
computeScaledAddress(BaseIndex(base, index, ShiftToScale(shift)), secondScratchReg_);
|
||||
computeScaledAddress(BaseIndex(base, index, ShiftToScale(shift)), SecondScratchReg);
|
||||
ma_li(ScratchRegister, tag);
|
||||
as_sw(ScratchRegister, secondScratchReg_, TAG_OFFSET);
|
||||
as_sw(ScratchRegister, SecondScratchReg, TAG_OFFSET);
|
||||
}
|
||||
|
||||
void
|
||||
|
||||
@ -65,16 +65,7 @@ static_assert(1 << defaultShift == sizeof(jsval), "The defaultShift is wrong");
|
||||
|
||||
class MacroAssemblerMIPS : public Assembler
|
||||
{
|
||||
protected:
|
||||
Register secondScratchReg_;
|
||||
|
||||
public:
|
||||
MacroAssemblerMIPS() : secondScratchReg_(t8)
|
||||
{ }
|
||||
|
||||
Register secondScratch() {
|
||||
return secondScratchReg_;
|
||||
}
|
||||
|
||||
void convertBoolToInt32(Register source, Register dest);
|
||||
void convertInt32ToDouble(const Register &src, const FloatRegister &dest);
|
||||
@ -576,8 +567,8 @@ class MacroAssemblerMIPSCompat : public MacroAssemblerMIPS
|
||||
ma_b(ScratchRegister, rhs, label, cond);
|
||||
}
|
||||
void branch32(Condition cond, const Address &lhs, Imm32 rhs, Label *label) {
|
||||
ma_lw(secondScratchReg_, lhs);
|
||||
ma_b(secondScratchReg_, rhs, label, cond);
|
||||
ma_lw(SecondScratchReg, lhs);
|
||||
ma_b(SecondScratchReg, rhs, label, cond);
|
||||
}
|
||||
void branchPtr(Condition cond, const Address &lhs, Register rhs, Label *label) {
|
||||
branch32(cond, lhs, rhs, label);
|
||||
@ -658,8 +649,8 @@ class MacroAssemblerMIPSCompat : public MacroAssemblerMIPS
|
||||
branchTest32(cond, lhs, ScratchRegister, label);
|
||||
}
|
||||
void branchTest32(Condition cond, const Address &address, Imm32 imm, Label *label) {
|
||||
ma_lw(secondScratchReg_, address);
|
||||
branchTest32(cond, secondScratchReg_, imm, label);
|
||||
ma_lw(SecondScratchReg, address);
|
||||
branchTest32(cond, SecondScratchReg, imm, label);
|
||||
}
|
||||
void branchTestPtr(Condition cond, const Register &lhs, const Register &rhs, Label *label) {
|
||||
branchTest32(cond, lhs, rhs, label);
|
||||
@ -712,22 +703,22 @@ public:
|
||||
|
||||
template <typename T>
|
||||
CodeOffsetJump branchPtrWithPatch(Condition cond, Address addr, T ptr, RepatchLabel *label) {
|
||||
loadPtr(addr, secondScratchReg_);
|
||||
loadPtr(addr, SecondScratchReg);
|
||||
movePtr(ptr, ScratchRegister);
|
||||
Label skipJump;
|
||||
ma_b(secondScratchReg_, ScratchRegister, &skipJump, InvertCondition(cond), ShortJump);
|
||||
ma_b(SecondScratchReg, ScratchRegister, &skipJump, InvertCondition(cond), ShortJump);
|
||||
CodeOffsetJump off = jumpWithPatch(label);
|
||||
bind(&skipJump);
|
||||
return off;
|
||||
}
|
||||
void branchPtr(Condition cond, Address addr, ImmGCPtr ptr, Label *label) {
|
||||
ma_lw(secondScratchReg_, addr);
|
||||
ma_lw(SecondScratchReg, addr);
|
||||
ma_li(ScratchRegister, ptr);
|
||||
ma_b(secondScratchReg_, ScratchRegister, label, cond);
|
||||
ma_b(SecondScratchReg, ScratchRegister, label, cond);
|
||||
}
|
||||
void branchPtr(Condition cond, Address addr, ImmWord ptr, Label *label) {
|
||||
ma_lw(secondScratchReg_, addr);
|
||||
ma_b(secondScratchReg_, Imm32(ptr.value), label, cond);
|
||||
ma_lw(SecondScratchReg, addr);
|
||||
ma_b(SecondScratchReg, Imm32(ptr.value), label, cond);
|
||||
}
|
||||
void branchPtr(Condition cond, Address addr, ImmPtr ptr, Label *label) {
|
||||
branchPtr(cond, addr, ImmWord(uintptr_t(ptr.value)), label);
|
||||
@ -742,8 +733,8 @@ public:
|
||||
ma_b(ScratchRegister, ptr, label, cond);
|
||||
}
|
||||
void branch32(Condition cond, const AbsoluteAddress &lhs, Imm32 rhs, Label *label) {
|
||||
loadPtr(lhs, secondScratchReg_); // ma_b might use scratch
|
||||
ma_b(secondScratchReg_, rhs, label, cond);
|
||||
loadPtr(lhs, SecondScratchReg); // ma_b might use scratch
|
||||
ma_b(SecondScratchReg, rhs, label, cond);
|
||||
}
|
||||
void branch32(Condition cond, const AbsoluteAddress &lhs, const Register &rhs, Label *label) {
|
||||
loadPtr(lhs, ScratchRegister);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user