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Bug 1130089 - Use constexpr for JitStackValueAlignment. r=bbouvier

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This commit is contained in:
Nicolas B. Pierron 2015-03-25 15:59:02 +01:00
parent 0994ed088a
commit 57eca445bd
12 changed files with 67 additions and 56 deletions
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9
js/src/jit/CodeGenerator.cpp
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@ -3140,11 +3140,10 @@ CodeGenerator::emitPushArguments(LApplyArgsGeneric *apply, Register extraStackSp
masm.movePtr(argcreg, extraStackSpace); masm.movePtr(argcreg, extraStackSpace);
// Align the JitFrameLayout on the JitStackAlignment. // Align the JitFrameLayout on the JitStackAlignment.
const uint32_t alignment = JitStackAlignment / sizeof(Value); if (JitStackValueAlignment > 1) {
if (alignment > 1) {
MOZ_ASSERT(frameSize() % JitStackAlignment == 0, MOZ_ASSERT(frameSize() % JitStackAlignment == 0,
"Stack padding assumes that the frameSize is correct"); "Stack padding assumes that the frameSize is correct");
MOZ_ASSERT(alignment == 2); MOZ_ASSERT(JitStackValueAlignment == 2);
Label noPaddingNeeded; Label noPaddingNeeded;
// if the number of arguments is odd, then we do not need any padding. // if the number of arguments is odd, then we do not need any padding.
masm.branchTestPtr(Assembler::NonZero, argcreg, Imm32(1), &noPaddingNeeded); masm.branchTestPtr(Assembler::NonZero, argcreg, Imm32(1), &noPaddingNeeded);
@ -3161,8 +3160,8 @@ CodeGenerator::emitPushArguments(LApplyArgsGeneric *apply, Register extraStackSp
// Put a magic value in the space reserved for padding. Note, this code // Put a magic value in the space reserved for padding. Note, this code
// cannot be merged with the previous test, as not all architectures can // cannot be merged with the previous test, as not all architectures can
// write below their stack pointers. // write below their stack pointers.
if (alignment > 1) { if (JitStackValueAlignment > 1) {
MOZ_ASSERT(alignment == 2); MOZ_ASSERT(JitStackValueAlignment == 2);
Label noPaddingNeeded; Label noPaddingNeeded;
// if the number of arguments is odd, then we do not need any padding. // if the number of arguments is odd, then we do not need any padding.
masm.branchTestPtr(Assembler::NonZero, argcreg, Imm32(1), &noPaddingNeeded); masm.branchTestPtr(Assembler::NonZero, argcreg, Imm32(1), &noPaddingNeeded);

5
js/src/jit/LIR-Common.h
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@ -1537,9 +1537,8 @@ class LJSCallInstructionHelper : public LCallInstructionHelper<Defs, Operands, T
{ {
public: public:
uint32_t argslot() const { uint32_t argslot() const {
static const uint32_t alignment = JitStackAlignment / sizeof(Value); if (JitStackValueAlignment > 1)
if (alignment > 1) return AlignBytes(mir()->numStackArgs(), JitStackValueAlignment);
return AlignBytes(mir()->numStackArgs(), alignment);
return mir()->numStackArgs(); return mir()->numStackArgs();
} }
MCall *mir() const { MCall *mir() const {

11
js/src/jit/LIR.h
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@ -1760,11 +1760,12 @@ class LIRGraph
// platform stack alignment requirement, and so that it's a multiple of // platform stack alignment requirement, and so that it's a multiple of
// the number of slots per Value. // the number of slots per Value.
uint32_t paddedLocalSlotCount() const { uint32_t paddedLocalSlotCount() const {
// Round to ABIStackAlignment, but also round to at least sizeof(Value) // Round to JitStackAlignment, and implicitly to sizeof(Value) as
// in case that's greater, because StackOffsetOfPassedArg rounds // JitStackAlignment is a multiple of sizeof(Value). These alignments
// argument slots to 8-byte boundaries. // are needed for spilling SIMD registers properly, and for
size_t Alignment = Max(size_t(JitStackAlignment), sizeof(Value)); // StackOffsetOfPassedArg which rounds argument slots to 8-byte
return AlignBytes(localSlotCount(), Alignment); // boundaries.
return AlignBytes(localSlotCount(), JitStackAlignment);
} }
size_t paddedLocalSlotsSize() const { size_t paddedLocalSlotsSize() const {
return paddedLocalSlotCount(); return paddedLocalSlotCount();

5
js/src/jit/Lowering.cpp
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@ -393,9 +393,8 @@ LIRGenerator::lowerCallArguments(MCall *call)
// Align the arguments of a call such that the callee would keep the same // Align the arguments of a call such that the callee would keep the same
// alignment as the caller. // alignment as the caller.
uint32_t baseSlot = 0; uint32_t baseSlot = 0;
static const uint32_t alignment = JitStackAlignment / sizeof(Value); if (JitStackValueAlignment > 1)
if (alignment > 1) baseSlot = AlignBytes(argc, JitStackValueAlignment);
baseSlot = AlignBytes(argc, alignment);
else else
baseSlot = argc; baseSlot = argc;

10
js/src/jit/MacroAssembler.cpp
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@ -2486,8 +2486,7 @@ MacroAssembler::profilerPreCallImpl(Register reg, Register reg2)
void void
MacroAssembler::alignJitStackBasedOnNArgs(Register nargs) MacroAssembler::alignJitStackBasedOnNArgs(Register nargs)
{ {
const uint32_t alignment = JitStackAlignment / sizeof(Value); if (JitStackValueAlignment == 1)
if (alignment == 1)
return; return;
// A JitFrameLayout is composed of the following: // A JitFrameLayout is composed of the following:
@ -2500,7 +2499,7 @@ MacroAssembler::alignJitStackBasedOnNArgs(Register nargs)
// Which implies that |argN| is aligned if |nargs| is even, and offset by // Which implies that |argN| is aligned if |nargs| is even, and offset by
// |sizeof(Value)| if |nargs| is odd. // |sizeof(Value)| if |nargs| is odd.
MOZ_ASSERT(alignment == 2); MOZ_ASSERT(JitStackValueAlignment == 2);
// Thus the |padding| is offset by |sizeof(Value)| if |nargs| is even, and // Thus the |padding| is offset by |sizeof(Value)| if |nargs| is even, and
// aligned if |nargs| is odd. // aligned if |nargs| is odd.
@ -2535,8 +2534,7 @@ MacroAssembler::alignJitStackBasedOnNArgs(Register nargs)
void void
MacroAssembler::alignJitStackBasedOnNArgs(uint32_t nargs) MacroAssembler::alignJitStackBasedOnNArgs(uint32_t nargs)
{ {
const uint32_t alignment = JitStackAlignment / sizeof(Value); if (JitStackValueAlignment == 1)
if (alignment == 1)
return; return;
// A JitFrameLayout is composed of the following: // A JitFrameLayout is composed of the following:
@ -2549,7 +2547,7 @@ MacroAssembler::alignJitStackBasedOnNArgs(uint32_t nargs)
// Which implies that |argN| is aligned if |nargs| is even, and offset by // Which implies that |argN| is aligned if |nargs| is even, and offset by
// |sizeof(Value)| if |nargs| is odd. // |sizeof(Value)| if |nargs| is odd.
MOZ_ASSERT(alignment == 2); MOZ_ASSERT(JitStackValueAlignment == 2);
// Thus the |padding| is offset by |sizeof(Value)| if |nargs| is even, and // Thus the |padding| is offset by |sizeof(Value)| if |nargs| is even, and
// aligned if |nargs| is odd. // aligned if |nargs| is odd.

14
js/src/jit/arm/Assembler-arm.h
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@ -146,16 +146,20 @@ static MOZ_CONSTEXPR_VAR FloatRegister d15 = {FloatRegisters::d15, VFPRegister::
// load/store) operate in a single cycle when the address they are dealing with // load/store) operate in a single cycle when the address they are dealing with
// is 8 byte aligned. Also, the ARM abi wants the stack to be 8 byte aligned at // is 8 byte aligned. Also, the ARM abi wants the stack to be 8 byte aligned at
// function boundaries. I'm trying to make sure this is always true. // function boundaries. I'm trying to make sure this is always true.
static const uint32_t ABIStackAlignment = 8; static MOZ_CONSTEXPR_VAR uint32_t ABIStackAlignment = 8;
static const uint32_t CodeAlignment = 8; static MOZ_CONSTEXPR_VAR uint32_t CodeAlignment = 8;
static const uint32_t JitStackAlignment = 8; static MOZ_CONSTEXPR_VAR uint32_t JitStackAlignment = 8;
static MOZ_CONSTEXPR_VAR uint32_t JitStackValueAlignment = JitStackAlignment / sizeof(Value);
static_assert(JitStackAlignment % sizeof(Value) == 0 && JitStackValueAlignment >= 1,
"Stack alignment should be a non-zero multiple of sizeof(Value)");
// This boolean indicates whether we support SIMD instructions flavoured for // This boolean indicates whether we support SIMD instructions flavoured for
// this architecture or not. Rather than a method in the LIRGenerator, it is // this architecture or not. Rather than a method in the LIRGenerator, it is
// here such that it is accessible from the entire codebase. Once full support // here such that it is accessible from the entire codebase. Once full support
// for SIMD is reached on all tier-1 platforms, this constant can be deleted. // for SIMD is reached on all tier-1 platforms, this constant can be deleted.
static const bool SupportsSimd = false; static MOZ_CONSTEXPR_VAR bool SupportsSimd = false;
static const uint32_t SimdMemoryAlignment = 8; static MOZ_CONSTEXPR_VAR uint32_t SimdMemoryAlignment = 8;
static_assert(CodeAlignment % SimdMemoryAlignment == 0, static_assert(CodeAlignment % SimdMemoryAlignment == 0,
"Code alignment should be larger than any of the alignments which are used for " "Code alignment should be larger than any of the alignments which are used for "

18
js/src/jit/mips/Assembler-mips.h
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@ -161,23 +161,27 @@ static MOZ_CONSTEXPR_VAR FloatRegister f30 = { FloatRegisters::f30, FloatRegiste
// MIPS CPUs can only load multibyte data that is "naturally" // MIPS CPUs can only load multibyte data that is "naturally"
// four-byte-aligned, sp register should be eight-byte-aligned. // four-byte-aligned, sp register should be eight-byte-aligned.
static const uint32_t ABIStackAlignment = 8; static MOZ_CONSTEXPR_VAR uint32_t ABIStackAlignment = 8;
static const uint32_t CodeAlignment = 4; static MOZ_CONSTEXPR_VAR uint32_t CodeAlignment = 4;
static const uint32_t JitStackAlignment = 8; static MOZ_CONSTEXPR_VAR uint32_t JitStackAlignment = 8;
static MOZ_CONSTEXPR_VAR uint32_t JitStackValueAlignment = JitStackAlignment / sizeof(Value);
static_assert(JitStackAlignment % sizeof(Value) == 0 && JitStackValueAlignment >= 1,
"Stack alignment should be a non-zero multiple of sizeof(Value)");
// This boolean indicates whether we support SIMD instructions flavoured for // This boolean indicates whether we support SIMD instructions flavoured for
// this architecture or not. Rather than a method in the LIRGenerator, it is // this architecture or not. Rather than a method in the LIRGenerator, it is
// here such that it is accessible from the entire codebase. Once full support // here such that it is accessible from the entire codebase. Once full support
// for SIMD is reached on all tier-1 platforms, this constant can be deleted. // for SIMD is reached on all tier-1 platforms, this constant can be deleted.
static const bool SupportsSimd = false; static MOZ_CONSTEXPR_VAR bool SupportsSimd = false;
// TODO this is just a filler to prevent a build failure. The MIPS SIMD // TODO this is just a filler to prevent a build failure. The MIPS SIMD
// alignment requirements still need to be explored. // alignment requirements still need to be explored.
// TODO Copy the static_asserts from x64/x86 assembler files. // TODO Copy the static_asserts from x64/x86 assembler files.
static const uint32_t SimdMemoryAlignment = 8; static MOZ_CONSTEXPR_VAR uint32_t SimdMemoryAlignment = 8;
static const uint32_t AsmJSStackAlignment = SimdMemoryAlignment; static MOZ_CONSTEXPR_VAR uint32_t AsmJSStackAlignment = SimdMemoryAlignment;
static const Scale ScalePointer = TimesFour; static MOZ_CONSTEXPR_VAR Scale ScalePointer = TimesFour;
// MIPS instruction types // MIPS instruction types
// +---------------------------------------------------------------+ // +---------------------------------------------------------------+

7
js/src/jit/none/MacroAssembler-none.h
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@ -71,9 +71,10 @@ static MOZ_CONSTEXPR_VAR ValueOperand JSReturnOperand(InvalidReg);
#error "Bad architecture" #error "Bad architecture"
#endif #endif
static const uint32_t ABIStackAlignment = 4; static MOZ_CONSTEXPR_VAR uint32_t ABIStackAlignment = 4;
static const uint32_t CodeAlignment = 4; static MOZ_CONSTEXPR_VAR uint32_t CodeAlignment = 4;
static const uint32_t JitStackAlignment = 4; static MOZ_CONSTEXPR_VAR uint32_t JitStackAlignment = 8;
static MOZ_CONSTEXPR_VAR uint32_t JitStackValueAlignment = JitStackAlignment / sizeof(Value);
static const Scale ScalePointer = TimesOne; static const Scale ScalePointer = TimesOne;

14
js/src/jit/x64/Assembler-x64.h
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@ -178,16 +178,20 @@ static MOZ_CONSTEXPR_VAR Register OsrFrameReg = IntArgReg3;
static MOZ_CONSTEXPR_VAR Register PreBarrierReg = rdx; static MOZ_CONSTEXPR_VAR Register PreBarrierReg = rdx;
static const uint32_t ABIStackAlignment = 16; static MOZ_CONSTEXPR_VAR uint32_t ABIStackAlignment = 16;
static const uint32_t CodeAlignment = 16; static MOZ_CONSTEXPR_VAR uint32_t CodeAlignment = 16;
static const uint32_t JitStackAlignment = 16; static MOZ_CONSTEXPR_VAR uint32_t JitStackAlignment = 16;
static MOZ_CONSTEXPR_VAR uint32_t JitStackValueAlignment = JitStackAlignment / sizeof(Value);
static_assert(JitStackAlignment % sizeof(Value) == 0 && JitStackValueAlignment >= 1,
"Stack alignment should be a non-zero multiple of sizeof(Value)");
// This boolean indicates whether we support SIMD instructions flavoured for // This boolean indicates whether we support SIMD instructions flavoured for
// this architecture or not. Rather than a method in the LIRGenerator, it is // this architecture or not. Rather than a method in the LIRGenerator, it is
// here such that it is accessible from the entire codebase. Once full support // here such that it is accessible from the entire codebase. Once full support
// for SIMD is reached on all tier-1 platforms, this constant can be deleted. // for SIMD is reached on all tier-1 platforms, this constant can be deleted.
static const bool SupportsSimd = true; static MOZ_CONSTEXPR_VAR bool SupportsSimd = true;
static const uint32_t SimdMemoryAlignment = 16; static MOZ_CONSTEXPR_VAR uint32_t SimdMemoryAlignment = 16;
static_assert(CodeAlignment % SimdMemoryAlignment == 0, static_assert(CodeAlignment % SimdMemoryAlignment == 0,
"Code alignment should be larger than any of the alignments which are used for " "Code alignment should be larger than any of the alignments which are used for "

7
js/src/jit/x64/Trampoline-x64.cpp
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@ -405,10 +405,9 @@ JitRuntime::generateArgumentsRectifier(JSContext *cx, void **returnAddrOut)
static_assert(JitStackAlignment % sizeof(Value) == 0, static_assert(JitStackAlignment % sizeof(Value) == 0,
"Ensure that we can pad the stack by pushing extra UndefinedValue"); "Ensure that we can pad the stack by pushing extra UndefinedValue");
const uint32_t alignment = JitStackAlignment / sizeof(Value); MOZ_ASSERT(IsPowerOfTwo(JitStackValueAlignment));
MOZ_ASSERT(IsPowerOfTwo(alignment)); masm.addl(Imm32(JitStackValueAlignment - 1 /* for padding */ + 1 /* for |this| */), rcx);
masm.addl(Imm32(alignment - 1 /* for padding */ + 1 /* for |this| */), rcx); masm.andl(Imm32(~(JitStackValueAlignment - 1)), rcx);
masm.andl(Imm32(~(alignment - 1)), rcx);
// Load the number of |undefined|s to push into %rcx. // Load the number of |undefined|s to push into %rcx.
masm.subq(r8, rcx); masm.subq(r8, rcx);

16
js/src/jit/x86/Assembler-x86.h
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@ -105,19 +105,23 @@ static MOZ_CONSTEXPR_VAR Register AsmJSIonExitRegD2 = esi;
// GCC stack is aligned on 16 bytes. Ion does not maintain this for internal // GCC stack is aligned on 16 bytes. Ion does not maintain this for internal
// calls. asm.js code does. // calls. asm.js code does.
#if defined(__GNUC__) #if defined(__GNUC__)
static const uint32_t ABIStackAlignment = 16; static MOZ_CONSTEXPR_VAR uint32_t ABIStackAlignment = 16;
#else #else
static const uint32_t ABIStackAlignment = 4; static MOZ_CONSTEXPR_VAR uint32_t ABIStackAlignment = 4;
#endif #endif
static const uint32_t CodeAlignment = 16; static MOZ_CONSTEXPR_VAR uint32_t CodeAlignment = 16;
static const uint32_t JitStackAlignment = 16; static MOZ_CONSTEXPR_VAR uint32_t JitStackAlignment = 16;
static MOZ_CONSTEXPR_VAR uint32_t JitStackValueAlignment = JitStackAlignment / sizeof(Value);
static_assert(JitStackAlignment % sizeof(Value) == 0 && JitStackValueAlignment >= 1,
"Stack alignment should be a non-zero multiple of sizeof(Value)");
// This boolean indicates whether we support SIMD instructions flavoured for // This boolean indicates whether we support SIMD instructions flavoured for
// this architecture or not. Rather than a method in the LIRGenerator, it is // this architecture or not. Rather than a method in the LIRGenerator, it is
// here such that it is accessible from the entire codebase. Once full support // here such that it is accessible from the entire codebase. Once full support
// for SIMD is reached on all tier-1 platforms, this constant can be deleted. // for SIMD is reached on all tier-1 platforms, this constant can be deleted.
static const bool SupportsSimd = true; static MOZ_CONSTEXPR_VAR bool SupportsSimd = true;
static const uint32_t SimdMemoryAlignment = 16; static MOZ_CONSTEXPR_VAR uint32_t SimdMemoryAlignment = 16;
static_assert(CodeAlignment % SimdMemoryAlignment == 0, static_assert(CodeAlignment % SimdMemoryAlignment == 0,
"Code alignment should be larger than any of the alignments which are used for " "Code alignment should be larger than any of the alignments which are used for "

7
js/src/jit/x86/Trampoline-x86.cpp
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@ -395,10 +395,9 @@ JitRuntime::generateArgumentsRectifier(JSContext *cx, void **returnAddrOut)
static_assert(JitStackAlignment % sizeof(Value) == 0, static_assert(JitStackAlignment % sizeof(Value) == 0,
"Ensure that we can pad the stack by pushing extra UndefinedValue"); "Ensure that we can pad the stack by pushing extra UndefinedValue");
const uint32_t alignment = JitStackAlignment / sizeof(Value); MOZ_ASSERT(IsPowerOfTwo(JitStackValueAlignment));
MOZ_ASSERT(IsPowerOfTwo(alignment)); masm.addl(Imm32(JitStackValueAlignment - 1 /* for padding */), ecx);
masm.addl(Imm32(alignment - 1 /* for padding */), ecx); masm.andl(Imm32(~(JitStackValueAlignment - 1)), ecx);
masm.andl(Imm32(~(alignment - 1)), ecx);
masm.subl(esi, ecx); masm.subl(esi, ecx);
// Copy the number of actual arguments. // Copy the number of actual arguments.