Bug 1013996 - IonMonkey ARM: Simulator alignment checks and irregexp aligned access support. r=lth

This commit is contained in:
Douglas Crosher 2014-10-03 06:22:50 +10:00
parent 7691b48473
commit 53bcbf9899
4 changed files with 43 additions and 29 deletions

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@ -1320,7 +1320,9 @@ NativeRegExpMacroAssembler::CheckSpecialCharacterClass(char16_t type, Label* on_
bool
NativeRegExpMacroAssembler::CanReadUnaligned()
{
#if defined(JS_CODEGEN_ARM) || defined(JS_CODEGEN_MIPS)
#if defined(JS_CODEGEN_ARM)
return !jit::HasAlignmentFault();
#elif defined(JS_CODEGEN_MIPS)
return false;
#else
return true;

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@ -38,20 +38,6 @@
# endif
#endif
// Not part of the HWCAP flag, but we need to know these and these bits are not used.
// A bit to flag the use of the ARMv7 arch, otherwise ARMv6.
#define HWCAP_ARMv7 (1 << 28)
// A bit to flag the use of the hardfp ABI.
#define HWCAP_USE_HARDFP_ABI (1 << 27)
// A bit to flag when alignment faults are enabled and signal.
#define HWCAP_ALIGNMENT_FAULT (1 << 26)
// A bit to flag when the flags are uninitialized, so they can be atomically set.
#define HWCAP_UNINITIALIZED (1 << 25)
namespace js {
namespace jit {
@ -142,7 +128,7 @@ CanonicalizeARMHwCapFlags(uint32_t flags)
// The override flags parsed from the ARMHWCAP environment variable or from the
// --arm-hwcap js shell argument.
volatile static uint32_t armHwCapFlags = HWCAP_UNINITIALIZED;
volatile uint32_t armHwCapFlags = HWCAP_UNINITIALIZED;
bool
ParseARMHwCapFlags(const char *armHwCap)
@ -317,14 +303,6 @@ bool HasIDIV()
return armHwCapFlags & HWCAP_IDIVA;
}
// Returns true when cpu alignment faults are enabled and signaled, and thus we
// should ensure loads and stores are aligned.
bool HasAlignmentFault()
{
MOZ_ASSERT(armHwCapFlags != HWCAP_UNINITIALIZED);
return armHwCapFlags & HWCAP_ALIGNMENT_FAULT;
}
// This is defined in the header and inlined when not using the simulator.
#if defined(JS_ARM_SIMULATOR)
bool UseHardFpABI()

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@ -521,7 +521,31 @@ bool HasVFPv3();
bool HasVFP();
bool Has32DP();
bool HasIDIV();
bool HasAlignmentFault();
extern volatile uint32_t armHwCapFlags;
// Not part of the HWCAP flag, but we need to know these and these bits are not
// used. Define these here so that their use can be inlined by the simulator.
// A bit to flag when the flags are uninitialized, so they can be atomically set.
#define HWCAP_UNINITIALIZED (1 << 25)
// A bit to flag when alignment faults are enabled and signal.
#define HWCAP_ALIGNMENT_FAULT (1 << 26)
// A bit to flag the use of the hardfp ABI.
#define HWCAP_USE_HARDFP_ABI (1 << 27)
// A bit to flag the use of the ARMv7 arch, otherwise ARMv6.
#define HWCAP_ARMv7 (1 << 28)
// Returns true when cpu alignment faults are enabled and signaled, and thus we
// should ensure loads and stores are aligned.
inline bool HasAlignmentFault()
{
MOZ_ASSERT(armHwCapFlags != HWCAP_UNINITIALIZED);
return armHwCapFlags & HWCAP_ALIGNMENT_FAULT;
}
// Arm/D32 has double registers that can NOT be treated as float32 and this
// requires some dances in lowering.

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@ -1493,8 +1493,13 @@ Simulator::readW(int32_t addr, SimInstruction *instr)
{
// The regexp engine emits unaligned loads, so we don't check for them here
// like most of the other methods do.
intptr_t *ptr = reinterpret_cast<intptr_t*>(addr);
return *ptr;
if ((addr & 3) == 0 || !HasAlignmentFault()) {
intptr_t *ptr = reinterpret_cast<intptr_t*>(addr);
return *ptr;
} else {
printf("Unaligned write at 0x%08x, pc=%p\n", addr, instr);
MOZ_CRASH();
}
}
void
@ -1514,8 +1519,13 @@ Simulator::readHU(int32_t addr, SimInstruction *instr)
{
// The regexp engine emits unaligned loads, so we don't check for them here
// like most of the other methods do.
uint16_t *ptr = reinterpret_cast<uint16_t*>(addr);
return *ptr;
if ((addr & 1) == 0 || !HasAlignmentFault()) {
uint16_t *ptr = reinterpret_cast<uint16_t*>(addr);
return *ptr;
}
printf("Unaligned unsigned halfword read at 0x%08x, pc=%p\n", addr, instr);
MOZ_CRASH();
return 0;
}
int16_t