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[JAEGER] Quell GCC warnings about trailing commas.

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This commit is contained in:
David Anderson 2010-06-02 02:08:26 -07:00
parent 9fdf7ec98f
commit 3868a5a89c
3 changed files with 11 additions and 11 deletions
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4
js/src/assembler/assembler/AbstractMacroAssembler.h
View File

@ -64,7 +64,7 @@ public:
TimesOne,
TimesTwo,
TimesFour,
TimesEight,
TimesEight
};
// Address:
@ -307,7 +307,7 @@ public:
None = 0x0,
Linkable = 0x1,
Near = 0x2,
LinkableNear = 0x3,
LinkableNear = 0x3
};
Call()

2
js/src/assembler/assembler/MacroAssemblerX86Common.h
View File

@ -73,7 +73,7 @@ public:
DoubleGreaterThanOrUnordered = X86Assembler::ConditionB | DoubleConditionBitInvert,
DoubleGreaterThanOrEqualOrUnordered = X86Assembler::ConditionBE | DoubleConditionBitInvert,
DoubleLessThanOrUnordered = X86Assembler::ConditionB,
DoubleLessThanOrEqualOrUnordered = X86Assembler::ConditionBE,
DoubleLessThanOrEqualOrUnordered = X86Assembler::ConditionBE
};
COMPILE_ASSERT(
!((X86Assembler::ConditionE | X86Assembler::ConditionNE | X86Assembler::ConditionA | X86Assembler::ConditionAE | X86Assembler::ConditionB | X86Assembler::ConditionBE) & DoubleConditionBits),

16
js/src/assembler/assembler/X86Assembler.h
View File

@ -62,7 +62,7 @@ namespace X86Registers {
esp,
ebp,
esi,
edi,
edi
#if WTF_CPU_X86_64
,r8,
@ -72,7 +72,7 @@ namespace X86Registers {
r12,
r13,
r14,
r15,
r15
#endif
} RegisterID;
@ -84,7 +84,7 @@ namespace X86Registers {
xmm4,
xmm5,
xmm6,
xmm7,
xmm7
} XMMRegisterID;
static const char* nameIReg(int szB, RegisterID reg)
@ -148,7 +148,7 @@ public:
ConditionG,
ConditionC = ConditionB,
ConditionNC = ConditionAE,
ConditionNC = ConditionAE
} Condition;
static const char* nameCC(Condition cc)
@ -214,7 +214,7 @@ private:
OP_GROUP3_EbIb = 0xF6,
OP_GROUP3_Ev = 0xF7,
OP_GROUP3_EvIz = 0xF7, // OP_GROUP3_Ev has an immediate, when instruction is a test.
OP_GROUP5_Ev = 0xFF,
OP_GROUP5_Ev = 0xFF
} OneByteOpcodeID;
typedef enum {
@ -236,7 +236,7 @@ private:
OP2_IMUL_GvEv = 0xAF,
OP2_MOVZX_GvEb = 0xB6,
OP2_MOVZX_GvEw = 0xB7,
OP2_PEXTRW_GdUdIb = 0xC5,
OP2_PEXTRW_GdUdIb = 0xC5
} TwoByteOpcodeID;
TwoByteOpcodeID jccRel32(Condition cond)
@ -273,7 +273,7 @@ private:
GROUP5_OP_JMPN = 4,
GROUP5_OP_PUSH = 6,
GROUP11_MOV = 0,
GROUP11_MOV = 0
} GroupOpcodeID;
class X86InstructionFormatter;
@ -2447,7 +2447,7 @@ private:
ModRmMemoryNoDisp,
ModRmMemoryDisp8,
ModRmMemoryDisp32,
ModRmRegister,
ModRmRegister
};
void putModRm(ModRmMode mode, int reg, RegisterID rm)