From 37c967beaf961fa9f41d7840bf1c58b1bf7bbb4a Mon Sep 17 00:00:00 2001 From: Steven Johnson Date: Fri, 22 Jan 2010 12:39:57 -0800 Subject: [PATCH] nanojit/NativeARM.h: remove NJ_ARM_ARCH (code=bramley,r=stejohns,bug=541258) --HG-- extra : convert_revision : cfcf246845a1fa07f60c791bdc471ed11a10351a --- js/src/nanojit/NativeARM.h | 39 +++++++++++--------------------------- 1 file changed, 11 insertions(+), 28 deletions(-) diff --git a/js/src/nanojit/NativeARM.h b/js/src/nanojit/NativeARM.h index fd90c2122f3..5f6e51b534b 100644 --- a/js/src/nanojit/NativeARM.h +++ b/js/src/nanojit/NativeARM.h @@ -467,42 +467,25 @@ enum { // -------- // [_d_hi,_d] = _l * _r -#define SMULL_dont_check_op1(_d, _d_hi, _l, _r) do { \ - underrunProtect(4); \ - NanoAssert((ARM_ARCH >= 6) || ((_d) != (_l))); \ - NanoAssert(IsGpReg(_d) && IsGpReg(_d_hi) && IsGpReg(_l) && IsGpReg(_r)); \ - NanoAssert(((_d) != PC) && ((_d_hi) != PC) && ((_l) != PC) && ((_r) != PC));\ - *(--_nIns) = (NIns)( COND_AL | 0xc00090 | (_d_hi)<<16 | (_d)<<12 | (_r)<<8 | (_l) );\ - asm_output("smull %s, %s, %s, %s",gpn(_d),gpn(_d_hi),gpn(_l),gpn(_r)); \ +#define SMULL(_d, _d_hi, _l, _r) do { \ + underrunProtect(4); \ + NanoAssert((ARM_ARCH >= 6) || ((_d ) != (_l))); \ + NanoAssert((ARM_ARCH >= 6) || ((_d_hi) != (_l))); \ + NanoAssert(IsGpReg(_d) && IsGpReg(_d_hi) && IsGpReg(_l) && IsGpReg(_r)); \ + NanoAssert(((_d) != PC) && ((_d_hi) != PC) && ((_l) != PC) && ((_r) != PC)); \ + *(--_nIns) = (NIns)( COND_AL | 0xc00090 | (_d_hi)<<16 | (_d)<<12 | (_r)<<8 | (_l) ); \ + asm_output("smull %s, %s, %s, %s",gpn(_d),gpn(_d_hi),gpn(_l),gpn(_r)); \ } while(0) -#if NJ_ARM_ARCH >= NJ_ARM_V6 -#define SMULL(_d, _d_hi, _l, _r) SMULL_dont_check_op1(_d, _d_hi, _l, _r) -#else -#define SMULL(_d, _d_hi, _l, _r) do { \ - NanoAssert( (_d)!=(_l)); \ - NanoAssert((_d_hi)!=(_l)); \ - SMULL_dont_check_op1(_d, _d_hi, _l, _r); \ - } while(0) -#endif - // _d = _l * _r -#define MUL_dont_check_op1(_d, _l, _r) do { \ +#define MUL(_d, _l, _r) do { \ underrunProtect(4); \ NanoAssert((ARM_ARCH >= 6) || ((_d) != (_l))); \ NanoAssert(IsGpReg(_d) && IsGpReg(_l) && IsGpReg(_r)); \ NanoAssert(((_d) != PC) && ((_l) != PC) && ((_r) != PC)); \ *(--_nIns) = (NIns)( COND_AL | (_d)<<16 | (_r)<<8 | 0x90 | (_l) ); \ - asm_output("mul %s, %s, %s",gpn(_d),gpn(_l),gpn(_r)); } while(0) - -#if NJ_ARM_ARCH >= NJ_ARM_V6 -#define MUL(_d, _l, _r) MUL_dont_check_op1(_d, _l, _r) -#else -#define MUL(_d, _l, _r) do { \ - NanoAssert((_d)!=(_l)); \ - MUL_dont_check_op1(_d, _l, _r); \ - } while(0) -#endif + asm_output("mul %s, %s, %s",gpn(_d),gpn(_l),gpn(_r)); \ +} while(0) // RSBS _d, _r // _d = 0 - _r