diff --git a/js/src/nanojit/LIRopcode.tbl b/js/src/nanojit/LIRopcode.tbl
index 26dc898c93d..177ad5b4690 100644
--- a/js/src/nanojit/LIRopcode.tbl
+++ b/js/src/nanojit/LIRopcode.tbl
@@ -223,6 +223,7 @@ OPDEF64(i2q,    26,      1, Op1)    // sign-extend i32 to i64
 OPDEF64(u2q,    27,      1, Op1)    // zero-extend u32 to u64
 OPDEF64(i2f,    28,      1, Op1)    // convert a signed 32-bit integer to a float
 OPDEF64(u2f,    29,      1, Op1)    // convert an unsigned 32-bit integer to a float
+
 OPDEF64(unused30_64, 30,-1, None)
 OPDEF64(unused31_64, 31,-1, None)
 OPDEF64(unused32_64, 32,-1, None)
diff --git a/js/src/nanojit/Nativei386.h b/js/src/nanojit/Nativei386.h
index 4814eefa318..09a7aa8df7c 100644
--- a/js/src/nanojit/Nativei386.h
+++ b/js/src/nanojit/Nativei386.h
@@ -315,15 +315,15 @@ namespace nanojit
 #define ALUmi(c,d,b,i) \
         underrunProtect(10); \
         NanoAssert(((unsigned)b)<8); \
-         if (isS8(i)) { \
+        if (isS8(i)) { \
             *(--_nIns) = uint8_t(i); \
             MODRMm((c>>3),(d),(b)); \
             *(--_nIns) = uint8_t(0x83); \
-         } else { \
-             IMM32(i); \
+        } else { \
+            IMM32(i); \
             MODRMm((c>>3),(d),(b)); \
             *(--_nIns) = uint8_t(0x81); \
-         }
+        }
 
 #define ALU2(c,d,s) \
         underrunProtect(3); \
@@ -394,7 +394,7 @@ namespace nanojit
 #define SETBE(r)    do { count_alu(); ALU2(0x0f96,(r),(r));         asm_output("setbe %s",gpn(r)); } while(0)
 #define SETA(r)     do { count_alu(); ALU2(0x0f97,(r),(r));         asm_output("seta %s",gpn(r)); } while(0)
 #define SETAE(r)    do { count_alu(); ALU2(0x0f93,(r),(r));         asm_output("setae %s",gpn(r)); } while(0)
-#define SETO(r)     do { count_alu(); ALU2(0x0f92,(r),(r));         asm_output("seto  %s",gpn(r)); } while(0)
+#define SETO(r)     do { count_alu(); ALU2(0x0f92,(r),(r));         asm_output("seto %s",gpn(r)); } while(0)
 
 #define MREQ(dr,sr) do { count_alu(); ALU2(0x0f44,dr,sr); asm_output("cmove %s,%s", gpn(dr),gpn(sr)); } while(0)
 #define MRNE(dr,sr) do { count_alu(); ALU2(0x0f45,dr,sr); asm_output("cmovne %s,%s", gpn(dr),gpn(sr)); } while(0)
diff --git a/js/src/nanojit/RegAlloc.h b/js/src/nanojit/RegAlloc.h
index dcd6001a2f0..ac02919ae15 100644
--- a/js/src/nanojit/RegAlloc.h
+++ b/js/src/nanojit/RegAlloc.h
@@ -46,7 +46,7 @@ namespace nanojit
 {
     inline RegisterMask rmask(Register r)
     {
-        return 1 << r;
+        return RegisterMask(1) << r;
     }
 
     class RegAlloc
@@ -121,7 +121,7 @@ namespace nanojit
 
         debug_only( uint32_t    countActive(); )
         debug_only( bool        isConsistent(Register r, LIns* v); )
-        debug_only( RegisterMask managed; )    // bitfield of 0..NJ_MAX_REGISTERS denoting which are under our management
+        debug_only( RegisterMask managed; )    // bitfield denoting which are under our management
 
         LIns*           active[LastReg + 1];    // active[r] = OP that defines r
         int32_t         usepri[LastReg + 1];    // used priority. lower = more likely to spill.