From 2e82c6e7816c38a24812e570b4bd464269fdc81f Mon Sep 17 00:00:00 2001 From: Lars T Hansen Date: Fri, 17 Apr 2015 10:38:30 +0200 Subject: [PATCH] Bug 1154858 - don't ignore parameters. r=sunfish --- .../tests/asm.js/testAtomic-effect.js | 47 +++++++++++++++++++ .../jit/x86-shared/BaseAssembler-x86-shared.h | 20 ++++---- 2 files changed, 57 insertions(+), 10 deletions(-) create mode 100644 js/src/jit-test/tests/asm.js/testAtomic-effect.js diff --git a/js/src/jit-test/tests/asm.js/testAtomic-effect.js b/js/src/jit-test/tests/asm.js/testAtomic-effect.js new file mode 100644 index 00000000000..2cabd206327 --- /dev/null +++ b/js/src/jit-test/tests/asm.js/testAtomic-effect.js @@ -0,0 +1,47 @@ +// |jit-test| test-also-noasmjs +if (!this.Atomics) + quit(); + +function m(stdlib, ffi, heap) +{ + "use asm"; + + var HEAP32 = new stdlib.SharedInt32Array(heap); + var add = stdlib.Atomics.add; + var load = stdlib.Atomics.load; + var _emscripten_asm_const_int=ffi._emscripten_asm_const_int; + + // Regression test for bug 1154858 - Atomics.add for effect did + // not get compiled properly because of an assembler bug. This + // kernel is derived from the large test case in that bug. + + function add_sharedEv(i1) { + i1 = i1 | 0; + var i2 = 0; + var xx = 0; + i2 = i1 + 4 | 0; + i1 = load(HEAP32, i2 >> 2) | 0; + _emscripten_asm_const_int(7, i2 | 0, i1 | 0) | 0; + add(HEAP32, i2 >> 2, 1) | 0; + _emscripten_asm_const_int(8, i2 | 0, load(HEAP32, i2 >> 2) | 0, i1 + 1 | 0) | 0; + return xx|0; + } + + return {add_sharedEv:add_sharedEv}; +} + +var x; + +var sab = new SharedArrayBuffer(65536); +var ffi = + { _emscripten_asm_const_int: + function (...rest) { + //print("OUT: " + rest.join(" ")); + if (rest[0] == 8) + x = rest[2]; + } + }; +var {add_sharedEv} = m(this, ffi, sab); +add_sharedEv(13812); + +assertEq(x, 1); diff --git a/js/src/jit/x86-shared/BaseAssembler-x86-shared.h b/js/src/jit/x86-shared/BaseAssembler-x86-shared.h index 93bcb01e945..7c7dddb82c5 100644 --- a/js/src/jit/x86-shared/BaseAssembler-x86-shared.h +++ b/js/src/jit/x86-shared/BaseAssembler-x86-shared.h @@ -335,10 +335,10 @@ public: { spew("addl $%d, " MEM_obs, imm, ADDR_obs(offset, base, index, scale)); if (CAN_SIGN_EXTEND_8_32(imm)) { - m_formatter.oneByteOp(OP_GROUP1_EvIb, offset, base, GROUP1_OP_ADD); + m_formatter.oneByteOp(OP_GROUP1_EvIb, offset, base, index, scale, GROUP1_OP_ADD); m_formatter.immediate8s(imm); } else { - m_formatter.oneByteOp(OP_GROUP1_EvIz, offset, base, GROUP1_OP_ADD); + m_formatter.oneByteOp(OP_GROUP1_EvIz, offset, base, index, scale, GROUP1_OP_ADD); m_formatter.immediate32(imm); } } @@ -742,10 +742,10 @@ public: { spew("andl $%d, " MEM_obs, imm, ADDR_obs(offset, base, index, scale)); if (CAN_SIGN_EXTEND_8_32(imm)) { - m_formatter.oneByteOp(OP_GROUP1_EvIb, offset, base, GROUP1_OP_AND); + m_formatter.oneByteOp(OP_GROUP1_EvIb, offset, base, index, scale, GROUP1_OP_AND); m_formatter.immediate8s(imm); } else { - m_formatter.oneByteOp(OP_GROUP1_EvIz, offset, base, GROUP1_OP_AND); + m_formatter.oneByteOp(OP_GROUP1_EvIz, offset, base, index, scale, GROUP1_OP_AND); m_formatter.immediate32(imm); } } @@ -920,10 +920,10 @@ public: { spew("orl $%d, " MEM_obs, imm, ADDR_obs(offset, base, index, scale)); if (CAN_SIGN_EXTEND_8_32(imm)) { - m_formatter.oneByteOp(OP_GROUP1_EvIb, offset, base, GROUP1_OP_OR); + m_formatter.oneByteOp(OP_GROUP1_EvIb, offset, base, index, scale, GROUP1_OP_OR); m_formatter.immediate8s(imm); } else { - m_formatter.oneByteOp(OP_GROUP1_EvIz, offset, base, GROUP1_OP_OR); + m_formatter.oneByteOp(OP_GROUP1_EvIz, offset, base, index, scale, GROUP1_OP_OR); m_formatter.immediate32(imm); } } @@ -1030,10 +1030,10 @@ public: { spew("subl $%d, " MEM_obs, imm, ADDR_obs(offset, base, index, scale)); if (CAN_SIGN_EXTEND_8_32(imm)) { - m_formatter.oneByteOp(OP_GROUP1_EvIb, offset, base, GROUP1_OP_SUB); + m_formatter.oneByteOp(OP_GROUP1_EvIb, offset, base, index, scale, GROUP1_OP_SUB); m_formatter.immediate8s(imm); } else { - m_formatter.oneByteOp(OP_GROUP1_EvIz, offset, base, GROUP1_OP_SUB); + m_formatter.oneByteOp(OP_GROUP1_EvIz, offset, base, index, scale, GROUP1_OP_SUB); m_formatter.immediate32(imm); } } @@ -1131,10 +1131,10 @@ public: { spew("xorl $%d, " MEM_obs, imm, ADDR_obs(offset, base, index, scale)); if (CAN_SIGN_EXTEND_8_32(imm)) { - m_formatter.oneByteOp(OP_GROUP1_EvIb, offset, base, GROUP1_OP_XOR); + m_formatter.oneByteOp(OP_GROUP1_EvIb, offset, base, index, scale, GROUP1_OP_XOR); m_formatter.immediate8s(imm); } else { - m_formatter.oneByteOp(OP_GROUP1_EvIz, offset, base, GROUP1_OP_XOR); + m_formatter.oneByteOp(OP_GROUP1_EvIz, offset, base, index, scale, GROUP1_OP_XOR); m_formatter.immediate32(imm); } }