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b=1042508 include resample_neon.h from speexdsp 305e54ea r=padenot
--HG-- extra : rebase_source : effe9aa434298b0b49099b6809d506b92075ad1c
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Karl Tomlinson
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201
media/libspeex_resampler/src/resample_neon.h
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201
media/libspeex_resampler/src/resample_neon.h
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/* Copyright (C) 2007-2008 Jean-Marc Valin
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* Copyright (C) 2008 Thorvald Natvig
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* Copyright (C) 2011 Texas Instruments
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* author Jyri Sarha
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*/
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/**
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@file resample_neon.h
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@brief Resampler functions (NEON version)
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*/
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/*
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of the Xiph.org Foundation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arm_neon.h>
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#ifdef FIXED_POINT
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#ifdef __thumb2__
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static inline int32_t saturate_32bit_to_16bit(int32_t a) {
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int32_t ret;
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asm ("ssat %[ret], #16, %[a]"
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: [ret] "=&r" (ret)
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: [a] "r" (a)
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: );
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return ret;
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}
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#else
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static inline int32_t saturate_32bit_to_16bit(int32_t a) {
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int32_t ret;
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asm ("vmov.s32 d0[0], %[a]\n"
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"vqmovn.s32 d0, q0\n"
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"vmov.s16 %[ret], d0[0]\n"
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: [ret] "=&r" (ret)
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: [a] "r" (a)
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: "q0");
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return ret;
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}
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#endif
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#undef WORD2INT
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#define WORD2INT(x) (saturate_32bit_to_16bit(x))
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#define OVERRIDE_INNER_PRODUCT_SINGLE
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/* Only works when len % 4 == 0 */
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static inline int32_t inner_product_single(const int16_t *a, const int16_t *b, unsigned int len)
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{
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int32_t ret;
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uint32_t remainder = len % 16;
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len = len - remainder;
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asm volatile (" cmp %[len], #0\n"
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" bne 1f\n"
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" vld1.16 {d16}, [%[b]]!\n"
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" vld1.16 {d20}, [%[a]]!\n"
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" subs %[remainder], %[remainder], #4\n"
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" vmull.s16 q0, d16, d20\n"
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" beq 5f\n"
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" b 4f\n"
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"1:"
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" vld1.16 {d16, d17, d18, d19}, [%[b]]!\n"
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" vld1.16 {d20, d21, d22, d23}, [%[a]]!\n"
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" subs %[len], %[len], #16\n"
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" vmull.s16 q0, d16, d20\n"
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" vmlal.s16 q0, d17, d21\n"
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" vmlal.s16 q0, d18, d22\n"
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" vmlal.s16 q0, d19, d23\n"
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" beq 3f\n"
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"2:"
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" vld1.16 {d16, d17, d18, d19}, [%[b]]!\n"
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" vld1.16 {d20, d21, d22, d23}, [%[a]]!\n"
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" subs %[len], %[len], #16\n"
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" vmlal.s16 q0, d16, d20\n"
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" vmlal.s16 q0, d17, d21\n"
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" vmlal.s16 q0, d18, d22\n"
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" vmlal.s16 q0, d19, d23\n"
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" bne 2b\n"
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"3:"
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" cmp %[remainder], #0\n"
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" beq 5f\n"
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"4:"
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" vld1.16 {d16}, [%[b]]!\n"
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" vld1.16 {d20}, [%[a]]!\n"
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" subs %[remainder], %[remainder], #4\n"
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" vmlal.s16 q0, d16, d20\n"
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" bne 4b\n"
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"5:"
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" vaddl.s32 q0, d0, d1\n"
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" vadd.s64 d0, d0, d1\n"
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" vqmovn.s64 d0, q0\n"
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" vqrshrn.s32 d0, q0, #15\n"
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" vmov.s16 %[ret], d0[0]\n"
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: [ret] "=&r" (ret), [a] "+r" (a), [b] "+r" (b),
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[len] "+r" (len), [remainder] "+r" (remainder)
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:
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: "cc", "q0",
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"d16", "d17", "d18", "d19",
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"d20", "d21", "d22", "d23");
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return ret;
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}
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#elif defined(FLOATING_POINT)
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static inline int32_t saturate_float_to_16bit(float a) {
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int32_t ret;
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asm ("vmov.f32 d0[0], %[a]\n"
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"vcvt.s32.f32 d0, d0, #15\n"
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"vqrshrn.s32 d0, q0, #15\n"
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"vmov.s16 %[ret], d0[0]\n"
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: [ret] "=&r" (ret)
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: [a] "r" (a)
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: "q0");
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return ret;
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}
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#undef WORD2INT
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#define WORD2INT(x) (saturate_float_to_16bit(x))
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#define OVERRIDE_INNER_PRODUCT_SINGLE
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/* Only works when len % 4 == 0 */
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static inline float inner_product_single(const float *a, const float *b, unsigned int len)
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{
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float ret;
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uint32_t remainder = len % 16;
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len = len - remainder;
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asm volatile (" cmp %[len], #0\n"
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" bne 1f\n"
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" vld1.32 {q4}, [%[b]]!\n"
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" vld1.32 {q8}, [%[a]]!\n"
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" subs %[remainder], %[remainder], #4\n"
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" vmul.f32 q0, q4, q8\n"
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" bne 4f\n"
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" b 5f\n"
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"1:"
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" vld1.32 {q4, q5}, [%[b]]!\n"
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" vld1.32 {q8, q9}, [%[a]]!\n"
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" vld1.32 {q6, q7}, [%[b]]!\n"
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" vld1.32 {q10, q11}, [%[a]]!\n"
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" subs %[len], %[len], #16\n"
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" vmul.f32 q0, q4, q8\n"
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" vmul.f32 q1, q5, q9\n"
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" vmul.f32 q2, q6, q10\n"
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" vmul.f32 q3, q7, q11\n"
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" beq 3f\n"
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"2:"
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" vld1.32 {q4, q5}, [%[b]]!\n"
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" vld1.32 {q8, q9}, [%[a]]!\n"
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" vld1.32 {q6, q7}, [%[b]]!\n"
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" vld1.32 {q10, q11}, [%[a]]!\n"
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" subs %[len], %[len], #16\n"
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" vmla.f32 q0, q4, q8\n"
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" vmla.f32 q1, q5, q9\n"
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" vmla.f32 q2, q6, q10\n"
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" vmla.f32 q3, q7, q11\n"
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" bne 2b\n"
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"3:"
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" vadd.f32 q4, q0, q1\n"
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" vadd.f32 q5, q2, q3\n"
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" cmp %[remainder], #0\n"
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" vadd.f32 q0, q4, q5\n"
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" beq 5f\n"
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"4:"
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" vld1.32 {q6}, [%[b]]!\n"
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" vld1.32 {q10}, [%[a]]!\n"
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" subs %[remainder], %[remainder], #4\n"
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" vmla.f32 q0, q6, q10\n"
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" bne 4b\n"
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"5:"
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" vadd.f32 d0, d0, d1\n"
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" vpadd.f32 d0, d0, d0\n"
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" vmov.f32 %[ret], d0[0]\n"
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: [ret] "=&r" (ret), [a] "+r" (a), [b] "+r" (b),
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[len] "+l" (len), [remainder] "+l" (remainder)
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:
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: "cc", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", "q8",
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"q9", "q10", "q11");
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return ret;
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}
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#endif
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@ -11,6 +11,7 @@ set -e -x
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cp $1/libspeexdsp/resample.c src
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cp $1/libspeexdsp/resample_sse.h src
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cp $1/libspeexdsp/resample_neon.h src
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cp $1/libspeexdsp/arch.h src
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cp $1/libspeexdsp/stack_alloc.h src
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cp $1/libspeexdsp/fixed_generic.h src
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