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Bug 648862 - nanojit: Remove WINCE code. r=edwsmith,Jacob.Bramley.

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--HG--
extra : convert_revision : 37586d0b07857d871d1cc5184db25336bc0b8864
This commit is contained in:
Ed Morley 2011-05-18 10:38:17 +10:00
parent 611ccaee3f
commit 0df455e8fa
4 changed files with 4 additions and 119 deletions
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16
js/src/nanojit/CodeAlloc.cpp
View File

@ -252,18 +252,10 @@ namespace nanojit
}
}
#if defined NANOJIT_ARM && defined UNDER_CE
// Use a single flush for the whole CodeList, when we have no
// finer-granularity flush support, as on WinCE.
void CodeAlloc::flushICache(CodeList* &/*blocks*/) {
FlushInstructionCache(GetCurrentProcess(), NULL, NULL);
}
#else
void CodeAlloc::flushICache(CodeList* &blocks) {
for (CodeList *b = blocks; b != 0; b = b->next)
flushICache(b->start(), b->size());
}
#endif
#if defined(AVMPLUS_UNIX) && defined(NANOJIT_ARM)
#include <asm/unistd.h>
@ -302,14 +294,6 @@ extern "C" void sync_instruction_memory(caddr_t v, u_int len);
VALGRIND_DISCARD_TRANSLATIONS(start, len);
}
#elif defined NANOJIT_ARM && defined UNDER_CE
// On arm/winmo, just flush the whole icache. The
// WinCE docs indicate that this function actually ignores its
// 2nd and 3rd arguments, and wants them to be NULL.
void CodeAlloc::flushICache(void *, size_t) {
FlushInstructionCache(GetCurrentProcess(), NULL, NULL);
}
#elif defined NANOJIT_ARM && defined DARWIN
void CodeAlloc::flushICache(void *, size_t) {
VMPI_debugBreak();

73
js/src/nanojit/NativeARM.cpp
View File

@ -42,10 +42,6 @@
#include "nanojit.h"
#ifdef UNDER_CE
#include <cmnintrin.h>
#endif
#if defined(FEATURE_NANOJIT) && defined(NANOJIT_ARM)
namespace nanojit
@ -145,9 +141,6 @@ Assembler::CountLeadingZeroes(uint32_t data)
} else {
leading_zeroes = CountLeadingZeroesSlow(data);
}
#elif defined(UNDER_CE)
// WinCE can do this with an intrinsic.
leading_zeroes = _CountLeadingZeros(data);
#else
leading_zeroes = CountLeadingZeroesSlow(data);
#endif
@ -604,7 +597,8 @@ Assembler::genEpilogue()
* will update r and stkd as appropriate so that the next argument can be
* encoded.
*
* Linux has used ARM's EABI for some time. Windows CE uses the legacy ABI.
* Linux has used ARM's EABI for some time; support for the legacy ABI
* has now been removed.
*
* Under EABI:
* - doubles are 64-bit aligned both in registers and on the stack.
@ -616,14 +610,6 @@ Assembler::genEpilogue()
*
* Under EABI with hardware floating-point procedure-call variant:
* - Same as EABI, but doubles are passed in D0..D7 registers.
*
* Under legacy ABI:
* - doubles are placed in subsequent arg registers; if the next
* available register is r3, the low order word goes into r3
* and the high order goes on the stack.
* - 32-bit arguments are placed in the next available arg register,
* - both doubles and 32-bit arguments are placed on stack with 32-bit
* alignment.
*/
void
Assembler::asm_arg(ArgType ty, LIns* arg, ParameterRegisters& params)
@ -674,7 +660,6 @@ Assembler::asm_arg_64(LIns* arg, ParameterRegisters& params)
// is for LIR_ii2d.
NanoAssert(ARM_VFP || arg->isop(LIR_ii2d));
#ifdef NJ_ARM_EABI
// EABI requires that 64-bit arguments are aligned on even-numbered
// registers, as R0:R1 or R2:R3. If the register base is at an
// odd-numbered register, advance it. Note that this will push r past
@ -683,18 +668,15 @@ Assembler::asm_arg_64(LIns* arg, ParameterRegisters& params)
if ((params.r == R1) || (params.r == R3)) {
params.r = Register(params.r + 1);
}
#endif
if (params.r < R3) {
Register ra = params.r;
Register rb = Register(params.r + 1);
params.r = Register(rb + 1);
#ifdef NJ_ARM_EABI
// EABI requires that 64-bit arguments are aligned on even-numbered
// registers, as R0:R1 or R2:R3.
NanoAssert( ((ra == R0) && (rb == R1)) || ((ra == R2) && (rb == R3)) );
#endif
// Put the argument in ra and rb. If the argument is in a VFP register,
// use FMRRD to move it to ra and rb. Otherwise, let asm_regarg deal
@ -706,48 +688,14 @@ Assembler::asm_arg_64(LIns* arg, ParameterRegisters& params)
asm_regarg(ARGTYPE_I, arg->oprnd1(), ra);
asm_regarg(ARGTYPE_I, arg->oprnd2(), rb);
}
#ifndef NJ_ARM_EABI
} else if (params.r == R3) {
// We only have one register left, but the legacy ABI requires that we
// put 32 bits of the argument in the register (R3) and the remaining
// 32 bits on the stack.
Register ra = params.r; // R3
params.r = R4;
// We're splitting the argument between registers and the stack. This
// must be the first time that the stack is used, so stkd must be at 0.
NanoAssert(params.stkd == 0);
if (ARM_VFP) {
Register dm = findRegFor(arg, FpRegs);
// TODO: We could optimize the this to store directly from
// the VFP register to memory using "FMRRD ra, fp_reg[31:0]" and
// "STR fp_reg[63:32], [SP, #stkd]".
// Load from the floating-point register as usual, but use IP
// as a swap register.
STR(IP, SP, 0);
FMRRD(ra, IP, dm);
} else {
// Without VFP, we can simply use asm_regarg and asm_stkarg to
// encode the two 32-bit words as we don't need to load from a VFP
// register.
asm_regarg(ARGTYPE_I, arg->oprnd1(), ra);
asm_stkarg(arg->oprnd2(), 0);
}
params.stkd += 4;
#endif
} else {
// The argument won't fit in registers, so pass on to asm_stkarg.
#ifdef NJ_ARM_EABI
// EABI requires that 64-bit arguments are 64-bit aligned.
if ((params.stkd & 7) != 0) {
// stkd will always be aligned to at least 4 bytes; this was
// asserted on entry to this function.
params.stkd += 4;
}
#endif
if (ARM_VFP) {
asm_stkarg(arg, params.stkd);
} else {
@ -805,10 +753,8 @@ Assembler::asm_stkarg(LIns* arg, int stkd)
NanoAssert(arg->isD());
NanoAssert(ARM_VFP);
Register dt = findRegFor(arg, FpRegs);
#ifdef NJ_ARM_EABI
// EABI requires that 64-bit arguments are 64-bit aligned.
NanoAssert((stkd % 8) == 0);
#endif
FSTD(dt, SP, stkd);
}
}
@ -906,14 +852,7 @@ Assembler::asm_call(LIns* ins)
} else {
// Indirect call: we assign the address arg to LR
if (ARM_ARCH_AT_LEAST(5)) {
#ifndef UNDER_CE
// workaround for msft device emulator bug (blx lr emulated as no-op)
underrunProtect(8);
BLX(IP);
MOV(IP, LR);
#else
BLX(LR);
#endif
} else {
underrunProtect(12);
BX(IP);
@ -1668,8 +1607,7 @@ void Assembler::asm_inc_m32(uint32_t* pCtr)
// We need to temporarily free up two registers to do this, so
// just push r0 and r1 on the stack. This assumes that the area
// at r13 - 8 .. r13 - 1 isn't being used for anything else at
// this point. This guaranteed us by the EABI; although the
// situation with the legacy ABI I'm not sure of.
// this point (this is guaranteed by the EABI).
//
// Plan: emit the following bit of code. It's not efficient, but
// this is for profiling debug builds only, and is self contained,
@ -1844,11 +1782,6 @@ Assembler::BLX(Register addr, bool chk /* = true */)
NanoAssert(ARM_ARCH_AT_LEAST(5));
NanoAssert(IsGpReg(addr));
#ifdef UNDER_CE
// There is a bug in the WinCE device emulator which stops "BLX LR" from
// working as expected. Assert that we never do that!
NanoAssert(addr != LR);
#endif
if (chk) {
underrunProtect(4);

7
js/src/nanojit/NativeARM.h
View File

@ -69,12 +69,6 @@
namespace nanojit
{
#if defined VMCFG_DOUBLE_MSW_FIRST || defined _MSC_VER
# undef NJ_ARM_EABI
#else
# define NJ_ARM_EABI 1
#endif
// GCC defines __ARM_PCS_VFP if it uses hardware floating point ABI
// See http://gcc.gnu.org/viewcvs?view=revision&revision=162637
#ifdef __ARM_PCS_VFP
@ -153,7 +147,6 @@ static const Register
SBZ = { 0 } ; // Used for 'should-be-zero' fields in instructions with
// unused register fields.
/* winmo builds error with C2057 and C2229 on usage of First/LastRegNum as R0/D7 */
static const uint32_t FirstRegNum = 0; /* R0 */
static const uint32_t LastRegNum = 23; /* D7 */
}

27
js/src/nanojit/avmplus.cpp
View File

@ -72,32 +72,7 @@ namespace avmplus {
}
#endif
#ifdef WINCE
// Due to the per-process heap slots on Windows Mobile, we can often run in to OOM
// situations. jemalloc has worked around this problem, and so we use it here.
// Using posix_memalign (or other malloc)functions) here only works because the OS
// and hardware doesn't check for the execute bit being set.
#ifndef MOZ_MEMORY
#error MOZ_MEMORY required for building on WINCE
#endif
void*
nanojit::CodeAlloc::allocCodeChunk(size_t nbytes) {
void * buffer;
posix_memalign(&buffer, 4096, nbytes);
VMPI_setPageProtection(buffer, nbytes, true /* exec */, true /* write */);
return buffer;
}
void
nanojit::CodeAlloc::freeCodeChunk(void *p, size_t nbytes) {
VMPI_setPageProtection(p, nbytes, false /* exec */, true /* write */);
::free(p);
}
#elif defined(WIN32)
#if defined(WIN32)
void*
nanojit::CodeAlloc::allocCodeChunk(size_t nbytes) {