mirror of
https://gitlab.winehq.org/wine/wine-gecko.git
synced 2024-09-13 09:24:08 -07:00
Bug 858022 - Fix baseline compiler crashes on hardware without SSE2. r=dvander
This commit is contained in:
parent
210f563736
commit
03dc58891f
@ -14,5 +14,9 @@
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using namespace JSC;
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using namespace JSC;
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MacroAssemblerX86Common::SSECheckState MacroAssemblerX86Common::s_sseCheckState = NotCheckedSSE;
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MacroAssemblerX86Common::SSECheckState MacroAssemblerX86Common::s_sseCheckState = NotCheckedSSE;
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#ifdef DEBUG
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bool MacroAssemblerX86Common::s_floatingPointDisabled = false;
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#endif
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#endif /* WTF_CPU_X86 || WTF_CPU_X86_64 */
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#endif /* WTF_CPU_X86 || WTF_CPU_X86_64 */
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@ -1374,6 +1374,15 @@ private:
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);
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);
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#endif
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#endif
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#endif
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#endif
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#ifdef DEBUG
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if (s_floatingPointDisabled) {
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// Disable SSE2.
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s_sseCheckState = HasSSE;
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return;
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}
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#endif
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static const int SSEFeatureBit = 1 << 25;
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static const int SSEFeatureBit = 1 << 25;
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static const int SSE2FeatureBit = 1 << 26;
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static const int SSE2FeatureBit = 1 << 26;
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static const int SSE3FeatureBit = 1 << 0;
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static const int SSE3FeatureBit = 1 << 0;
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@ -1407,6 +1416,10 @@ private:
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static bool isSSE2Present()
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static bool isSSE2Present()
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{
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{
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#ifdef DEBUG
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if (s_floatingPointDisabled)
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return false;
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#endif
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return true;
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return true;
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}
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}
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@ -1489,6 +1502,15 @@ private:
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return s_sseCheckState >= HasSSE4_2;
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return s_sseCheckState >= HasSSE4_2;
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}
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}
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#ifdef DEBUG
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static bool s_floatingPointDisabled;
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public:
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static void SetFloatingPointDisabled() {
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s_floatingPointDisabled = true;
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}
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#endif
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};
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};
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} // namespace JSC
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} // namespace JSC
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@ -1662,6 +1662,9 @@ DoCompareFallback(JSContext *cx, BaselineFrame *frame, ICCompare_Fallback *stub,
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return true;
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return true;
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}
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}
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if (!cx->runtime->jitSupportsFloatingPoint && (lhs.isNumber() || rhs.isNumber()))
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return true;
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if (lhs.isNumber() && rhs.isNumber()) {
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if (lhs.isNumber() && rhs.isNumber()) {
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IonSpew(IonSpew_BaselineIC, " Generating %s(Number, Number) stub", js_CodeName[op]);
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IonSpew(IonSpew_BaselineIC, " Generating %s(Number, Number) stub", js_CodeName[op]);
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@ -2070,7 +2073,7 @@ DoToBoolFallback(JSContext *cx, BaselineFrame *frame, ICToBool_Fallback *stub, H
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return true;
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return true;
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}
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}
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if (arg.isDouble()) {
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if (arg.isDouble() && cx->runtime->jitSupportsFloatingPoint) {
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IonSpew(IonSpew_BaselineIC, " Generating ToBool(Double) stub.");
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IonSpew(IonSpew_BaselineIC, " Generating ToBool(Double) stub.");
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ICToBool_Double::Compiler compiler(cx);
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ICToBool_Double::Compiler compiler(cx);
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ICStub *doubleStub = compiler.getStub(compiler.getStubSpace(script));
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ICStub *doubleStub = compiler.getStub(compiler.getStubSpace(script));
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@ -2456,6 +2459,9 @@ DoBinaryArithFallback(JSContext *cx, BaselineFrame *frame, ICBinaryArith_Fallbac
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JS_ASSERT(ret.isNumber());
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JS_ASSERT(ret.isNumber());
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if (lhs.isDouble() || rhs.isDouble() || ret.isDouble()) {
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if (lhs.isDouble() || rhs.isDouble() || ret.isDouble()) {
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if (!cx->runtime->jitSupportsFloatingPoint)
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return true;
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switch (op) {
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switch (op) {
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case JSOP_ADD:
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case JSOP_ADD:
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case JSOP_SUB:
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case JSOP_SUB:
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@ -2912,7 +2918,10 @@ DoUnaryArithFallback(JSContext *cx, BaselineFrame *frame, ICUnaryArith_Fallback
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return true;
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return true;
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}
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}
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if (val.isNumber() && res.isNumber() && op == JSOP_NEG) {
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if (val.isNumber() && res.isNumber() &&
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op == JSOP_NEG &&
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cx->runtime->jitSupportsFloatingPoint)
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{
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IonSpew(IonSpew_BaselineIC, " Generating %s(Number => Number) stub", js_CodeName[op]);
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IonSpew(IonSpew_BaselineIC, " Generating %s(Number => Number) stub", js_CodeName[op]);
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// Unlink int32 stubs, the double stub handles both cases and TI specializes for both.
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// Unlink int32 stubs, the double stub handles both cases and TI specializes for both.
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stub->unlinkStubsWithKind(cx, ICStub::UnaryArith_Int32);
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stub->unlinkStubsWithKind(cx, ICStub::UnaryArith_Int32);
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@ -3255,6 +3264,15 @@ static bool TryAttachNativeGetElemStub(JSContext *cx, HandleScript script,
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return true;
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return true;
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}
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}
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static bool
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TypedArrayRequiresFloatingPoint(JSObject *obj)
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{
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uint32_t type = TypedArray::type(obj);
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return (type == TypedArray::TYPE_UINT32 ||
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type == TypedArray::TYPE_FLOAT32 ||
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type == TypedArray::TYPE_FLOAT64);
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}
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static bool
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static bool
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TryAttachGetElemStub(JSContext *cx, HandleScript script, ICGetElem_Fallback *stub,
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TryAttachGetElemStub(JSContext *cx, HandleScript script, ICGetElem_Fallback *stub,
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HandleValue lhs, HandleValue rhs, HandleValue res)
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HandleValue lhs, HandleValue rhs, HandleValue res)
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@ -3303,6 +3321,9 @@ TryAttachGetElemStub(JSContext *cx, HandleScript script, ICGetElem_Fallback *stu
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if (obj->isTypedArray() && rhs.isInt32() && res.isNumber() &&
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if (obj->isTypedArray() && rhs.isInt32() && res.isNumber() &&
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!TypedArrayGetElemStubExists(stub, obj))
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!TypedArrayGetElemStubExists(stub, obj))
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{
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{
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if (!cx->runtime->jitSupportsFloatingPoint && TypedArrayRequiresFloatingPoint(obj))
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return true;
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IonSpew(IonSpew_BaselineIC, " Generating GetElem(TypedArray[Int32]) stub");
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IonSpew(IonSpew_BaselineIC, " Generating GetElem(TypedArray[Int32]) stub");
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ICGetElem_TypedArray::Compiler compiler(cx, obj->lastProperty(), TypedArray::type(obj));
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ICGetElem_TypedArray::Compiler compiler(cx, obj->lastProperty(), TypedArray::type(obj));
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ICStub *typedArrayStub = compiler.getStub(compiler.getStubSpace(script));
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ICStub *typedArrayStub = compiler.getStub(compiler.getStubSpace(script));
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@ -3828,6 +3849,9 @@ DoSetElemFallback(JSContext *cx, BaselineFrame *frame, ICSetElem_Fallback *stub,
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}
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}
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if (obj->isTypedArray() && index.isInt32() && rhs.isNumber()) {
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if (obj->isTypedArray() && index.isInt32() && rhs.isNumber()) {
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if (!cx->runtime->jitSupportsFloatingPoint && TypedArrayRequiresFloatingPoint(obj))
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return true;
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uint32_t len = TypedArray::length(obj);
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uint32_t len = TypedArray::length(obj);
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int32_t idx = index.toInt32();
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int32_t idx = index.toInt32();
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bool expectOutOfBounds = (idx < 0) || (static_cast<uint32_t>(idx) >= len);
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bool expectOutOfBounds = (idx < 0) || (static_cast<uint32_t>(idx) >= len);
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@ -3980,9 +4004,14 @@ ICSetElem_Dense::Compiler::generateStubCode(MacroAssembler &masm)
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masm.storeValue(R0, element);
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masm.storeValue(R0, element);
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EmitReturnFromIC(masm);
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EmitReturnFromIC(masm);
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// Convert to double and jump back.
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// Convert to double and jump back. Note that double arrays are only
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// created by IonMonkey, so if we have no floating-point support
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// Ion is disabled and there should be no double arrays.
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masm.bind(&convertDoubles);
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masm.bind(&convertDoubles);
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if (cx->runtime->jitSupportsFloatingPoint)
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masm.convertInt32ValueToDouble(valueAddr, R0.scratchReg(), &convertDoublesDone);
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masm.convertInt32ValueToDouble(valueAddr, R0.scratchReg(), &convertDoublesDone);
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else
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masm.breakpoint();
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masm.jump(&convertDoublesDone);
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masm.jump(&convertDoublesDone);
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// Failure case - fail but first unstow R0 and R1
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// Failure case - fail but first unstow R0 and R1
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@ -4143,9 +4172,14 @@ ICSetElemDenseAddCompiler::generateStubCode(MacroAssembler &masm)
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masm.storeValue(R0, element);
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masm.storeValue(R0, element);
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EmitReturnFromIC(masm);
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EmitReturnFromIC(masm);
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// Convert to double and jump back.
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// Convert to double and jump back. Note that double arrays are only
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// created by IonMonkey, so if we have no floating-point support
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// Ion is disabled and there should be no double arrays.
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masm.bind(&convertDoubles);
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masm.bind(&convertDoubles);
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if (cx->runtime->jitSupportsFloatingPoint)
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masm.convertInt32ValueToDouble(valueAddr, R0.scratchReg(), &convertDoublesDone);
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masm.convertInt32ValueToDouble(valueAddr, R0.scratchReg(), &convertDoublesDone);
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else
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masm.breakpoint();
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masm.jump(&convertDoublesDone);
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masm.jump(&convertDoublesDone);
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// Failure case - fail but first unstow R0 and R1
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// Failure case - fail but first unstow R0 and R1
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@ -4218,10 +4252,14 @@ ICSetElem_TypedArray::Compiler::generateStubCode(MacroAssembler &masm)
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// If the value is a double, clamp to uint8 and jump back.
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// If the value is a double, clamp to uint8 and jump back.
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// Else, jump to failure.
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// Else, jump to failure.
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masm.bind(¬Int32);
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masm.bind(¬Int32);
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if (cx->runtime->jitSupportsFloatingPoint) {
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masm.branchTestDouble(Assembler::NotEqual, value, &failure);
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masm.branchTestDouble(Assembler::NotEqual, value, &failure);
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masm.unboxDouble(value, FloatReg0);
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masm.unboxDouble(value, FloatReg0);
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masm.clampDoubleToUint8(FloatReg0, secondScratch);
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masm.clampDoubleToUint8(FloatReg0, secondScratch);
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masm.jump(&clamped);
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masm.jump(&clamped);
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} else {
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masm.jump(&failure);
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}
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} else {
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} else {
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Label notInt32;
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Label notInt32;
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masm.branchTestInt32(Assembler::NotEqual, value, ¬Int32);
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masm.branchTestInt32(Assembler::NotEqual, value, ¬Int32);
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@ -4236,10 +4274,14 @@ ICSetElem_TypedArray::Compiler::generateStubCode(MacroAssembler &masm)
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// Else, jump to failure.
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// Else, jump to failure.
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Label failureRestoreRegs;
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Label failureRestoreRegs;
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masm.bind(¬Int32);
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masm.bind(¬Int32);
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if (cx->runtime->jitSupportsFloatingPoint) {
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masm.branchTestDouble(Assembler::NotEqual, value, &failure);
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masm.branchTestDouble(Assembler::NotEqual, value, &failure);
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masm.unboxDouble(value, FloatReg0);
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masm.unboxDouble(value, FloatReg0);
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masm.branchTruncateDouble(FloatReg0, secondScratch, &failureRestoreRegs);
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masm.branchTruncateDouble(FloatReg0, secondScratch, &failureRestoreRegs);
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masm.jump(&isInt32);
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masm.jump(&isInt32);
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} else {
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masm.jump(&failure);
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}
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// Writing to secondScratch may have clobbered R0 or R1, restore them
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// Writing to secondScratch may have clobbered R0 or R1, restore them
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// first.
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// first.
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@ -6511,6 +6553,18 @@ ICCall_Native::Compiler::generateStubCode(MacroAssembler &masm)
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return true;
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return true;
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}
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}
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static JSBool
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DoubleValueToInt32ForSwitch(Value *v)
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{
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double d = v->toDouble();
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int32_t truncated = int32_t(d);
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if (d != double(truncated))
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return false;
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v->setInt32(truncated);
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return true;
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}
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bool
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bool
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ICTableSwitch::Compiler::generateStubCode(MacroAssembler &masm)
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ICTableSwitch::Compiler::generateStubCode(MacroAssembler &masm)
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{
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{
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@ -6537,10 +6591,27 @@ ICTableSwitch::Compiler::generateStubCode(MacroAssembler &masm)
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masm.bind(¬Int32);
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masm.bind(¬Int32);
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masm.branchTestDouble(Assembler::NotEqual, R0, &outOfRange);
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masm.branchTestDouble(Assembler::NotEqual, R0, &outOfRange);
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if (cx->runtime->jitSupportsFloatingPoint) {
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masm.unboxDouble(R0, FloatReg0);
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masm.unboxDouble(R0, FloatReg0);
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// N.B. -0 === 0, so convert -0 to a 0 int32.
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// N.B. -0 === 0, so convert -0 to a 0 int32.
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masm.convertDoubleToInt32(FloatReg0, key, &outOfRange, /* negativeZeroCheck = */ false);
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masm.convertDoubleToInt32(FloatReg0, key, &outOfRange, /* negativeZeroCheck = */ false);
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} else {
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// Pass pointer to double value.
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masm.pushValue(R0);
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masm.movePtr(StackPointer, R0.scratchReg());
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masm.setupUnalignedABICall(1, scratch);
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masm.passABIArg(R0.scratchReg());
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masm.callWithABI(JS_FUNC_TO_DATA_PTR(void *, DoubleValueToInt32ForSwitch));
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// If the function returns |true|, the value has been converted to
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// int32.
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masm.mov(ReturnReg, scratch);
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masm.popValue(R0);
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masm.branchTest32(Assembler::Zero, scratch, scratch, &outOfRange);
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masm.unboxInt32(R0, key);
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}
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masm.jump(&isInt32);
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masm.jump(&isInt32);
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masm.bind(&outOfRange);
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masm.bind(&outOfRange);
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@ -249,7 +249,8 @@ struct BaselineScript
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}
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}
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};
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};
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inline bool IsBaselineEnabled(JSContext *cx)
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inline bool
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IsBaselineEnabled(JSContext *cx)
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{
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{
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return cx->hasOption(JSOPTION_BASELINE);
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return cx->hasOption(JSOPTION_BASELINE);
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}
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}
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@ -198,6 +198,8 @@ IonRuntime::initialize(JSContext *cx)
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if (!functionWrappers_ || !functionWrappers_->init())
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if (!functionWrappers_ || !functionWrappers_->init())
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return false;
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return false;
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if (cx->runtime->jitSupportsFloatingPoint) {
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// Initialize some Ion-only stubs that require floating-point support.
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if (!bailoutTables_.reserve(FrameSizeClass::ClassLimit().classId()))
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if (!bailoutTables_.reserve(FrameSizeClass::ClassLimit().classId()))
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return false;
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return false;
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@ -215,6 +217,11 @@ IonRuntime::initialize(JSContext *cx)
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if (!bailoutHandler_)
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if (!bailoutHandler_)
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return false;
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return false;
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invalidator_ = generateInvalidator(cx);
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if (!invalidator_)
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return false;
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}
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argumentsRectifier_ = generateArgumentsRectifier(cx, SequentialExecution, &argumentsRectifierReturnAddr_);
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argumentsRectifier_ = generateArgumentsRectifier(cx, SequentialExecution, &argumentsRectifierReturnAddr_);
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if (!argumentsRectifier_)
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if (!argumentsRectifier_)
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return false;
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return false;
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@ -225,10 +232,6 @@ IonRuntime::initialize(JSContext *cx)
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return false;
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return false;
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#endif
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#endif
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invalidator_ = generateInvalidator(cx);
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if (!invalidator_)
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return false;
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enterJIT_ = generateEnterJIT(cx, EnterJitOptimized);
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enterJIT_ = generateEnterJIT(cx, EnterJitOptimized);
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if (!enterJIT_)
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if (!enterJIT_)
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return false;
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return false;
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@ -278,9 +278,11 @@ class AssemblerX86Shared
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}
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}
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void movsd(const FloatRegister &src, const FloatRegister &dest) {
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void movsd(const FloatRegister &src, const FloatRegister &dest) {
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JS_ASSERT(HasSSE2());
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masm.movsd_rr(src.code(), dest.code());
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masm.movsd_rr(src.code(), dest.code());
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}
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}
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void movsd(const Operand &src, const FloatRegister &dest) {
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void movsd(const Operand &src, const FloatRegister &dest) {
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JS_ASSERT(HasSSE2());
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switch (src.kind()) {
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switch (src.kind()) {
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||||||
case Operand::FPREG:
|
case Operand::FPREG:
|
||||||
masm.movsd_rr(src.fpu(), dest.code());
|
masm.movsd_rr(src.fpu(), dest.code());
|
||||||
@ -296,6 +298,7 @@ class AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
void movsd(const FloatRegister &src, const Operand &dest) {
|
void movsd(const FloatRegister &src, const Operand &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
switch (dest.kind()) {
|
switch (dest.kind()) {
|
||||||
case Operand::FPREG:
|
case Operand::FPREG:
|
||||||
masm.movsd_rr(src.code(), dest.fpu());
|
masm.movsd_rr(src.code(), dest.fpu());
|
||||||
@ -311,6 +314,7 @@ class AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
void movss(const Operand &src, const FloatRegister &dest) {
|
void movss(const Operand &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
switch (src.kind()) {
|
switch (src.kind()) {
|
||||||
case Operand::REG_DISP:
|
case Operand::REG_DISP:
|
||||||
masm.movss_mr(src.disp(), src.base(), dest.code());
|
masm.movss_mr(src.disp(), src.base(), dest.code());
|
||||||
@ -323,6 +327,7 @@ class AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
void movss(const FloatRegister &src, const Operand &dest) {
|
void movss(const FloatRegister &src, const Operand &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
switch (dest.kind()) {
|
switch (dest.kind()) {
|
||||||
case Operand::REG_DISP:
|
case Operand::REG_DISP:
|
||||||
masm.movss_rm(src.code(), dest.disp(), dest.base());
|
masm.movss_rm(src.code(), dest.disp(), dest.base());
|
||||||
@ -335,6 +340,7 @@ class AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
void movdqa(const Operand &src, const FloatRegister &dest) {
|
void movdqa(const Operand &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
switch (src.kind()) {
|
switch (src.kind()) {
|
||||||
case Operand::REG_DISP:
|
case Operand::REG_DISP:
|
||||||
masm.movdqa_mr(src.disp(), src.base(), dest.code());
|
masm.movdqa_mr(src.disp(), src.base(), dest.code());
|
||||||
@ -347,6 +353,7 @@ class AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
void movdqa(const FloatRegister &src, const Operand &dest) {
|
void movdqa(const FloatRegister &src, const Operand &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
switch (dest.kind()) {
|
switch (dest.kind()) {
|
||||||
case Operand::REG_DISP:
|
case Operand::REG_DISP:
|
||||||
masm.movdqa_rm(src.code(), dest.disp(), dest.base());
|
masm.movdqa_rm(src.code(), dest.disp(), dest.base());
|
||||||
@ -359,9 +366,11 @@ class AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
void cvtss2sd(const FloatRegister &src, const FloatRegister &dest) {
|
void cvtss2sd(const FloatRegister &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.cvtss2sd_rr(src.code(), dest.code());
|
masm.cvtss2sd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void cvtsd2ss(const FloatRegister &src, const FloatRegister &dest) {
|
void cvtsd2ss(const FloatRegister &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.cvtsd2ss_rr(src.code(), dest.code());
|
masm.cvtsd2ss_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void movzbl(const Operand &src, const Register &dest) {
|
void movzbl(const Operand &src, const Register &dest) {
|
||||||
@ -655,6 +664,9 @@ class AssemblerX86Shared
|
|||||||
masm.int3();
|
masm.int3();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static bool HasSSE2() {
|
||||||
|
return JSC::MacroAssembler::getSSEState() >= JSC::MacroAssembler::HasSSE2;
|
||||||
|
}
|
||||||
static bool HasSSE41() {
|
static bool HasSSE41() {
|
||||||
return JSC::MacroAssembler::getSSEState() >= JSC::MacroAssembler::HasSSE4_1;
|
return JSC::MacroAssembler::getSSEState() >= JSC::MacroAssembler::HasSSE4_1;
|
||||||
}
|
}
|
||||||
@ -1052,12 +1064,15 @@ class AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
|
|
||||||
void unpcklps(const FloatRegister &src, const FloatRegister &dest) {
|
void unpcklps(const FloatRegister &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.unpcklps_rr(src.code(), dest.code());
|
masm.unpcklps_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void pinsrd(const Register &src, const FloatRegister &dest) {
|
void pinsrd(const Register &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.pinsrd_rr(src.code(), dest.code());
|
masm.pinsrd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void pinsrd(const Operand &src, const FloatRegister &dest) {
|
void pinsrd(const Operand &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
switch (src.kind()) {
|
switch (src.kind()) {
|
||||||
case Operand::REG:
|
case Operand::REG:
|
||||||
masm.pinsrd_rr(src.reg(), dest.code());
|
masm.pinsrd_rr(src.reg(), dest.code());
|
||||||
@ -1070,16 +1085,20 @@ class AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
void psrldq(Imm32 shift, const FloatRegister &dest) {
|
void psrldq(Imm32 shift, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.psrldq_rr(dest.code(), shift.value);
|
masm.psrldq_rr(dest.code(), shift.value);
|
||||||
}
|
}
|
||||||
void psllq(Imm32 shift, const FloatRegister &dest) {
|
void psllq(Imm32 shift, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.psllq_rr(dest.code(), shift.value);
|
masm.psllq_rr(dest.code(), shift.value);
|
||||||
}
|
}
|
||||||
void psrlq(Imm32 shift, const FloatRegister &dest) {
|
void psrlq(Imm32 shift, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.psrlq_rr(dest.code(), shift.value);
|
masm.psrlq_rr(dest.code(), shift.value);
|
||||||
}
|
}
|
||||||
|
|
||||||
void cvtsi2sd(const Operand &src, const FloatRegister &dest) {
|
void cvtsi2sd(const Operand &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
switch (src.kind()) {
|
switch (src.kind()) {
|
||||||
case Operand::REG:
|
case Operand::REG:
|
||||||
masm.cvtsi2sd_rr(src.reg(), dest.code());
|
masm.cvtsi2sd_rr(src.reg(), dest.code());
|
||||||
@ -1095,12 +1114,15 @@ class AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
void cvttsd2si(const FloatRegister &src, const Register &dest) {
|
void cvttsd2si(const FloatRegister &src, const Register &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.cvttsd2si_rr(src.code(), dest.code());
|
masm.cvttsd2si_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void cvtsi2sd(const Register &src, const FloatRegister &dest) {
|
void cvtsi2sd(const Register &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.cvtsi2sd_rr(src.code(), dest.code());
|
masm.cvtsi2sd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void movmskpd(const FloatRegister &src, const Register &dest) {
|
void movmskpd(const FloatRegister &src, const Register &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.movmskpd_rr(src.code(), dest.code());
|
masm.movmskpd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void ptest(const FloatRegister &lhs, const FloatRegister &rhs) {
|
void ptest(const FloatRegister &lhs, const FloatRegister &rhs) {
|
||||||
@ -1108,21 +1130,27 @@ class AssemblerX86Shared
|
|||||||
masm.ptest_rr(rhs.code(), lhs.code());
|
masm.ptest_rr(rhs.code(), lhs.code());
|
||||||
}
|
}
|
||||||
void ucomisd(const FloatRegister &lhs, const FloatRegister &rhs) {
|
void ucomisd(const FloatRegister &lhs, const FloatRegister &rhs) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.ucomisd_rr(rhs.code(), lhs.code());
|
masm.ucomisd_rr(rhs.code(), lhs.code());
|
||||||
}
|
}
|
||||||
void pcmpeqw(const FloatRegister &lhs, const FloatRegister &rhs) {
|
void pcmpeqw(const FloatRegister &lhs, const FloatRegister &rhs) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.pcmpeqw_rr(rhs.code(), lhs.code());
|
masm.pcmpeqw_rr(rhs.code(), lhs.code());
|
||||||
}
|
}
|
||||||
void movd(const Register &src, const FloatRegister &dest) {
|
void movd(const Register &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.movd_rr(src.code(), dest.code());
|
masm.movd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void movd(const FloatRegister &src, const Register &dest) {
|
void movd(const FloatRegister &src, const Register &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.movd_rr(src.code(), dest.code());
|
masm.movd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void addsd(const FloatRegister &src, const FloatRegister &dest) {
|
void addsd(const FloatRegister &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.addsd_rr(src.code(), dest.code());
|
masm.addsd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void addsd(const Operand &src, const FloatRegister &dest) {
|
void addsd(const Operand &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
switch (src.kind()) {
|
switch (src.kind()) {
|
||||||
case Operand::FPREG:
|
case Operand::FPREG:
|
||||||
masm.addsd_rr(src.fpu(), dest.code());
|
masm.addsd_rr(src.fpu(), dest.code());
|
||||||
@ -1140,9 +1168,11 @@ class AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
void subsd(const FloatRegister &src, const FloatRegister &dest) {
|
void subsd(const FloatRegister &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.subsd_rr(src.code(), dest.code());
|
masm.subsd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void subsd(const Operand &src, const FloatRegister &dest) {
|
void subsd(const Operand &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
switch (src.kind()) {
|
switch (src.kind()) {
|
||||||
case Operand::FPREG:
|
case Operand::FPREG:
|
||||||
masm.subsd_rr(src.fpu(), dest.code());
|
masm.subsd_rr(src.fpu(), dest.code());
|
||||||
@ -1155,9 +1185,11 @@ class AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
void mulsd(const FloatRegister &src, const FloatRegister &dest) {
|
void mulsd(const FloatRegister &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.mulsd_rr(src.code(), dest.code());
|
masm.mulsd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void mulsd(const Operand &src, const FloatRegister &dest) {
|
void mulsd(const Operand &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
switch (src.kind()) {
|
switch (src.kind()) {
|
||||||
case Operand::FPREG:
|
case Operand::FPREG:
|
||||||
masm.mulsd_rr(src.fpu(), dest.code());
|
masm.mulsd_rr(src.fpu(), dest.code());
|
||||||
@ -1170,9 +1202,11 @@ class AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
void divsd(const FloatRegister &src, const FloatRegister &dest) {
|
void divsd(const FloatRegister &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.divsd_rr(src.code(), dest.code());
|
masm.divsd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void divsd(const Operand &src, const FloatRegister &dest) {
|
void divsd(const Operand &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
switch (src.kind()) {
|
switch (src.kind()) {
|
||||||
case Operand::FPREG:
|
case Operand::FPREG:
|
||||||
masm.divsd_rr(src.fpu(), dest.code());
|
masm.divsd_rr(src.fpu(), dest.code());
|
||||||
@ -1185,20 +1219,25 @@ class AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
void xorpd(const FloatRegister &src, const FloatRegister &dest) {
|
void xorpd(const FloatRegister &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.xorpd_rr(src.code(), dest.code());
|
masm.xorpd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void orpd(const FloatRegister &src, const FloatRegister &dest) {
|
void orpd(const FloatRegister &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.orpd_rr(src.code(), dest.code());
|
masm.orpd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void andpd(const FloatRegister &src, const FloatRegister &dest) {
|
void andpd(const FloatRegister &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.andpd_rr(src.code(), dest.code());
|
masm.andpd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void sqrtsd(const FloatRegister &src, const FloatRegister &dest) {
|
void sqrtsd(const FloatRegister &src, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.sqrtsd_rr(src.code(), dest.code());
|
masm.sqrtsd_rr(src.code(), dest.code());
|
||||||
}
|
}
|
||||||
void roundsd(const FloatRegister &src, const FloatRegister &dest,
|
void roundsd(const FloatRegister &src, const FloatRegister &dest,
|
||||||
JSC::X86Assembler::RoundingMode mode)
|
JSC::X86Assembler::RoundingMode mode)
|
||||||
{
|
{
|
||||||
|
JS_ASSERT(HasSSE41());
|
||||||
masm.roundsd_rr(src.code(), dest.code(), mode);
|
masm.roundsd_rr(src.code(), dest.code(), mode);
|
||||||
}
|
}
|
||||||
void fstp(const Operand &src) {
|
void fstp(const Operand &src) {
|
||||||
|
@ -432,6 +432,7 @@ class Assembler : public AssemblerX86Shared
|
|||||||
}
|
}
|
||||||
|
|
||||||
void movsd(const double *dp, const FloatRegister &dest) {
|
void movsd(const double *dp, const FloatRegister &dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.movsd_mr((const void *)dp, dest.code());
|
masm.movsd_mr((const void *)dp, dest.code());
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -448,6 +449,7 @@ class Assembler : public AssemblerX86Shared
|
|||||||
return masm.currentOffset();
|
return masm.currentOffset();
|
||||||
}
|
}
|
||||||
CodeOffsetLabel movsdWithPatch(void *addr, FloatRegister dest) {
|
CodeOffsetLabel movsdWithPatch(void *addr, FloatRegister dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.movsd_mr(addr, dest.code());
|
masm.movsd_mr(addr, dest.code());
|
||||||
return masm.currentOffset();
|
return masm.currentOffset();
|
||||||
}
|
}
|
||||||
@ -458,6 +460,7 @@ class Assembler : public AssemblerX86Shared
|
|||||||
return masm.currentOffset();
|
return masm.currentOffset();
|
||||||
}
|
}
|
||||||
CodeOffsetLabel movsdWithPatch(FloatRegister dest, void *addr) {
|
CodeOffsetLabel movsdWithPatch(FloatRegister dest, void *addr) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.movsd_rm(dest.code(), addr);
|
masm.movsd_rm(dest.code(), addr);
|
||||||
return masm.currentOffset();
|
return masm.currentOffset();
|
||||||
}
|
}
|
||||||
@ -484,10 +487,12 @@ class Assembler : public AssemblerX86Shared
|
|||||||
return masm.currentOffset();
|
return masm.currentOffset();
|
||||||
}
|
}
|
||||||
CodeOffsetLabel movssWithPatch(Address src, FloatRegister dest) {
|
CodeOffsetLabel movssWithPatch(Address src, FloatRegister dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.movss_mr_disp32(src.offset, src.base.code(), dest.code());
|
masm.movss_mr_disp32(src.offset, src.base.code(), dest.code());
|
||||||
return masm.currentOffset();
|
return masm.currentOffset();
|
||||||
}
|
}
|
||||||
CodeOffsetLabel movsdWithPatch(Address src, FloatRegister dest) {
|
CodeOffsetLabel movsdWithPatch(Address src, FloatRegister dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.movsd_mr_disp32(src.offset, src.base.code(), dest.code());
|
masm.movsd_mr_disp32(src.offset, src.base.code(), dest.code());
|
||||||
return masm.currentOffset();
|
return masm.currentOffset();
|
||||||
}
|
}
|
||||||
@ -506,10 +511,12 @@ class Assembler : public AssemblerX86Shared
|
|||||||
return masm.currentOffset();
|
return masm.currentOffset();
|
||||||
}
|
}
|
||||||
CodeOffsetLabel movssWithPatch(FloatRegister src, Address dest) {
|
CodeOffsetLabel movssWithPatch(FloatRegister src, Address dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.movss_rm_disp32(src.code(), dest.offset, dest.base.code());
|
masm.movss_rm_disp32(src.code(), dest.offset, dest.base.code());
|
||||||
return masm.currentOffset();
|
return masm.currentOffset();
|
||||||
}
|
}
|
||||||
CodeOffsetLabel movsdWithPatch(FloatRegister src, Address dest) {
|
CodeOffsetLabel movsdWithPatch(FloatRegister src, Address dest) {
|
||||||
|
JS_ASSERT(HasSSE2());
|
||||||
masm.movsd_rm_disp32(src.code(), dest.offset, dest.base.code());
|
masm.movsd_rm_disp32(src.code(), dest.offset, dest.base.code());
|
||||||
return masm.currentOffset();
|
return masm.currentOffset();
|
||||||
}
|
}
|
||||||
|
@ -665,8 +665,14 @@ IonRuntime::generatePreBarrier(JSContext *cx, MIRType type)
|
|||||||
{
|
{
|
||||||
MacroAssembler masm;
|
MacroAssembler masm;
|
||||||
|
|
||||||
RegisterSet save = RegisterSet(GeneralRegisterSet(Registers::VolatileMask),
|
RegisterSet save;
|
||||||
|
if (cx->runtime->jitSupportsFloatingPoint) {
|
||||||
|
save = RegisterSet(GeneralRegisterSet(Registers::VolatileMask),
|
||||||
FloatRegisterSet(FloatRegisters::VolatileMask));
|
FloatRegisterSet(FloatRegisters::VolatileMask));
|
||||||
|
} else {
|
||||||
|
save = RegisterSet(GeneralRegisterSet(Registers::VolatileMask),
|
||||||
|
FloatRegisterSet());
|
||||||
|
}
|
||||||
masm.PushRegsInMask(save);
|
masm.PushRegsInMask(save);
|
||||||
|
|
||||||
JS_ASSERT(PreBarrierReg == edx);
|
JS_ASSERT(PreBarrierReg == edx);
|
||||||
|
@ -147,7 +147,7 @@ def main(argv):
|
|||||||
['--no-baseline'],
|
['--no-baseline'],
|
||||||
['--no-baseline', '--ion-eager'],
|
['--no-baseline', '--ion-eager'],
|
||||||
['--baseline-eager'],
|
['--baseline-eager'],
|
||||||
['--baseline-eager', '--no-ti'],
|
['--baseline-eager', '--no-ti', '--no-fpu'],
|
||||||
# Below, equivalents the old shell flags: ,m,am,amd,n,mn,amn,amdn,mdn
|
# Below, equivalents the old shell flags: ,m,am,amd,n,mn,amn,amdn,mdn
|
||||||
['--no-baseline', '--no-ion', '--no-jm', '--no-ti'],
|
['--no-baseline', '--no-ion', '--no-jm', '--no-ti'],
|
||||||
['--no-baseline', '--no-ion', '--no-ti'],
|
['--no-baseline', '--no-ion', '--no-ti'],
|
||||||
|
@ -46,4 +46,4 @@ var rec = asmLink(asmCompile(USE_ASM+"function rec(i) { i=i|0; if (!i) return 0;
|
|||||||
assertEq(rec(100), 100);
|
assertEq(rec(100), 100);
|
||||||
assertEq(rec(1000), 1000);
|
assertEq(rec(1000), 1000);
|
||||||
assertThrowsInstanceOf(function() rec(100000000000), InternalError);
|
assertThrowsInstanceOf(function() rec(100000000000), InternalError);
|
||||||
assertEq(rec(10000), 10000);
|
assertEq(rec(2000), 2000);
|
||||||
|
@ -686,6 +686,24 @@ JS_FRIEND_API(bool) JS::isGCEnabled() { return true; }
|
|||||||
|
|
||||||
static const JSSecurityCallbacks NullSecurityCallbacks = { };
|
static const JSSecurityCallbacks NullSecurityCallbacks = { };
|
||||||
|
|
||||||
|
static bool
|
||||||
|
JitSupportsFloatingPoint()
|
||||||
|
{
|
||||||
|
#if defined(JS_METHODJIT) || defined(JS_ION)
|
||||||
|
if (!JSC::MacroAssembler().supportsFloatingPoint())
|
||||||
|
return false;
|
||||||
|
|
||||||
|
#if defined(JS_ION) && WTF_ARM_ARCH_VERSION == 6
|
||||||
|
if (!js::ion::hasVFP())
|
||||||
|
return false;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
return true;
|
||||||
|
#else
|
||||||
|
return false;
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
PerThreadData::PerThreadData(JSRuntime *runtime)
|
PerThreadData::PerThreadData(JSRuntime *runtime)
|
||||||
: PerThreadDataFriendFields(),
|
: PerThreadDataFriendFields(),
|
||||||
runtime_(runtime),
|
runtime_(runtime),
|
||||||
@ -893,6 +911,7 @@ JSRuntime::JSRuntime(JSUseHelperThreads useHelperThreads)
|
|||||||
noGCOrAllocationCheck(0),
|
noGCOrAllocationCheck(0),
|
||||||
#endif
|
#endif
|
||||||
jitHardening(false),
|
jitHardening(false),
|
||||||
|
jitSupportsFloatingPoint(false),
|
||||||
ionPcScriptCache(NULL),
|
ionPcScriptCache(NULL),
|
||||||
threadPool(this),
|
threadPool(this),
|
||||||
ctypesActivityCallback(NULL),
|
ctypesActivityCallback(NULL),
|
||||||
@ -990,6 +1009,8 @@ JSRuntime::init(uint32_t maxbytes)
|
|||||||
return false;
|
return false;
|
||||||
|
|
||||||
nativeStackBase = GetNativeStackBase();
|
nativeStackBase = GetNativeStackBase();
|
||||||
|
|
||||||
|
jitSupportsFloatingPoint = JitSupportsFloatingPoint();
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1304,6 +1304,8 @@ struct JSRuntime : private JS::shadow::Runtime,
|
|||||||
|
|
||||||
bool jitHardening;
|
bool jitHardening;
|
||||||
|
|
||||||
|
bool jitSupportsFloatingPoint;
|
||||||
|
|
||||||
// Used to reset stack limit after a signaled interrupt (i.e. ionStackLimit_ = -1)
|
// Used to reset stack limit after a signaled interrupt (i.e. ionStackLimit_ = -1)
|
||||||
// has been noticed by Ion/Baseline.
|
// has been noticed by Ion/Baseline.
|
||||||
void resetIonStackLimit() {
|
void resetIonStackLimit() {
|
||||||
|
@ -2382,31 +2382,6 @@ class TypeConstraintFreezeStack : public TypeConstraint
|
|||||||
// TypeCompartment
|
// TypeCompartment
|
||||||
/////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
static inline bool
|
|
||||||
TypeInferenceSupported()
|
|
||||||
{
|
|
||||||
#ifdef JS_METHODJIT
|
|
||||||
// JM+TI will generate FPU instructions with TI enabled. As a workaround,
|
|
||||||
// we disable TI to prevent this on platforms which do not have FPU
|
|
||||||
// support.
|
|
||||||
JSC::MacroAssembler masm;
|
|
||||||
if (!masm.supportsFloatingPoint())
|
|
||||||
return false;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if WTF_ARM_ARCH_VERSION == 6
|
|
||||||
#ifdef JS_ION
|
|
||||||
return js::ion::hasVFP();
|
|
||||||
#else
|
|
||||||
// If building for ARMv6 targets, we can't be guaranteed an FPU,
|
|
||||||
// so we hardcode TI off for consistency (see bug 793740).
|
|
||||||
return false;
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
|
|
||||||
TypeCompartment::TypeCompartment()
|
TypeCompartment::TypeCompartment()
|
||||||
{
|
{
|
||||||
PodZero(this);
|
PodZero(this);
|
||||||
@ -2418,7 +2393,7 @@ TypeZone::init(JSContext *cx)
|
|||||||
{
|
{
|
||||||
if (!cx ||
|
if (!cx ||
|
||||||
!cx->hasOption(JSOPTION_TYPE_INFERENCE) ||
|
!cx->hasOption(JSOPTION_TYPE_INFERENCE) ||
|
||||||
!TypeInferenceSupported())
|
!cx->runtime->jitSupportsFloatingPoint)
|
||||||
{
|
{
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
@ -5295,6 +5295,8 @@ main(int argc, char **argv, char **envp)
|
|||||||
|| !op.addIntOption('\0', "baseline-uses-before-compile", "COUNT",
|
|| !op.addIntOption('\0', "baseline-uses-before-compile", "COUNT",
|
||||||
"Wait for COUNT calls or iterations before baseline-compiling "
|
"Wait for COUNT calls or iterations before baseline-compiling "
|
||||||
"(default: 10)", -1)
|
"(default: 10)", -1)
|
||||||
|
|| !op.addBoolOption('\0', "no-fpu", "Pretend CPU does not support floating-point operations "
|
||||||
|
"to test JIT codegen (no-op on platforms other than x86).")
|
||||||
#ifdef JSGC_GENERATIONAL
|
#ifdef JSGC_GENERATIONAL
|
||||||
|| !op.addBoolOption('\0', "ggc", "Enable Generational GC")
|
|| !op.addBoolOption('\0', "ggc", "Enable Generational GC")
|
||||||
#endif
|
#endif
|
||||||
@ -5329,6 +5331,11 @@ main(int argc, char **argv, char **envp)
|
|||||||
OOM_maxAllocations = op.getIntOption('A');
|
OOM_maxAllocations = op.getIntOption('A');
|
||||||
if (op.getBoolOption('O'))
|
if (op.getBoolOption('O'))
|
||||||
OOM_printAllocationCount = true;
|
OOM_printAllocationCount = true;
|
||||||
|
|
||||||
|
#if defined(JS_CPU_X86)
|
||||||
|
if (op.getBoolOption("no-fpu"))
|
||||||
|
JSC::MacroAssembler::SetFloatingPointDisabled();
|
||||||
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Use the same parameters as the browser in xpcjsruntime.cpp. */
|
/* Use the same parameters as the browser in xpcjsruntime.cpp. */
|
||||||
|
Loading…
Reference in New Issue
Block a user