gecko/media/libvpx/solaris.patch

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diff --git a/media/libvpx/vp8/common/loopfilter_filters.c b/media/libvpx/vp8/common/loopfilter_filters.c
--- a/media/libvpx/vp8/common/loopfilter_filters.c
+++ b/media/libvpx/vp8/common/loopfilter_filters.c
@@ -11,10 +11,14 @@
#include <stdlib.h>
#include "loopfilter.h"
#include "onyxc_int.h"
+#ifdef __SUNPRO_C
+#define __inline inline
+#endif
+
typedef unsigned char uc;
static __inline signed char vp8_signed_char_clamp(int t)
{
t = (t < -128 ? -128 : t);
diff --git a/media/libvpx/vpx_ports/mem.h b/media/libvpx/vpx_ports/mem.h
--- a/media/libvpx/vpx_ports/mem.h
+++ b/media/libvpx/vpx_ports/mem.h
@@ -9,17 +9,17 @@
*/
#ifndef VPX_PORTS_MEM_H
#define VPX_PORTS_MEM_H
#include "vpx_config.h"
#include "vpx/vpx_integer.h"
-#if defined(__GNUC__) && __GNUC__
+#if (defined(__GNUC__) && __GNUC__) || defined(__SUNPRO_C)
#define DECLARE_ALIGNED(n,typ,val) typ val __attribute__ ((aligned (n)))
#elif defined(_MSC_VER)
#define DECLARE_ALIGNED(n,typ,val) __declspec(align(n)) typ val
#else
#warning No alignment directives known for this compiler.
#define DECLARE_ALIGNED(n,typ,val) typ val
#endif
#endif
diff --git a/media/libvpx/vpx_ports/x86.h b/media/libvpx/vpx_ports/x86.h
--- a/media/libvpx/vpx_ports/x86.h
+++ b/media/libvpx/vpx_ports/x86.h
@@ -45,16 +45,36 @@
#define cpuid(func,ax,bx,cx,dx)\
__asm__ __volatile__ (\
"mov %%ebx, %%edi \n\t" \
"cpuid \n\t" \
"xchg %%edi, %%ebx \n\t" \
: "=a" (ax), "=D" (bx), "=c" (cx), "=d" (dx) \
: "a" (func));
#endif
+#elif defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+#if ARCH_X86_64
+#define cpuid(func,ax,bx,cx,dx)\
+ asm volatile (\
+ "xchg %rsi, %rbx \n\t" \
+ "cpuid \n\t" \
+ "movl %ebx, %edi \n\t" \
+ "xchg %rsi, %rbx \n\t" \
+ : "=a" (ax), "=D" (bx), "=c" (cx), "=d" (dx) \
+ : "a" (func));
+#else
+#define cpuid(func,ax,bx,cx,dx)\
+ asm volatile (\
+ "pushl %ebx \n\t" \
+ "cpuid \n\t" \
+ "movl %ebx, %edi \n\t" \
+ "popl %ebx \n\t" \
+ : "=a" (ax), "=D" (bx), "=c" (cx), "=d" (dx) \
+ : "a" (func));
+#endif
#else
#if ARCH_X86_64
void __cpuid(int CPUInfo[4], int info_type);
#pragma intrinsic(__cpuid)
#define cpuid(func,a,b,c,d) do{\
int regs[4];\
__cpuid(regs,func); a=regs[0]; b=regs[1]; c=regs[2]; d=regs[3];\
} while(0)
@@ -108,29 +128,36 @@ unsigned __int64 __rdtsc(void);
#endif
static unsigned int
x86_readtsc(void)
{
#if defined(__GNUC__) && __GNUC__
unsigned int tsc;
__asm__ __volatile__("rdtsc\n\t":"=a"(tsc):);
return tsc;
+#elif defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+ unsigned int tsc;
+ asm volatile("rdtsc\n\t":"=a"(tsc):);
+ return tsc;
#else
#if ARCH_X86_64
return __rdtsc();
#else
__asm rdtsc;
#endif
#endif
}
#if defined(__GNUC__) && __GNUC__
#define x86_pause_hint()\
__asm__ __volatile__ ("pause \n\t")
+#elif defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+#define x86_pause_hint()\
+ asm volatile ("pause \n\t")
#else
#if ARCH_X86_64
#define x86_pause_hint()\
_mm_pause();
#else
#define x86_pause_hint()\
__asm pause
#endif
@@ -144,16 +171,29 @@ x87_set_control_word(unsigned short mode
}
static unsigned short
x87_get_control_word(void)
{
unsigned short mode;
__asm__ __volatile__("fstcw %0\n\t":"=m"(*&mode):);
return mode;
}
+#elif defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+static void
+x87_set_control_word(unsigned short mode)
+{
+ asm volatile("fldcw %0" : : "m"(*&mode));
+}
+static unsigned short
+x87_get_control_word(void)
+{
+ unsigned short mode;
+ asm volatile("fstcw %0\n\t":"=m"(*&mode):);
+ return mode;
+}
#elif ARCH_X86_64
/* No fldcw intrinsics on Windows x64, punt to external asm */
extern void vpx_winx64_fldcw(unsigned short mode);
extern unsigned short vpx_winx64_fstcw(void);
#define x87_set_control_word vpx_winx64_fldcw
#define x87_get_control_word vpx_winx64_fstcw
#else
static void