From e50f0d07a1f6a5d2d3490b6948cdc900c506d7bb Mon Sep 17 00:00:00 2001
From: oech3 <79379754+oech3@users.noreply.github.com>
Date: Sat, 25 Apr 2026 20:35:34 +0900
Subject: [PATCH] pipes.rs: add debug_assert! for RAM usage

---
 src/uucore/src/lib/features/pipes.rs | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/uucore/src/lib/features/pipes.rs b/src/uucore/src/lib/features/pipes.rs
index 292cf4c41..1faf0f922 100644
--- a/src/uucore/src/lib/features/pipes.rs
+++ b/src/uucore/src/lib/features/pipes.rs
@@ -117,7 +117,8 @@ where
                     // we can recover by copying the data that we have from the
                     // intermediate pipe to stdout using normal read/write. Then
                     // we tell the caller to fall back.
-                    let mut drain = Vec::with_capacity(n); // bounded by pipe size
+                    debug_assert!(n <= MAX_ROOTLESS_PIPE_SIZE, "unexpected RAM usage");
+                    let mut drain = Vec::with_capacity(n);
                     pipe_rd.take(n as u64).read_to_end(&mut drain)?;
                     dest.write_all(&drain)?;
                     return Ok(true);
@@ -184,7 +185,8 @@ pub fn send_n_bytes(
                             break false;
                         }
                     } else {
-                        let mut drain = Vec::with_capacity(s); // bounded by pipe size
+                        debug_assert!(s <= MAX_ROOTLESS_PIPE_SIZE, "unexpected RAM usage");
+                        let mut drain = Vec::with_capacity(s);
                         broker_r.take(s as u64).read_to_end(&mut drain)?;
                         target.write_all(&drain)?;
                         break true;