Maxime Chevallier 565f02fc1e dt-bindings: net: altera: tse: add an optional pcs register range ...

Some implementations of the TSE have their PCS as an external bloc,
exposed at its own register range. Document this, and add a new example
showing a case using the pcs and the new phylink conversion to connect
an sfp port to a TSE mac.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

2022-09-05 10:16:53 +01:00

..

bindings

dt-bindings: net: altera: tse: add an optional pcs register range

2022-09-05 10:16:53 +01:00

changesets.rst

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dynamic-resolution-notes.rst

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index.rst

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kernel-api.rst

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of_unittest.rst

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overlay-notes.rst

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usage-model.rst

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