Commit Graph

1080 Commits

Author SHA1 Message Date
Greg Kroah-Hartman bcf003be75 Merge tag 'phy-fixes-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next
Vinod writes:

phy: fixes for 5.8

*) Fix for intel combo driver for warns or errors
*) Constify symbols for am654-serdes & j721e-wiz
*) Return value fix for rockchip driver
*) Null pointer dereference fix for sun4i-usb

* tag 'phy-fixes-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy:
  phy: sun4i-usb: fix dereference of pointer phy0 before it is null checked
  phy: rockchip: Fix return value of inno_dsidphy_probe()
  phy: ti: j721e-wiz: Constify structs
  phy: ti: am654-serdes: Constify regmap_config
  phy: intel: fix enum type mismatch warning
  phy: intel: Fix compilation error on FIELD_PREP usage
2020-07-08 18:00:07 +02:00
Colin Ian King 38b1927e5b phy: sun4i-usb: fix dereference of pointer phy0 before it is null checked
Currently pointer phy0 is being dereferenced via the assignment of
phy on the call to phy_get_drvdata before phy0 is null checked, this
can lead to a null pointer dereference. Fix this by performing the
null check on phy0 before the call to phy_get_drvdata. Also replace
the phy0 == NULL check with the more usual !phy0 idiom.

Addresses-Coverity: ("Dereference before null check")
Fixes: e6f32efb1b ("phy: sun4i-usb: Make sure to disable PHY0 passby for peripheral mode")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20200625124428.83564-1-colin.king@canonical.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-25 18:25:37 +05:30
Tiezhu Yang fdc355a03d phy: rockchip: Fix return value of inno_dsidphy_probe()
When call function devm_platform_ioremap_resource(), we should use IS_ERR()
to check the return value and return PTR_ERR() if failed.

Fixes: b7535a3bc0 ("phy/rockchip: Add support for Innosilicon MIPI/LVDS/TTL PHY")
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/1590412138-13903-1-git-send-email-yangtiezhu@loongson.cn
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24 18:29:09 +05:30
Rikard Falkeborn 5a72122dcf phy: ti: j721e-wiz: Constify structs
clk_div_table and wiz_regmap_config are not modified and can therefore
be made const to allow the compiler to put them in read-only memory.

Before:
   text    data     bss     dec     hex filename
  20265    7044      64   27373    6aed drivers/phy/ti/phy-j721e-wiz.o

After:
   text    data     bss     dec     hex filename
  20649    6660      64   27373    6aed drivers/phy/ti/phy-j721e-wiz.o

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200524095516.25227-3-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24 18:26:39 +05:30
Rikard Falkeborn 0cb5ebc749 phy: ti: am654-serdes: Constify regmap_config
regmap_config is not modified and can be made static to allow the compiler
to put it in read-only memory.

Before:
   text    data     bss     dec     hex filename
  12328    3644      64   16036    3ea4 drivers/phy/ti/phy-am654-serdes.o

After:
   text    data     bss     dec     hex filename
  12648    3324      64   16036    3ea4 drivers/phy/ti/phy-am654-serdes.o

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200524095516.25227-2-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24 18:26:38 +05:30
Arnd Bergmann 6153224bef phy: intel: fix enum type mismatch warning
clang points out that a local variable is initialized with
an enum value of the wrong type:

drivers/phy/intel/phy-intel-combo.c:202:34: error: implicit conversion from enumeration type 'enum intel_phy_mode' to different enumeration type 'enum intel_combo_mode' [-Werror,-Wenum-conversion]
        enum intel_combo_mode cb_mode = PHY_PCIE_MODE;
                              ~~~~~~~   ^~~~~~~~~~~~~

>From reading the code, it seems that this was not only the
wrong type, but not even supposed to be a code path that can
happen in practice.

Change the code to have no default phy mode but instead return an
error for invalid input.

Fixes: ac0a95a3ea ("phy: intel: Add driver support for ComboPhy")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Dilip Kota <eswara.kota@linux.intel.com>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Link: https://lore.kernel.org/r/20200527134518.908624-1-arnd@arndb.de
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24 17:41:40 +05:30
Dilip Kota 76e242c284 phy: intel: Fix compilation error on FIELD_PREP usage
FIELD_PREP expects constant arguments. Istead of doing FIELD_PREP
operation on the arguments of combo_phy_w32_off_mask(), pass the
final FIELD_PREP value as an argument.

Error reported as:
In file included from include/linux/build_bug.h:5,
from include/linux/bitfield.h:10,
from drivers/phy/intel/phy-intel-combo.c:8:
drivers/phy/intel/phy-intel-combo.c: In function 'combo_phy_w32_off_mask':
include/linux/bitfield.h:52:28: warning: comparison is always false due to limited range of data type [-Wtype-limits]

include/linux/compiler.h:350:38: error: call to '__compiletime_assert_37' declared with attribute error: FIELD_PREP: mask is not constant
94 |   __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: ");          |   ^~~~~~~~~~~~~~~~
drivers/phy/intel/phy-intel-combo.c:137:13: note: in expansion of macro 'FIELD_PREP'
137 |  reg_val |= FIELD_PREP(mask, val);
|             ^~~~~~~~~~

../include/linux/compiler.h:392:38: error: call to__compiletime_assert_137
 declared with attribute error:
BUILD_BUG_ON failed: (((mask) + (1ULL << (__builtin_ffsll(mask) - 1))) & (((mask) + (1ULL << (__builtin_ffsll(mask) - 1))) - 1)) != 0
  _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)

../include/linux/bitfield.h:94:3: note: in expansion of macro __BF_FIELD_CHECK
   __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
   ^~~~~~~~~~~~~~~~
../drivers/phy/intel/phy-intel-combo.c:137:13: note: in expansion of macro FIELD_PREP
  reg_val |= FIELD_PREP(mask, val);
             ^~~~~~~~~~

Fixes: ac0a95a3ea ("phy: intel: Add driver support for ComboPhy")
Reported-by: kbuild test robot <lkp@intel.com>
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Link: https://lore.kernel.org/r/8a309dd3c238efbaa59d1649704255d6f8b6c9c5.1590575358.git.eswara.kota@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24 17:40:31 +05:30
Gustavo A. R. Silva 50f894d50a phy: samsung: Replace zero-length array with flexible-array
There is a regular need in the kernel to provide a way to declare having a
dynamically sized set of trailing elements in a structure. Kernel code should
always use “flexible array members”[1] for these cases. The older style of
one-element or zero-length arrays should no longer be used[2].

[1] https://en.wikipedia.org/wiki/Flexible_array_member
[2] https://github.com/KSPP/linux/issues/21

Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
2020-06-15 23:08:32 -05:00
Greg Kroah-Hartman ca681aa492 Merge tag 'usb-for-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:

USB: changes for v5.8 merge window

Rather busy cycle. We have a total 99 non-merge commits going into v5.8
merge window. The majority of the changes are in dwc3 this around (31.7%
of all changes). It's composed mostly Thinh's recent updates to get dwc3
to behave correctly with stream transfers. We have also have Roger's for
Keystone platforms and Neil's updates for the meson glue layer.

Apart from those, we have the usual set of non-critical fixes, new
device IDs, spelling fixes all over the place.

Signed-off-by: Felipe Balbi <balbi@kernel.org>

* tag 'usb-for-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: (99 commits)
  usb: dwc3: keystone: Turn on USB3 PHY before controller
  dt-bindings: usb: ti,keystone-dwc3.yaml: Add USB3.0 PHY property
  dt-bindings: usb: convert keystone-usb.txt to YAML
  usb: dwc3: gadget: Check for prepared TRBs
  usb: gadget: Fix issue with config_ep_by_speed function
  usb: cdns3: ep0: delete the redundant status stage
  usb: dwc2: Update Core Reset programming flow.
  usb: gadget: fsl: Fix a wrong judgment in fsl_udc_probe()
  usb: gadget: fix potential double-free in m66592_probe.
  usb: cdns3: Fix runtime PM imbalance on error
  usb: gadget: lpc32xx_udc: don't dereference ep pointer before null check
  usb: dwc3: Increase timeout for CmdAct cleared by device controller
  USB: dummy-hcd: use configurable endpoint naming scheme
  usb: cdns3: gadget: assign interrupt number to USB gadget structure
  usb: gadget: core: sync interrupt before unbind the udc
  arm64: dts: qcom: sc7180: Add interconnect properties for USB
  arm64: dts: qcom: sdm845: Add interconnect properties for USB
  dt-bindings: usb: qcom,dwc3: Introduce interconnect properties for Qualcomm DWC3 driver
  ARM: dts: at91: Remove the USB EP child node
  dt-bindings: usb: atmel: Mark EP child node as deprecated
  ...
2020-05-25 13:28:20 +02:00
Martin Blumenstingl 40f6706862 phy: amlogic: meson-gxl-usb3: remove code for non-existing PHY
The registers which are managed by the meson-gxl-usb3 PHY driver are
actually "USB control" registers (which are "glue" registers which
manage OTG detection and routing of the OTG capable port between the
DWC2 peripheral-only controller and the DWC3 host-only controller).

Drop the meson-gxl-usb3 PHY driver now that the dwc3-meson-g12a-usb
driver supports the USB control registers on GXL and GXM SoCs (these
were previously managed by the meson-gxl-usb3 PHY driver).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25 11:09:38 +03:00
Greg Kroah-Hartman 14f3a5ccac Merge tag 'phy-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into usb-next
Kishon writes:

phy: for 5.8

*) Add new PHY driver to support Cadence SALVO PHY which supports USB3 & USB2
*) Add new PHY driver to support Intel ComboPhy which supports PCIe, SATA and
   EMAC
*) Add new PHY driver for Qualcomm IPQ40xx USB PHY
*) Add new PHY driver for Synopsys FemtoPHY V2 driver used in Qualcomm SOCs
*) Add support for Qualcomm SM8250 UFS PHY and SM8150 QMP USB3 PHY in
   qcom-qmp-phy driver
*) Add support for Amlogic USB2 PHY on Meson8m2 in phy-meson8b-usb2 driver
*) Add DisplayPort mode support in Wiz (TI Cadence PHY wrapper), to enable eDP
   in TI's J721E SoC
*) Add support for super speed USB PHY in TI's AM654 SoC
*) Add fix in Broadcom Stingray USB PHY to get USB PHY PLL lock reliably
*) Add fix in Samsung phy-s5pv210-usb2 to get USB working on s5pv210
*) Add fix in Amlogic phy-meson8b-usb2 to get host only mode working on Meson8
*) Add fix in Cadence phy-cadence-sierra to get USB3 device disconnect issue
*) Convert meson8b-usb2-phy, qcom-qmp-phy, rcar-gen3-phy-usb2 and
   rcar-gen3-phy-usb3 device tree binding to YAML schema
*) Minor fixes and cleanups in phy-cpcap-usb, j721e-wiz, omap-usb2,
   phy-bcm-sr-usb, phy-brcm-usb PHY driver

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

* tag 'phy-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (43 commits)
  phy: intel: Add driver support for ComboPhy
  dt-bindings: phy: Add YAML schemas for Intel ComboPhy
  dt-bindings: phy: Add PHY_TYPE_XPCS definition
  phy: qcom-qmp: Add QMP V3 USB3 PHY support for SC7180
  dt-bindings: phy: qcom,qmp-usb3-dp: Add support for SC7180
  dt-bindings: phy: qcom,qmp-usb3-dp: Add dt bindings for USB3 DP PHY
  dt-bindings: phy: qcom,qmp: Convert QMP PHY bindings to yaml
  phy: cadence: sierra: Fix for USB3 U1/U2 state
  phy: ti: am654: add support for USB super-speed
  phy: ti: am654: show up in regmap debugfs
  drivers: phy: sr-usb: do not use internal fsm for USB2 phy init
  dt-bindings: phy: renesas: usb3-phy: add r8a77961 support
  dt-bindings: phy: renesas: usb3-phy: convert bindings to json-schema
  dt-bindings: phy: renesas: usb2-phy: add r8a77961 support
  dt-bindings: phy: renesas: usb2-phy: convert bindings to json-schema
  phy: qcom-qmp: Ensure register indirection arrays initialized
  phy: omap-usb2: Clean up exported header
  phy: phy-bcm-ns2-usbdrd: Constify phy_ops
  phy: phy-brcm-usb: Constify static structs
  phy: sr-usb: Constify phy_ops
  ...
2020-05-22 09:28:16 +02:00
Dilip Kota ac0a95a3ea phy: intel: Add driver support for ComboPhy
ComboPhy subsystem provides PHYs for various
controllers like PCIe, SATA and EMAC.

Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
Acked-By: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/7b313826f46b9006a3ba98c0613e8f88f293a074.1589868358.git.eswara.kota@linux.intel.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-19 20:26:06 +05:30
Sandeep Maheswaram d30b16a556 phy: qcom-qmp: Add QMP V3 USB3 PHY support for SC7180
Adding QMP v3 USB3 PHY support for SC7180.
Adding only usb phy reset in the list to avoid
reset of DP block.

Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1589510358-3865-5-git-send-email-sanm@codeaurora.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-05-19 11:21:01 +05:30
Sanket Parmar 2bcf14ca1a phy: cadence: sierra: Fix for USB3 U1/U2 state
Updated values of USB3 related Sierra PHY registers.
This change fixes USB3 device disconnect issue observed
while enternig U1/U2 state.

Signed-off-by: Sanket Parmar <sparmar@cadence.com>
Link: https://lore.kernel.org/r/1589804053-14302-1-git-send-email-sparmar@cadence.com
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-18 19:30:56 +05:30
Roger Quadros 257d0be3f0 phy: ti: am654: add support for USB super-speed
The SERDES PHY can support USB super-speed lane.
Add support for that.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20200513131254.10497-3-rogerq@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-18 19:30:56 +05:30
Roger Quadros 24dcb6a663 phy: ti: am654: show up in regmap debugfs
The max_register property must be set in order to
show up the registers in debugfs.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20200513131254.10497-2-rogerq@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-18 19:30:56 +05:30
Bharat Gooty 6f0577d141 drivers: phy: sr-usb: do not use internal fsm for USB2 phy init
During different reboot cycles, USB PHY PLL may not always lock
during initialization and therefore can cause USB to be not usable.

Hence do not use internal FSM programming sequence for the USB
PHY initialization.

Fixes: 4dcddbb38b ("phy: sr-usb: Add Stingray USB PHY driver")
Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Link: https://lore.kernel.org/r/20200513173947.10919-1-rayagonda.kokatanur@broadcom.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-18 19:30:56 +05:30
Bjorn Andersson 72f039db49 phy: qcom-qmp: Ensure register indirection arrays initialized
It's possible that struct qmp_phy_cfg->regs references an array that is
smaller than the possible register lookups that is going to be
performed, with the resulting out-of-bounds read resulting in undefined
behavior.

One such example is when during qcom_qmp_phy_com_init() performs a
qphy_setbits() on entry QPHY_PCS_POWER_DOWN_CONTROL (i.e. 17) with
msm8996_ufsphy_regs_layout only being 12 entries long.

Solve this by inflating all "regs_layout" arrays to ensure that any
remaining entries are zero-initialized, as expected by the code.

Fixes: e4d8b05ad5 ("phy: qcom-qmp: Use proper PWRDOWN offset for sm8150 USB")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200515013643.2081941-1-bjorn.andersson@linaro.org
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-18 19:30:56 +05:30
Roger Quadros 81530a38a3 phy: omap-usb2: Clean up exported header
Move private definitions from header to phy-omap-usb2.c file.
Get rid of unused data structures usb_dpll_params and omap_usb_phy_type.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20200515080518.26870-2-rogerq@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-18 19:30:56 +05:30
Rikard Falkeborn 728ac1ba2e phy: phy-bcm-ns2-usbdrd: Constify phy_ops
phy_ops are never modified and can therefore be made const to allow the
compiler to put it in read-only memory.

Before:
   text    data     bss     dec     hex filename
   7831    3144     128   11103    2b5f drivers/phy/broadcom/phy-bcm-ns2-usbdrd.o

After:
   text    data     bss     dec     hex filename
   7959    3016     128   11103    2b5f drivers/phy/broadcom/phy-bcm-ns2-usbdrd.o

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200516120441.7627-2-rikard.falkeborn@gmail.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-18 19:30:56 +05:30
Rikard Falkeborn c79cc3d55c phy: phy-brcm-usb: Constify static structs
A number of structs were not modified and can therefore be made const
to allow the compiler to put them in read-only memory.

In order to do so, update a few functions that don't modify there input
to take pointers to const.

Before:
   text    data     bss     dec     hex filename
  15511    6448      64   22023    5607 drivers/phy/broadcom/phy-brcm-usb.o

After:
   text    data     bss     dec     hex filename
  16058    5936      64   22058    562a drivers/phy/broadcom/phy-brcm-usb.o

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200516120441.7627-4-rikard.falkeborn@gmail.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-18 19:30:56 +05:30
Rikard Falkeborn cbe72af1a7 phy: sr-usb: Constify phy_ops
phy_ops are never modified and can therefore be made const to allow the
compiler to put it in read-only memory.

Before:
   text    data     bss     dec     hex filename
   4310    1244       0    5554    15b2 drivers/phy/broadcom/phy-bcm-sr-usb.o

After:
   text    data     bss     dec     hex filename
   4438    1116       0    5554    15b2 drivers/phy/broadcom/phy-bcm-sr-usb.o

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200516120441.7627-3-rikard.falkeborn@gmail.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-18 19:30:55 +05:30
Peter Chen 11c82afac8 phy: phy-cadence-salvo: add phy .init API
The .init is used for one-time PHY's initialization, and .power_on
is called many times during the device lifecycle.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
Link: https://lore.kernel.org/r/20200513125605.5545-1-peter.chen@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-05-15 13:20:21 +05:30
Martin Blumenstingl f004be596c phy: amlogic: meson8b-usb2: Add a compatible string for Meson8m2
The 3.10 vendor kernel sets the ACA_ENABLE bit on Meson8b, Meson8m2 and
GXBB, but not on Meson8. Add a compatible string for Meson8m2 which also
sets that bit.
While here, also update the Kconfig text and MODULE_DESCRIPTION.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Thomas Graichen <thomas.graichen@gmail.com>
Link: https://lore.kernel.org/r/20200512222424.549351-7-martin.blumenstingl@googlemail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-05-15 13:16:55 +05:30
Martin Blumenstingl 7cafc01744 phy: amlogic: meson8b-usb2: unset the IDDQ bit during PHY power-on
The vendor driver unsets the set_iddig bit during power-on as well and
sets it when suspending the PHY. I did not notice this in the vendor
driver first, because it's part of the dwc_otg driver there (instead of
their PHY code). While here, also add all other REG_DBG_UART register
bit definitions.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Thomas Graichen <thomas.graichen@gmail.com>
Link: https://lore.kernel.org/r/20200512222424.549351-6-martin.blumenstingl@googlemail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-05-15 13:16:55 +05:30