This patch allows to check if the other core is in WFI
mode. It is the last check the idle routine has to do before
entering into the retention state.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
In the case we go to the retention mode, we decoupled the gic
in order to have the A9 core to reach a stable WFI state.
But we want the prcmu to wake up the A9 when the gic has a pending
irq which is done by copying the gic settings to the to the prcmu.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This patch introduces a routine to check if there are some
irqs pending on the gic. Usually this check is not relevant because
it appears racy (an irq can arrive right after this check), but in
the ux500 it makes sense because the prcmu decouples the gic from
the A9 cores.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
The reference group and internal oscillator are shared by sub-devs
like led, backlight and vibrator in PM8606 chip. Now introduce a
voting mechanism to enable/disable it.
Add pm8606_osc_enable() and pm8606_osc_disable() interface and
related defines to support this. This interface will be called by
vibrator led and backlight driver.The refernce group and internal
oscillator are enabled only when at least one of it's clients holds
it on or disabled only all the clients don't use it any more based
on the above mechanism.
Signed-off-by: Jett.Zhou <jtzhou@marvell.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Using regmap apis for accessing the device registers and
using RBTREE caching mechanims for caching registers.
Enabling caching of the registers which is used for voltage
controls. By doing this, the modify_bits operation is faster as
it does not involve the i2c register read from device, just read
from cache. This results faster set voltage operation.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
For 88pm860x pmic, it can wake the system from low power mode by irq,
its sub-devs like RTC and onkey can be enabled for this usage.
Signed-off-by: Jett.Zhou <jtzhou@marvell.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
da9052 has been converted to use regmap API, so we can remove the unused
io_lock mutex.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This patch allows to decouple and recouple the gic from the PRCMU.
This is needed to put the A9 core in retention mode with the cpuidle
driver.
It is based on top of the "DB8500 PRCMU update" patchset.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Rickard Andersson <rickard.andersson@stericsson.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
There are currently four different versions of the AB8500
around: AB8500, AB8505, AB9540 and AB8540. Unfortunately:
- Some of the chips (AB8500, AB8505, AB9540) cannot read
the AB8500_REV_REG register but return errors
- Some of them have the same ID value in the hardware
register AB8500_REV_REV, for example the first versions
of AB8505 and AB9540 have 0xFF in this register -
just like the AB8500.
So we need to be able to enforce a certain version from
the platform. We do this by using the id of the platform
device that provides the read/write functions.
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@stericsson.com>
Signed-off-by: Alex Macro <alex.macro@stericsson.com>
Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This patch adds an initial PRCMU register access API, which
for now should only be used for a very limited set of registers.
The idea about this API is that we split the PRCMU driver in
one part that deals with interaction with the PRCMU firmware
and one part that simply provide write accessors in the PRCMU
register range. The latter are just a collection of registers
exposed in the PRCMU register range for various purposes and
not related to the PRCMU firmware.
Currently we support some limited GPIO, SPI and UART settings
through this API.
Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This updates the clock handling in the DB8500 PRCMU driver with
the latest findings and API changes related to changes in the
backing firmware in the PRCMU.
- Add the necessary interfaces to get the frequencies of the
clocks and set the rate of some of the clocks.
- Add support for controlling the clocks PLLSOC0, PLLDSI,
DSI0, DSI1 and DSI escape clocks (DSInESCCLK).
- Correct the PLLSDI enable/disable sequence by using the
DSIPLL_CLAMPI bit.
After this we will have the interfaces and code to implement the
U8500 clock framework properly.
Reviewed-by: Jonas Aberg <jonas.aberg@stericsson.com>
Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This prefixes a number of accessor functions with db8500_* since
they are DB8500-specific and we need to move to this naming
scheme.
We also replace numerous instances of machine_is() with cpu_is()
which covers the right type of ASICs rather than entire machines
i.e. boards.
Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
MC13783 can be programmed to wait some clock cycles between the
touchscreen polarization and the resistance conversion. This is
needed to adjust for touchscreens with high capacitance between
plates.
Signed-off-by: Michael Thalmeier <michael.thalmeier@hale.at>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Dmitry Torokhov <dtor@mail.ru>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
