Commit Graph

234 Commits

Author SHA1 Message Date
Linus Torvalds
e767b3530a Merge tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
 "Updates for SoC specific drivers include a few subsystems that have
  their own maintainers but send them through the soc tree:

  SCMI firmware:
   - add support for a completion interrupt

  Reset controllers:
   - new driver for BCM4908
   - new devm_reset_control_get_optional_exclusive_released() function

  Memory controllers:
   - Renesas RZ/G2 support
   - Tegra124 interconnect support
   - Allow more drivers to be loadable modules

  TEE/optee firmware:
   - minor code cleanup

  The other half of this is SoC specific drivers that do not belong into
  any other subsystem, most of them living in drivers/soc:

   - Allwinner/sunxi power management work
   - Allwinner H616 support

   - ASpeed AST2600 system identification support

   - AT91 SAMA7G5 SoC ID driver
   - AT91 SoC driver cleanups

   - Broadcom BCM4908 power management bus support

   - Marvell mbus cleanups

   - Mediatek MT8167 power domain support

   - Qualcomm socinfo driver support for PMIC
   - Qualcomm SoC identification for many more products

   - TI Keystone driver cleanups for PRUSS and elsewhere"

* tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (89 commits)
  soc: aspeed: socinfo: Add new systems
  soc: aspeed: snoop: Add clock control logic
  memory: tegra186-emc: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
  memory: samsung: exynos5422-dmc: Correct function names in kerneldoc
  memory: ti-emif-pm: Drop of_match_ptr from of_device_id table
  optee: simplify i2c access
  drivers: soc: atmel: fix type for same7
  tee: optee: remove need_resched() before cond_resched()
  soc: qcom: ocmem: don't return NULL in of_get_ocmem
  optee: sync OP-TEE headers
  tee: optee: fix 'physical' typos
  drivers: optee: use flexible-array member instead of zero-length array
  tee: fix some comment typos in header files
  soc: ti: k3-ringacc: Use of_device_get_match_data()
  soc: ti: pruss: Refactor the CFG sub-module init
  soc: mediatek: pm-domains: Don't print an error if child domain is deferred
  soc: mediatek: pm-domains: Add domain regulator supply
  dt-bindings: power: Add domain regulator supply
  soc: mediatek: cmdq: Remove cmdq_pkt_flush()
  soc: mediatek: pm-domains: Add support for mt8167
  ...
2021-02-20 18:42:28 -08:00
Geetha sowjanya
4c236d5dc8 octeontx2-pf: cn10k: Use LMTST lines for NPA/NIX operations
This patch adds support to use new LMTST lines for NPA batch free
and burst SQE flush. Adds new dev_hw_ops structure to hold platform
specific functions and create new files cn10k.c and cn10k.h.

Signed-off-by: Geetha sowjanya <gakula@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-11 14:55:03 -08:00
Arnd Bergmann
ce8ccf21c0 Merge tag 'qcom-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for 5.12

The socinfo driver gains support for dumping information about the platform's
PMICs, as well as new definitions for a number of platforms. The LLCC driver
gains SM8250 support, AOSS QMP gains SM8350 support and the RPMPD driver gains
support for MSM8994 power domains. In addition to this it contains a few minor
fixes in the ocmem, rpmh and llcc drivers.

* tag 'qcom-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: ocmem: don't return NULL in of_get_ocmem
  soc: qcom: socinfo: Remove unwanted le32_to_cpu()
  soc: qcom: aoss: Add SM8350 compatible
  drivers: soc: qcom: rpmpd: Add msm8994 RPM Power Domains
  soc: qcom: socinfo: Fix an off by one in qcom_show_pmic_model()
  soc: qcom: socinfo: Fix off-by-one array index bounds check
  soc: qcom: socinfo: Add MDM9607 IDs
  soc: qcom: socinfo: Add SoC IDs for APQ/MSM8998
  soc: qcom: socinfo: Add SoC IDs for 630 family
  soc: qcom: socinfo: Open read access to all for debugfs
  soc: qcom: socinfo: add info from PMIC models array
  soc: qcom: socinfo: add several PMIC IDs
  soc: qcom: socinfo: add qrb5165 SoC ID
  soc: qcom: rpmh: Remove serialization of TCS commands
  soc: qcom: smem: use %*ph to print small buffer
  dt-bindings: soc: qcom: convert qcom,smem bindings to yaml
  drivers: qcom: rpmh-rsc: Do not read back the register write on trigger
  soc: qcom: llcc-qcom: Add support for SM8250 SoC
  soc: qcom: llcc-qcom: Extract major hardware version
  dt-bindings: msm: Add LLCC for SM8250

Link: https://lore.kernel.org/r/20210204052258.388890-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-10 00:14:14 +01:00
Arnd Bergmann
d6d58c350f Merge tag 'v5.11-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers
pm-domains:
- add support for MT8167
- add support for regulator needed by a PM domain
- make error message in deferred probe case better

cmdq-helper:
- remove arch specific flush function, use mailbox rx_callback instead

* tag 'v5.11-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: pm-domains: Don't print an error if child domain is deferred
  soc: mediatek: pm-domains: Add domain regulator supply
  dt-bindings: power: Add domain regulator supply
  soc: mediatek: cmdq: Remove cmdq_pkt_flush()
  soc: mediatek: pm-domains: Add support for mt8167
  dt-bindings: power: Add MT8167 power domains

Link: https://lore.kernel.org/r/5faa52c2-0ddb-b809-7444-ce6f6ff6d8ad@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-02 22:53:58 +01:00
Chun-Kuang Hu
1570db1da9 soc: mediatek: cmdq: Remove cmdq_pkt_flush()
rx_callback is a standard mailbox callback mechanism and could
cover the function of proprietary cmdq_task_cb, so it is better
to use the standard one instead of the proprietary one. But
register rx_callback should before mbox_request_channel(),
so remove cmdq_pkt_flush() and let client driver implement
its own synchronous flush.

Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20201202235856.7652-1-chunkuang.hu@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31 12:35:46 +01:00
Fabien Parent
207f13b419 soc: mediatek: pm-domains: Add support for mt8167
Add the needed board data to support mt8167 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201209133238.384030-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31 11:19:30 +01:00
Rafał Miłecki
149ae80b1d soc: bcm: brcmstb: add stubs for getting platform IDs
Some brcmstb drivers may be shared with other SoC families. E.g. the
same USB PHY block is shared by brcmstb and BCM4908.

To avoid building brcmstb common code on non-brcmstb platforms we need
stubs for:
1. brcmstb_get_family_id()
2. brcmstb_get_product_id()
(to avoid "undefined reference to" errors).

With this change PHY_BRCM_USB will not have to unconditionally select
SOC_BRCMSTB anymore.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-01-20 12:07:23 -08:00
Alex Elder
ce2ceb9b1c soc: qcom: mdt_loader: define stubs for COMPILE_TEST
Define stub functions for the exposed MDT functions in case
QCOM_MDT_LOADER is not configured.  This allows users of these
functions to link correctly for COMPILE_TEST builds without
QCOM_SCM enabled.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-09 13:51:36 -08:00
Manivannan Sadhasivam
c4df37fe18 soc: qcom: llcc-qcom: Add support for SM8250 SoC
SM8250 SoC uses LLCC IP version 2. In this version, the WRSC_EN register
needs to be written to enable the Write Sub Cache for each SCID. Hence,
use a dedicated "write_scid_en" member with predefined values and write
them for LLCC IP version 2.

Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201130093924.45057-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:15:14 -06:00
Sai Prakash Ranjan
916c0c0552 soc: qcom: llcc-qcom: Extract major hardware version
The major hardware version of the LLCC IP is encoded in its
LLCC_COMMON_HW_INFO register. Extract the version and cache it in the
driver data so that it can be used to implement version specific
functionality like enabling Write sub cache for given SCID.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
[mani: splitted the version extract as a single patch and few cleanups]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201130093924.45057-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:15:13 -06:00
Linus Torvalds
6daa90439e Merge tag 'dmaengine-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine updates from Vinod Koul:
 "The last dmaengine updates for this year :)

  This contains couple of new drivers, new device support and updates to
  bunch of drivers.

  New drivers/devices:
   - Qualcomm ADM driver
   - Qualcomm GPI driver
   - Allwinner A100 DMA support
   - Microchip Sama7g5 support
   - Mediatek MT8516 apdma

  Updates:
   - more updates to idxd driver and support for IAX config
   - runtime PM support for dw driver
   - TI drivers"

* tag 'dmaengine-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (75 commits)
  soc: ti: k3-ringacc: Use correct error casting in k3_ringacc_dmarings_init
  dmaengine: ti: k3-udma-glue: Add support for K3 PKTDMA
  dmaengine: ti: k3-udma: Initial support for K3 PKTDMA
  dmaengine: ti: k3-udma: Add support for BCDMA channel TPL handling
  dmaengine: ti: k3-udma: Initial support for K3 BCDMA
  soc: ti: k3-ringacc: add AM64 DMA rings support.
  dmaengine: ti: Add support for k3 event routers
  dmaengine: ti: k3-psil: Add initial map for AM64
  dmaengine: ti: k3-psil: Extend psil_endpoint_config for K3 PKTDMA
  dt-bindings: dma: ti: Add document for K3 PKTDMA
  dt-bindings: dma: ti: Add document for K3 BCDMA
  dmaengine: dmatest: Use dmaengine_get_dma_device
  dmaengine: doc: client: Update for dmaengine_get_dma_device() usage
  dmaengine: Add support for per channel coherency handling
  dmaengine: of-dma: Add support for optional router configuration callback
  dmaengine: ti: k3-udma-glue: Configure the dma_dev for rings
  dmaengine: ti: k3-udma-glue: Get the ringacc from udma_dev
  dmaengine: ti: k3-udma-glue: Add function to get device pointer for DMA API
  dmaengine: ti: k3-udma: Add support for second resource range from sysfw
  dmaengine: ti: k3-udma: Wait for peer teardown completion if supported
  ...
2020-12-17 12:52:23 -08:00
Linus Torvalds
48c1c40ab4 Merge tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
 "There are a couple of subsystems maintained by other people that merge
  their drivers through the SoC tree, those changes include:

   - The SCMI firmware framework gains support for sensor notifications
     and for controlling voltage domains.

   - A large update for the Tegra memory controller driver, integrating
     it better with the interconnect framework

   - The memory controller subsystem gains support for Mediatek MT8192

   - The reset controller framework gains support for sharing pulsed
     resets

  For Soc specific drivers in drivers/soc, the main changes are

   - The Allwinner/sunxi MBUS gets a rework for the way it handles
     dma_map_ops and offsets between physical and dma address spaces.

   - An errata fix plus some cleanups for Freescale Layerscape SoCs

   - A cleanup for renesas drivers regarding MMIO accesses.

   - New SoC specific drivers for Mediatek MT8192 and MT8183 power
     domains

   - New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC
     identification.

   - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and
     SDX55.

   - A rework of the TI AM33xx 'genpd' power domain support to use
     information from DT instead of platform data

   - Support for TI AM64x SoCs

   - Allow building some Amlogic drivers as modules instead of built-in

  Finally, there are numerous cleanups and smaller bug fixes for
  Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips,
  Renesas, and Xilinx SoCs"

* tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits)
  soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS
  firmware: xilinx: Properly align function parameter
  firmware: xilinx: Add a blank line after function declaration
  firmware: xilinx: Remove additional newline
  firmware: xilinx: Fix kernel-doc warnings
  firmware: xlnx-zynqmp: fix compilation warning
  soc: xilinx: vcu: add missing register NUM_CORE
  soc: xilinx: vcu: use vcu-settings syscon registers
  dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
  soc: xilinx: vcu: drop useless success message
  clk: samsung: mark PM functions as __maybe_unused
  soc: samsung: exynos-chipid: initialize later - with arch_initcall
  soc: samsung: exynos-chipid: order list of SoCs by name
  memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe()
  memory: ti-emif-sram: only build for ARMv7
  memory: tegra30: Support interconnect framework
  memory: tegra20: Support hardware versioning and clean up OPP table initialization
  dt-bindings: memory: tegra20-emc: Document opp-supported-hw property
  soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe()
  reset-controller: ti: force the write operation when assert or deassert
  ...
2020-12-16 16:38:41 -08:00
Grygorii Strashko
d782298c6f soc: ti: k3-ringacc: add AM64 DMA rings support.
The DMAs in AM64 have built in rings compared to AM654/J721e/J7200 where a
separate and generic ringacc is used.

The ring SW interface is similar to ringacc with some major architectural
differences, like

They are part of the DMA (BCDMA or PKTDMA).

They are dual mode rings are modeled as pair of Rings objects which has
common configuration and memory buffer, but separate real-time control
register sets for each direction mem2dev (forward) and dev2mem (reverse).

The ringacc driver must be initialized for DMA rings use with
k3_ringacc_dmarings_init() as it is not an independent device as ringacc
is.

AM64 rings must be requested only using k3_ringacc_request_rings_pair(),
and forward ring must always be initialized/configured. After this any
other Ringacc APIs can be used without any callers changes.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20201208090440.31792-17-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-12-11 21:20:09 +05:30
Arnd Bergmann
8dc0aac1cc Merge tag 'drivers_soc_for_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers
drivers: soc: TI SOC changes for 5.11

- ti_sci changes towards DMSS support
- Static warning fixes
- Kconfig update for Keystone ARM64 socs
- AM64X SOC family support

* tag 'drivers_soc_for_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (23 commits)
  drivers: soc: ti: knav_qmss_queue: Fix error return code in knav_queue_probe
  soc: ti: Fix reference imbalance in knav_dma_probe
  soc: ti: pruss: Remove wrong check against *get_match_data return value
  soc: ti: Kconfig: Drop ARM64 SoC specific configs
  soc: ti: k3-ringacc: Provide documentation for 'k3_ring's 'state'
  soc: ti: wkup_m3_ipc: Document 'm3_ipc' parameter throughout
  soc: ti: pm33xx: Remove set but unused variable 'ret'
  soc: ti: knav_dma: Fix a kernel function doc formatting issue
  soc: ti: knav_qmss_queue: Fix a whole host of function documentation issues
  soc: ti: knav_qmss_queue: Remove set but unchecked variable 'ret'
  soc: ti: omap-prm: Do not check rstst bit on deassert if already deasserted
  soc: ti: knav_qmss: fix reference leak in knav_queue_probe
  soc: ti: k3-socinfo: Add entry for AM64X SoC family
  soc: ti: k3-ringacc: Use correct device for allocation in RING mode
  firmware: ti_sci: rm: Remove unused config() from ti_sci_rm_ringacc_ops
  soc: ti: k3-ringacc: Use the ti_sci set_cfg callback for ring configuration
  firmware: ti_sci: rm: Add new ops for ring configuration
  firmware: ti_sci: rm: Remove ring_get_config support
  firmware: ti_sci: rm: Add support for extended_ch_type for tx channel
  soc: ti: ti_sci_inta_msi: Add support for second range in resource ranges
  ...

Link: https://lore.kernel.org/r/1606851405-26338-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09 00:39:54 +01:00
Arnd Bergmann
a97d8ffac8 Merge tag 'qcom-drivers-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.11

This adds support for the core power domains on MSM8916, MSM8939, SDM660
and SDX55. It adds SM8150 support to the last-level cache controller
driver and it makes it possible to build the Command DB and RPMh drivers
as modules.

It also contains a slew of smaller cleanups, style and bug fixes
throughout the various drivers.

* tag 'qcom-drivers-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (39 commits)
  soc: qcom: rpmhpd: Add SDX55 power domains
  dt-bindings: power: Add rpm power domain bindings for sdx55
  soc: qcom: rpmh: Use __fill_rpmh_msg API during rpmh_write()
  samples: qmi: Constify static qmi ops
  soc: qcom: pdr: Constify static qmi structs
  soc: qcom: initialize local variable
  soc: qcom: socinfo: add soc ids for msm8953 variants
  soc: qcom: geni: Remove "iova" check
  soc: qcom: llcc: Add configuration data for SM8150
  dt-bindings: msm: Add LLCC for SM8150
  soc: qcom: rpmh: Fix possible doc-rot in rpmh_write()'s header
  soc: qcom: kryo-l2-accessors: Fix misnaming of 'val'
  soc: qcom: rpmhpd: Provide some missing struct member descriptions
  soc: qcom: llcc-qcom: Fix expected kernel-doc formatting
  soc: qcom: smp2p: Remove unused struct attribute provide another
  soc: qcom: wcnss_ctrl: Demote non-conformant struct header and fix function headers
  soc: qcom: smsm: Fix some kernel-doc formatting and naming problems
  soc: qcom: smem: Fix formatting and missing documentation issues
  soc: qcom: qcom-geni-se: Fix misnamed function parameter 'rx_rfr'
  soc: qcom: qcom_aoss: Add missing description for 'cooling_devs'
  ...

Link: https://lore.kernel.org/r/20201130190142.345246-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09 00:39:52 +01:00
Yongqiang Niu
51c0e618b2 soc / drm: mediatek: Move DDP component defines into mtk-mmsys.h
MMSYS is the driver which controls the routing of these DDP components,
so the definition of the mtk_ddp_comp_id enum should be placed in mtk-mmsys.h

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20201006193320.405529-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-28 00:34:23 +01:00
Chun-Kuang Hu
a69dcdfc2d soc / drm: mediatek: cmdq: Remove timeout handler in helper function
For each client driver, its timeout handler need to dump hardware register
or its state machine information, and their way to detect timeout are
also different, so remove timeout handler in helper function and
let client driver implement its own timeout handler.

Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20201102000438.29225-1-chunkuang.hu@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 23:35:34 +01:00
Weiyi Lu
a49d5e7a89 soc: mediatek: pm-domains: Add support for mt8192
Add the needed board data to support mt8192 SoC.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Weiyi Lu <weiyi.lu@mediatek.com>
Link: https://lore.kernel.org/r/20201030113622.201188-17-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:43 +01:00
Matthias Brugger
eb9fa767fb soc: mediatek: pm-domains: Add support for mt8183
Add the needed board data to support mt8183 SoC.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-12-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:43 +01:00
Matthias Brugger
928296ea5d soc: mediatek: pm_domains: Make bus protection generic
Bus protection is not exclusively done by calling the infracfg misc driver.
Make the calls for setting and clearing the bus protection generic so
that we can use other blocks for it as well.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-6-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:42 +01:00
Srujana Challa
956fb85218 octeontx2-pf: move lmt flush to include/linux/soc
On OcteonTX2 platform CPT instruction enqueue and NIX
packet send are only possible via LMTST operations which
uses LDEOR instruction. This patch moves lmt flush
function from OcteonTX2 nic driver to include/linux/soc
since it will be used by OcteonTX2 CPT and NIC driver for
LMTST.

Signed-off-by: Suheil Chandran <schandran@marvell.com>
Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-20 11:01:13 -08:00
Souradeep Chowdhury
ded5ed04d8 soc: qcom: llcc: Add configuration data for SM8150
Add LLCC configuration data for SM8150 SoC which controls
LLCC behaviour.

Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org>
Link: https://lore.kernel.org/r/957e3ae50c75720ef6227529d5ce3d4b457802e9.1601452132.git.schowdhu@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-19 22:22:25 -06:00
Peter Ujfalusi
8c42379e40 soc: ti: k3-ringacc: Use correct device for allocation in RING mode
In RING mode the ringacc does not access the ring memory. In this access
mode the ringacc coherency does not have meaning.

If the ring is configured in RING mode, then the ringacc itself will not
access to the ring memory. Only the requester (user) of the ring is going
to read/write to the memory.
Extend the ring configuration parameters with a device pointer to be used
for DMA API when the ring is configured in RING mode.

Extending the ring configuration struct will allow per ring selection of
device to be used for allocation, thus allowing per ring coherency.

To avoid regression, fall back to use the ringacc dev in case the alloc_dev
is not provided.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:38:05 -08:00
Peter Ujfalusi
fed7552f1e firmware: ti_sci: rm: Remove unused config() from ti_sci_rm_ringacc_ops
The ringacc driver has been converted to use the new set_cfg function to
configure the ring, the old config ops can be removed.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:38:04 -08:00
Peter Ujfalusi
3c2017536f firmware: ti_sci: rm: Add new ops for ring configuration
The sysfw ring configuration message has been extended to include virtid
and asel value for the ring.
Add the ASEL_VALID to TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER as it is required
for DMA rings.

Instead of extending the current .config() ops - which would need same
patch change in the ringacc driver - add ti_sci_msg_rm_ring_cfg struct and
a new ops using it to configure the ring.

This will allow easy update path in case new members are added for the ring
configuration.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:38:02 -08:00