This patch is related to re-init processing on suspend/resume.
When card is resuming, some register is reset. If card is removable,
maybe controller should be rescan for card. But if assume card is
non-removable, need to restore the old value at registers.
We store the value of FIFOTH at probe time and then restore it in
dw_mci_resume().
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Will Newton <will.newton@imgtec.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
This patch adds quirks and capabilities to platdata.
Some cards don't use the CDn pin; in that case, we assume the card's
inserted. Some boards need other capabilities. So, we add capabilities
in the board's platdata.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Will Newton <will.newton@imgtec.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
If we need some quirks, maybe add quirks in future
But now, quirks value set to integer..later we should be confused..
So I think that need bit-shift control.
And If we need not any quirks, we didn't set anything..
(Need not DW_MCI_QUIRK_NONE)
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Will Newton <will.newton@imgtec.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Some sdio card are not following sdio standard, and do not work
when the sdio bus's clock is gated.
To keep functionnality for all legacy driver, we turn this quirk on
for every sdio card.
Drivers needs to disable the quirk manually when someone verifies that
their supported card works with clock gating.
Signed-off-by: Pierre Tardy <tardyp@gmail.com>
Acked-by: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Some cards have quirks valid for every platforms using current
platform quirk hooks leads to a lot of code and debug duplication.
So we inspire a bit from what exists in PCI subsystem and do our own
per vendorid/deviceid quirk. We still drop the complexity of the pci
quirk system (with special section tables, and so on).
That can be added later if needed.
Signed-off-by: Pierre Tardy <pierre.tardy@intel.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Enhanced area feature is a new feature defined in eMMC4.4 standard. This
user data area provides higher performance/reliability, at the expense
of using twice the effective media space due to the area using SLC.
The MMC driver now reads out the enhanced area offset and size and adds
them to the device attributes in sysfs. Enabling the enhanced area can
only be done once, and should be done in manufacturing. To use this
feature, bit ERASE_GRP_DEF should also be set.
Documentation/ABI/testing/sysfs-devices-mmc describes the two new
attributes.
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Reviewed-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
When using the I/O accessors in raw mode from the boot stubs we don't
want to bother with any of the complexity associated with readl/writel
and friends. Furthermore, utilization within the context of the host
driver itself is all performed on an ioremapped window, so using the
__raw variants there doesn't pose any problem either.
If and when barriers need to be added in the future, these will need to
be explicitly written out, but this is so far not a concern for any of
the affected CPUs in question.
This fixes up the link error introduced by the ARM tree via its barrier
refactoring:
arch/arm/boot/compressed/mmcif-sh7372.o: In function `mmcif_loader':
mmcif-sh7372.c:(.text+0x9e8): undefined reference to `outer_cache
Following the change in:
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6275/1
Reported-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds the mmc host driver for the Synopsys DesignWare mmc
host controller, found in a number of embedded SoC designs.
Signed-off-by: Will Newton <will.newton@imgtec.com>
Reviewed-by: Matt Fleming <matt@console-pimps.org>
Reviewed-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
Some controllers misparse segment length 0 as being 0, not 65536. Add
a quirk to deal with it.
Signed-off-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
Some old MMC devices fail with the 4/8 bits the driver tries to use
exclusively. This patch adds a test for the given bus setup and falls
back to the lower bit mode (until 1-bit mode) when the test fails.
[Major rework and refactoring by tiwai]
[Quirk addition and many fixes by prakity]
Signed-off-by: Aries Lee <arieslee@jmicron.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Philip Rakity <prakity@marvell.com>
Tested-by: Philip Rakity <prakity@marvell.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Upon system resume, SDIO core must reinitialize cards that were
powered off during suspend.
If the card had its power kept during suspend (and thus it is
'powered-resumed'), SDIO core performs only a limited reinitializing,
mainly needed to make sure that the card wasn't removed/replaced.
If a __nonremovable__ card is powered-resumed, we can safely skip the
reinitializing phase.
Note: 9b966aa (mmc: sdio: fully reconfigure oldcard on resume) removed
the bus width reconfiguration since mmc_sdio_init_card already does it.
It is brought back now in case mmc_sdio_init_card is skipped.
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
JMicron 388 SD/MMC combo controller supports the 1.8V low-voltage for
SD, but MMC doesn't work with the low-voltage, resulting in an error
at probing.
This patch adds the support for multiple voltage mask per device type,
so that SD works with 1.8V while MMC forces 3.3V. Here new ocr_avail_*
fields for each device are introduced, so that the actual OCR mask is
switched dynamically.
Also, the restriction of low-voltage in core/sd.c is removed when the
bit is allowed explicitly via ocr_avail_sd mask.
This patch was rewritten from scratch based on Aries' original code.
Signed-off-by: Aries Lee <arieslee@jmicron.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Reviewed-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
This patch modifies the MMC core code to optionally call the set_ios()
operation on the driver with the clock frequency set to 0 (gate) after
a grace period of at least 8 MCLK cycles, then restore it (ungate)
before any new request. This gives the driver the option to shut down
the MCI clock to the MMC/SD card when the clock frequency is 0, i.e.
the core has stated that the MCI clock does not need to be generated.
It is inspired by existing clock gating code found in the OMAP and
Atmel drivers and brings this up to the host abstraction. Gating is
performed before and after any MMC request.
This patchset implements this for the MMCI/PL180 MMC/SD host controller,
but it should be simple to switch OMAP/Atmel over to using this instead.
mmc_set_{gated,ungated}() add variable protection to the state holders
for the clock gating code. This is particularly important when ordinary
.set_ios() calls would race with the .set_ios() call resulting from a
delayed gate operation.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Reviewed-by: Chris Ball <cjb@laptop.org>
Tested-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
As the only caller of sh_mmcif_boot_do_read() is
sh_mmcif_boot_slurp() the configuration portion of
sh_mmcif_boot_slurp() can be merged into sh_mmcif_boot_do_read().
Once this is done sh_mmcif_boot_slurp() is only a call
to sh_mmcif_boot_do_read() with platform specific information -
the offset that images are stored on MMC. So make the
sh_mmcif_boot_do_read() call directly from platform code
and remove sh_mmcif_boot_slurp() altogether.
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This resolves a regression that I introduced in
"mmc, sh: Move constants to sh_mmcif.h". Having
examined the manual and tested the code on an AP4EVB board
it seems that the correct sequence is.
1) Write 1 to bit 31 and zeros to all other bits
2) Write zero to all bits
Cc: Yusuke Goda <yusuke.goda.sx@renesas.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The MMCIF controller on sh-mobile platforms can use the DMA controller for data
transfers. Interface to the SH dmaengine driver to enable DMA. We also have to
lower the maximum number of segments to match with the number od DMA
descriptors on SuperH, this doesn't significantly affect driver's PIO
performance.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
