This will be used by the powergating driver to ensure proper sequencer
state when the SATA domain is powergated.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Export UTMIPLL IDDQ functions. These will be needed when powergating the
XUSB partition.
Signed-off-by: BH Hsieh <bhsieh@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Currently, TI clock driver uses an encapsulated struct that is cast into
a void pointer to store all register addresses. This can be considered
as rather nasty hackery, and prevents from expanding the register
address field also. Instead, replace all the code to use proper struct
in place for this, which contains all the previously used data.
This patch is rather large as it is touching multiple files, but this
can't be split up as we need to avoid any boot breakage.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
This has been superceded by the usage of ti_clk_ll_ops for now.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
This is not needed outside the driver, so move it inside it and remove
the prototype from the public header also.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
This will be needed to move some additional clockdomain functionality
under clock driver.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Clksel support has been deprecated a while back, so remove these from
the struct also.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Pull tegra clk driver changes from Thierry Reding:
This set of changes contains a bunch of cleanups and minor fixes along
with some new clocks, mainly on Tegra210, in preparation for supporting
DisplayPort and HDMI 2.0.
* tag 'tegra-for-4.7-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
clk: tegra: dfll: Reformat CVB frequency table
clk: tegra: dfll: Properly clean up on failure and removal
clk: tegra: dfll: Make code more comprehensible
clk: tegra: dfll: Reference CVB table instead of copying data
clk: tegra: dfll: Update kerneldoc
clk: tegra: Fix PLL_U post divider and initial rate on Tegra30
clk: tegra: Initialize PLL_C to sane rate on Tegra30
clk: tegra: Fix pllre Tegra210 and add pll_re_out1
clk: tegra: Add sor_safe clock
clk: tegra: dpaux and dpaux1 are fixed factor clocks
clk: tegra: Add dpaux1 clock
clk: tegra: Use correct parent for dpaux clock
clk: tegra: Add fixed factor peripheral clock type
clk: tegra: Special-case mipi-cal parent on Tegra114
clk: tegra: Remove trailing blank line
clk: tegra: Constify peripheral clock registers
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
On Tegra210, hardware control of the SATA and XUSB pad PLLs must be
done during the UPHY enable sequence rather than the PLLE enable
sequence. Export functions to do this so that hardware control can
be enabled from the XUSB padctl driver.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
clk: renesas: R-Car SYSC PM Domain Preparation
- Export the CPG/MSSR and CPG/MSTP attach/detach_dev callbacks, so
they can be called by the R-Car SYSC PM Domain driver.
* tag 'clk-renesas-for-v4.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: cpg-mssr: Export cpg_mssr_{at,de}tach_dev()
clk: renesas: mstp: Provide dummy attach/detach_dev callbacks
clk: renesas: Provide Kconfig symbols for CPG/MSSR and CPG/MSTP support
The R-Car SYSC PM Domain driver has to power manage devices in power
areas using clocks. To reuse code and to share knowledge of clocks
suitable for power management, this is ideally done through the existing
cpg_mssr_attach_dev() and cpg_mssr_detach_dev() callbacks.
Hence these callbacks can no longer rely on their "domain" parameter
pointing to the CPG/MSSR Clock Domain. To handle this, keep a pointer to
the clock domain in a static variable. cpg_mssr_attach_dev() has to
support probe deferral, as the R-Car SYSC PM Domain may be initialized,
and devices may be added to it, before the CPG/MSSR Clock Domain is
initialized.
Dummy callbacks are provided for the case where CPG/MSTP support is not
included, so the rcar-sysc driver won't have to care about this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Provide dummy cpg_mstp_{at,de}tach_dev() PM Domain callbacks if CPG/MSTP
support is not included, so the rcar-sysc driver won't have to care
about this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
DPLLs typically have a maximum rate they can support, and this varies
from DPLL to DPLL. Add support of the maximum rate value to the DPLL
data struct, and also add check for this in the DPLL round_rate function.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Make it clear that the "domain" parameter of the cpg_mstp_attach_dev()
and cpg_mstp_detach_dev() functions is not used.
The cpg_mstp_attach_dev() and cpg_mstp_detach_dev() callbacks are not
only used by the CPG/MSTP Clock Domain driver, but also by the R-Mobile
SYSC PM Domain driver.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
As of commit 71d076ceb2 ("ARM: shmobile: Enable PM and
PM_GENERIC_DOMAINS for SoCs with PM Domains"),
CONFIG_PM_GENERIC_DOMAINS_OF is always enabled for SoCs with MSTP
clocks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Pull clk updates from Stephen Boyd:
"The clk changes for this release cycle are mostly dominated by new
device support in terms of LoC, but there has been some cleanup in the
core as well as the usual minor clk additions to various drivers.
Core:
- parent tracking has been simplified
- CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started
- of_clk_init() doesn't consider disabled DT nodes anymore
- clk_unregister() had an error path bug squashed
- of_clk_get_parent_count() has been fixed to only return unsigned ints
- HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone
New Drivers:
- NXP LPC18xx creg
- QCOM IPQ4019 GCC
- TI dm814x ADPLL
- i.MX6QP
Updates:
- Cyngus audio clks found on Broadcom iProc devices
- Non-critical fixes for BCM2385 PLLs
- Samsung exynos5433 updates for clk id errors, HDMI support,
suspend/resume simplifications
- USB, CAN, LVDS, and FCP clks on shmobile devices
- sunxi got support for more clks on new SoCs and went through a
minor refactoring/rewrite to use a simpler factor clk construct
- rockchip added some more clk ids and added suport for fraction
dividers
- QCOM GDSCs in msm8996
- A new devm helper to make adding custom actions simpler (acked by Greg)"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (197 commits)
clk: bcm2835: fix check of error code returned by devm_ioremap_resource()
clk: renesas: div6: use RENESAS for #define
clk: renesas: Rename header file renesas.h
clk: max77{686,802}: Remove CLK_IS_ROOT
clk: versatile: Remove CLK_IS_ROOT
clk: sunxi: Remove use of variable length array
clk: fixed-rate: Remove CLK_IS_ROOT
clk: qcom: Remove CLK_IS_ROOT
doc: dt: add documentation for lpc1850-creg-clk driver
clk: add lpc18xx creg clk driver
clk: lpc32xx: fix compilation warning
clk: xgene: Add missing parenthesis when clearing divider value
clk: mb86s7x: Remove CLK_IS_ROOT
clk: x86: Remove clkdev.h and clk.h includes
clk: x86: Remove CLK_IS_ROOT
clk: mvebu: Remove CLK_IS_ROOT
clk: renesas: move drivers to renesas directory
clk: si5{14,351,70}: Remove CLK_IS_ROOT
clk: scpi: Remove CLK_IS_ROOT
clk: s2mps11: Remove CLK_IS_ROOT
...
This is part of an ongoing process to migrate from ARCH_SHMOBILE to
ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs.
Along with the above mentioned Kconfig changes it seems appropriate
to also rename files.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Convert DPLL support code to use clk_hw pointers for reference and bypass
clocks. This allows us to use clk_hw_* APIs for accessing any required
parameters for these clocks, avoiding some locking problems at least with
DPLL enable code; this used clk_get_rate which uses mutex but isn't
good under clk_enable / clk_disable.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Pull ARM SoC multiplatform code updates from Arnd Bergmann:
"This branch is the culmination of 5 years of effort to bring the ARMv6
and ARMv7 platforms together such that they can all be enabled and
boot the same kernel. It has been a tremendous amount of cleanup and
refactoring by a huge number of people, and creation of several new
(and major) subsystems to better abstract out all the platform details
in an appropriate manner.
The bulk of this branch is a large patchset from Arnd that brings
several of the more minor and older platforms we have closer to
multiplatform support. Among these are MMP, S3C64xx, Orion5x, mv78xx0
and realview Much of this is moving around header files from old mach
directories, but there are also some cleanup patches of debug_ll
(lowlevel debug per-platform options) and other parts.
Linus Walleij also has some patchs to clean up the older ARM Realview
platforms by finally introducing DT support, and Rob Herring has some
for ARM Versatile which is now DT-only. Both of these platforms are
now multiplatform.
Finally, a couple of patches from Russell for Dove PMU, and a fix from
Valentin Rothberg for Exynos ADC, which were rebased on top of the
series to avoid conflicts"
* tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (75 commits)
ARM: realview: don't select SMP_ON_UP for UP builds
ARM: s3c: simplify s3c_irqwake_{e,}intallow definition
ARM: s3c64xx: fix pm-debug compilation
iio: exynos-adc: fix irqf_oneshot.cocci warnings
ARM: realview: build realview-dt SMP support only when used
ARM: realview: select apropriate targets
ARM: realview: clean up header files
ARM: realview: make all header files local
ARM: no longer make CPU targets visible separately
ARM: integrator: use explicit core module options
ARM: realview: enable multiplatform
ARM: make default platform work for NOMMU
ARM: debug-ll: move DEBUG_LL_UART_EFM32 to correct Kconfig location
ARM: defconfig: use correct debug_ll settings
ARM: versatile: convert to multi-platform
ARM: versatile: merge mach code into a single file
ARM: versatile: switch to DT only booting and remove legacy code
ARM: versatile: add DT based PCI detection
ARM: pxa: mark ezx structures as __maybe_unused
ARM: pxa: mark raumfeld init functions as __maybe_unused
...
Pull non-urgent ARM SoC fixes from Olof Johansson:
"As usual, we queue up a few fixes that don't seem urgent enough to go
in through -rc.
- MAINTAINERS updates to add a list for brcmstb and fix a typo
- A handful of fixes for OMAP 81xx, a recently resurrected platform
so these can't be considered real regressions and thus got queued.
- A couple of other small fixes for scoop, sa1100 and davinci"
* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: OMAP2+: Fix randconfig build warning for dm814_pllss_data
ARM: sa1100/simpad: Be sure to clamp return value
ARM: scoop: Be sure to clamp return value
ARM: davinci: fix a problematic usage of WARN()
ARM: davinci: only select WT cache if cache is enabled
ARM: OMAP2+: Remove useless check for legacy booting for dm814x
ARM: OMAP2+: Enable GPIO for dm814x
ARM: dts: Fix dm814x pinctrl address and mask
ARM: dts: Fix dm8148 control modules ranges
ARM: OMAP2+: Fix timer entries for dm814x
ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting
ARM: OMAP2+: Add DPPLS clock manager for dm814x
clk: ti: Add few dm814x clock aliases
ARM: dts: Fix dm814x entries for pllss and prcm
MAINTAINERS: gpio-brcmstb: Remove stray '>'
MAINTAINERS: brcmstb: Include Broadcom internal mailing-list
