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ARM: SAMSUNG: Remove remaining legacy code
After refactoring suspend/resume, which was last part with dependencies on legacy code, all Kconfig symbols related to Samsung ATAGS support can be deselected and more unused code removed. This includes most of s5p-* code as well, as s5pv210 was their last user. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Tomasz Figa
Kukjin Kim
@@ -1,26 +0,0 @@
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/*
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* Copyright (C) 2010 Samsung Electronics Co. Ltd.
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* Jaswinder Singh <jassi.brar@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __MACH_DMA_H
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#define __MACH_DMA_H
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/* This platform uses the common DMA API driver for PL330 */
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#include <plat/dma-pl330.h>
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#endif /* __MACH_DMA_H */
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@@ -1,140 +0,0 @@
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/* linux/arch/arm/mach-s5pv210/include/mach/gpio.h
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5PV210 - GPIO lib support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_GPIO_H
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#define __ASM_ARCH_GPIO_H __FILE__
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/* Practically, GPIO banks up to MP03 are the configurable gpio banks */
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/* GPIO bank sizes */
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#define S5PV210_GPIO_A0_NR (8)
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#define S5PV210_GPIO_A1_NR (4)
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#define S5PV210_GPIO_B_NR (8)
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#define S5PV210_GPIO_C0_NR (5)
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#define S5PV210_GPIO_C1_NR (5)
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#define S5PV210_GPIO_D0_NR (4)
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#define S5PV210_GPIO_D1_NR (6)
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#define S5PV210_GPIO_E0_NR (8)
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#define S5PV210_GPIO_E1_NR (5)
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#define S5PV210_GPIO_F0_NR (8)
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#define S5PV210_GPIO_F1_NR (8)
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#define S5PV210_GPIO_F2_NR (8)
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#define S5PV210_GPIO_F3_NR (6)
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#define S5PV210_GPIO_G0_NR (7)
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#define S5PV210_GPIO_G1_NR (7)
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#define S5PV210_GPIO_G2_NR (7)
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#define S5PV210_GPIO_G3_NR (7)
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#define S5PV210_GPIO_H0_NR (8)
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#define S5PV210_GPIO_H1_NR (8)
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#define S5PV210_GPIO_H2_NR (8)
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#define S5PV210_GPIO_H3_NR (8)
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#define S5PV210_GPIO_I_NR (7)
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#define S5PV210_GPIO_J0_NR (8)
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#define S5PV210_GPIO_J1_NR (6)
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#define S5PV210_GPIO_J2_NR (8)
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#define S5PV210_GPIO_J3_NR (8)
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#define S5PV210_GPIO_J4_NR (5)
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#define S5PV210_GPIO_MP01_NR (8)
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#define S5PV210_GPIO_MP02_NR (4)
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#define S5PV210_GPIO_MP03_NR (8)
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#define S5PV210_GPIO_MP04_NR (8)
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#define S5PV210_GPIO_MP05_NR (8)
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/* GPIO bank numbers */
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/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
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* space for debugging purposes so that any accidental
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* change from one gpio bank to another can be caught.
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*/
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#define S5PV210_GPIO_NEXT(__gpio) \
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((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
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enum s5p_gpio_number {
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S5PV210_GPIO_A0_START = 0,
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S5PV210_GPIO_A1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A0),
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S5PV210_GPIO_B_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A1),
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S5PV210_GPIO_C0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_B),
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S5PV210_GPIO_C1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C0),
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S5PV210_GPIO_D0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C1),
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S5PV210_GPIO_D1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D0),
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S5PV210_GPIO_E0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D1),
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S5PV210_GPIO_E1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E0),
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S5PV210_GPIO_F0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E1),
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S5PV210_GPIO_F1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F0),
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S5PV210_GPIO_F2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F1),
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S5PV210_GPIO_F3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F2),
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S5PV210_GPIO_G0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F3),
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S5PV210_GPIO_G1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G0),
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S5PV210_GPIO_G2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G1),
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S5PV210_GPIO_G3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G2),
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S5PV210_GPIO_H0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G3),
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S5PV210_GPIO_H1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H0),
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S5PV210_GPIO_H2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H1),
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S5PV210_GPIO_H3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H2),
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S5PV210_GPIO_I_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H3),
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S5PV210_GPIO_J0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_I),
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S5PV210_GPIO_J1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J0),
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S5PV210_GPIO_J2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1),
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S5PV210_GPIO_J3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2),
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S5PV210_GPIO_J4_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3),
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S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4),
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S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01),
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S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02),
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S5PV210_GPIO_MP04_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP03),
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S5PV210_GPIO_MP05_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP04),
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};
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/* S5PV210 GPIO number definitions */
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#define S5PV210_GPA0(_nr) (S5PV210_GPIO_A0_START + (_nr))
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#define S5PV210_GPA1(_nr) (S5PV210_GPIO_A1_START + (_nr))
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#define S5PV210_GPB(_nr) (S5PV210_GPIO_B_START + (_nr))
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#define S5PV210_GPC0(_nr) (S5PV210_GPIO_C0_START + (_nr))
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#define S5PV210_GPC1(_nr) (S5PV210_GPIO_C1_START + (_nr))
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#define S5PV210_GPD0(_nr) (S5PV210_GPIO_D0_START + (_nr))
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#define S5PV210_GPD1(_nr) (S5PV210_GPIO_D1_START + (_nr))
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#define S5PV210_GPE0(_nr) (S5PV210_GPIO_E0_START + (_nr))
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#define S5PV210_GPE1(_nr) (S5PV210_GPIO_E1_START + (_nr))
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#define S5PV210_GPF0(_nr) (S5PV210_GPIO_F0_START + (_nr))
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#define S5PV210_GPF1(_nr) (S5PV210_GPIO_F1_START + (_nr))
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#define S5PV210_GPF2(_nr) (S5PV210_GPIO_F2_START + (_nr))
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#define S5PV210_GPF3(_nr) (S5PV210_GPIO_F3_START + (_nr))
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#define S5PV210_GPG0(_nr) (S5PV210_GPIO_G0_START + (_nr))
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#define S5PV210_GPG1(_nr) (S5PV210_GPIO_G1_START + (_nr))
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#define S5PV210_GPG2(_nr) (S5PV210_GPIO_G2_START + (_nr))
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#define S5PV210_GPG3(_nr) (S5PV210_GPIO_G3_START + (_nr))
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#define S5PV210_GPH0(_nr) (S5PV210_GPIO_H0_START + (_nr))
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#define S5PV210_GPH1(_nr) (S5PV210_GPIO_H1_START + (_nr))
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#define S5PV210_GPH2(_nr) (S5PV210_GPIO_H2_START + (_nr))
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#define S5PV210_GPH3(_nr) (S5PV210_GPIO_H3_START + (_nr))
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#define S5PV210_GPI(_nr) (S5PV210_GPIO_I_START + (_nr))
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#define S5PV210_GPJ0(_nr) (S5PV210_GPIO_J0_START + (_nr))
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#define S5PV210_GPJ1(_nr) (S5PV210_GPIO_J1_START + (_nr))
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#define S5PV210_GPJ2(_nr) (S5PV210_GPIO_J2_START + (_nr))
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#define S5PV210_GPJ3(_nr) (S5PV210_GPIO_J3_START + (_nr))
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#define S5PV210_GPJ4(_nr) (S5PV210_GPIO_J4_START + (_nr))
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#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr))
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#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr))
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#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr))
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#define S5PV210_MP04(_nr) (S5PV210_GPIO_MP04_START + (_nr))
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#define S5PV210_MP05(_nr) (S5PV210_GPIO_MP05_START + (_nr))
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/* the end of the S5PV210 specific gpios */
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#define S5PV210_GPIO_END (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + 1)
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#define S3C_GPIO_END S5PV210_GPIO_END
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/* define the number of gpios we need to the one after the MP05() range */
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#define ARCH_NR_GPIOS (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + \
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CONFIG_SAMSUNG_GPIO_EXTRA + 1)
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#endif /* __ASM_ARCH_GPIO_H */
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@@ -1,18 +0,0 @@
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/* linux/arch/arm/mach-s5pv210/include/mach/hardware.h
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5PV210 - Hardware support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H __FILE__
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/* currently nothing here, placeholder */
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#endif /* __ASM_ARCH_HARDWARE_H */
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@@ -1,137 +0,0 @@
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/* linux/arch/arm/mach-s5pv210/include/mach/irqs.h
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5PV210 - IRQ definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H __FILE__
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#include <plat/irqs.h>
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/* VIC0: System, DMA, Timer */
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#define IRQ_EINT16_31 S5P_IRQ_VIC0(16)
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#define IRQ_BATF S5P_IRQ_VIC0(17)
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#define IRQ_MDMA S5P_IRQ_VIC0(18)
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#define IRQ_PDMA0 S5P_IRQ_VIC0(19)
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#define IRQ_PDMA1 S5P_IRQ_VIC0(20)
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#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21)
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#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22)
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#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23)
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#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24)
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#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25)
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#define IRQ_SYSTIMER S5P_IRQ_VIC0(26)
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#define IRQ_WDT S5P_IRQ_VIC0(27)
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#define IRQ_RTC_ALARM S5P_IRQ_VIC0(28)
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#define IRQ_RTC_TIC S5P_IRQ_VIC0(29)
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#define IRQ_GPIOINT S5P_IRQ_VIC0(30)
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#define IRQ_FIMC3 S5P_IRQ_VIC0(31)
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/* VIC1: ARM, Power, Memory, Connectivity, Storage */
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#define IRQ_PMU S5P_IRQ_VIC1(0)
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#define IRQ_CORTEX1 S5P_IRQ_VIC1(1)
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#define IRQ_CORTEX2 S5P_IRQ_VIC1(2)
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#define IRQ_CORTEX3 S5P_IRQ_VIC1(3)
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#define IRQ_CORTEX4 S5P_IRQ_VIC1(4)
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#define IRQ_IEMAPC S5P_IRQ_VIC1(5)
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#define IRQ_IEMIEC S5P_IRQ_VIC1(6)
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#define IRQ_ONENAND S5P_IRQ_VIC1(7)
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#define IRQ_NFC S5P_IRQ_VIC1(8)
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#define IRQ_CFCON S5P_IRQ_VIC1(9)
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#define IRQ_UART0 S5P_IRQ_VIC1(10)
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#define IRQ_UART1 S5P_IRQ_VIC1(11)
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#define IRQ_UART2 S5P_IRQ_VIC1(12)
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#define IRQ_UART3 S5P_IRQ_VIC1(13)
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#define IRQ_IIC S5P_IRQ_VIC1(14)
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#define IRQ_SPI0 S5P_IRQ_VIC1(15)
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#define IRQ_SPI1 S5P_IRQ_VIC1(16)
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#define IRQ_SPI2 S5P_IRQ_VIC1(17)
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#define IRQ_IRDA S5P_IRQ_VIC1(18)
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#define IRQ_IIC2 S5P_IRQ_VIC1(19)
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#define IRQ_IIC_HDMIPHY S5P_IRQ_VIC1(20)
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#define IRQ_HSIRX S5P_IRQ_VIC1(21)
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#define IRQ_HSITX S5P_IRQ_VIC1(22)
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#define IRQ_UHOST S5P_IRQ_VIC1(23)
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#define IRQ_OTG S5P_IRQ_VIC1(24)
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#define IRQ_MSM S5P_IRQ_VIC1(25)
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#define IRQ_HSMMC0 S5P_IRQ_VIC1(26)
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#define IRQ_HSMMC1 S5P_IRQ_VIC1(27)
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#define IRQ_HSMMC2 S5P_IRQ_VIC1(28)
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#define IRQ_MIPI_CSIS S5P_IRQ_VIC1(29)
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#define IRQ_MIPIDSI S5P_IRQ_VIC1(30)
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#define IRQ_ONENAND_AUDI S5P_IRQ_VIC1(31)
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/* VIC2: Multimedia, Audio, Security */
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#define IRQ_LCD0 S5P_IRQ_VIC2(0)
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#define IRQ_LCD1 S5P_IRQ_VIC2(1)
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#define IRQ_LCD2 S5P_IRQ_VIC2(2)
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#define IRQ_LCD3 S5P_IRQ_VIC2(3)
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#define IRQ_ROTATOR S5P_IRQ_VIC2(4)
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#define IRQ_FIMC0 S5P_IRQ_VIC2(5)
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#define IRQ_FIMC1 S5P_IRQ_VIC2(6)
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#define IRQ_FIMC2 S5P_IRQ_VIC2(7)
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#define IRQ_JPEG S5P_IRQ_VIC2(8)
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#define IRQ_2D S5P_IRQ_VIC2(9)
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#define IRQ_3D S5P_IRQ_VIC2(10)
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#define IRQ_MIXER S5P_IRQ_VIC2(11)
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#define IRQ_HDMI S5P_IRQ_VIC2(12)
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#define IRQ_IIC1 S5P_IRQ_VIC2(13)
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#define IRQ_MFC S5P_IRQ_VIC2(14)
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#define IRQ_SDO S5P_IRQ_VIC2(15)
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#define IRQ_I2S0 S5P_IRQ_VIC2(16)
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#define IRQ_I2S1 S5P_IRQ_VIC2(17)
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#define IRQ_I2S2 S5P_IRQ_VIC2(18)
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#define IRQ_AC97 S5P_IRQ_VIC2(19)
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#define IRQ_PCM0 S5P_IRQ_VIC2(20)
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#define IRQ_PCM1 S5P_IRQ_VIC2(21)
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#define IRQ_SPDIF S5P_IRQ_VIC2(22)
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#define IRQ_ADC S5P_IRQ_VIC2(23)
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#define IRQ_PENDN S5P_IRQ_VIC2(24)
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#define IRQ_TC IRQ_PENDN
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#define IRQ_KEYPAD S5P_IRQ_VIC2(25)
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#define IRQ_CG S5P_IRQ_VIC2(26)
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#define IRQ_SSS_INT S5P_IRQ_VIC2(27)
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#define IRQ_SSS_HASH S5P_IRQ_VIC2(28)
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#define IRQ_PCM2 S5P_IRQ_VIC2(29)
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#define IRQ_SDMIRQ S5P_IRQ_VIC2(30)
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#define IRQ_SDMFIQ S5P_IRQ_VIC2(31)
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/* VIC3: Etc */
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#define IRQ_IPC S5P_IRQ_VIC3(0)
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#define IRQ_HOSTIF S5P_IRQ_VIC3(1)
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#define IRQ_HSMMC3 S5P_IRQ_VIC3(2)
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#define IRQ_CEC S5P_IRQ_VIC3(3)
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#define IRQ_TSI S5P_IRQ_VIC3(4)
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#define IRQ_MDNIE0 S5P_IRQ_VIC3(5)
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#define IRQ_MDNIE1 S5P_IRQ_VIC3(6)
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#define IRQ_MDNIE2 S5P_IRQ_VIC3(7)
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#define IRQ_MDNIE3 S5P_IRQ_VIC3(8)
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#define IRQ_VIC_END S5P_IRQ_VIC3(31)
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#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
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#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
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|
||||
/* GPIO interrupt */
|
||||
#define S5P_GPIOINT_BASE (IRQ_EINT(31) + 1)
|
||||
#define S5P_GPIOINT_GROUP_MAXNR 22
|
||||
|
||||
/* Set the default NR_IRQS */
|
||||
#define NR_IRQS (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
|
||||
|
||||
/* Compatibility */
|
||||
#define IRQ_LCD_FIFO IRQ_LCD0
|
||||
#define IRQ_LCD_VSYNC IRQ_LCD1
|
||||
#define IRQ_LCD_SYSTEM IRQ_LCD2
|
||||
#define IRQ_MIPI_CSIS0 IRQ_MIPI_CSIS
|
||||
|
||||
#endif /* ASM_ARCH_IRQS_H */
|
||||
@@ -1,158 +0,0 @@
|
||||
/* linux/arch/arm/mach-s5pv210/include/mach/map.h
|
||||
*
|
||||
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com/
|
||||
*
|
||||
* S5PV210 - Memory map definitions
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_MAP_H
|
||||
#define __ASM_ARCH_MAP_H __FILE__
|
||||
|
||||
#include <plat/map-base.h>
|
||||
#include <plat/map-s5p.h>
|
||||
|
||||
#define S5PV210_PA_SDRAM 0x20000000
|
||||
|
||||
#define S5PV210_PA_SROM_BANK5 0xA8000000
|
||||
|
||||
#define S5PC110_PA_ONENAND 0xB0000000
|
||||
#define S5PC110_PA_ONENAND_DMA 0xB0600000
|
||||
|
||||
#define S5PV210_PA_CHIPID 0xE0000000
|
||||
|
||||
#define S5PV210_PA_SYSCON 0xE0100000
|
||||
|
||||
#define S5PV210_PA_GPIO 0xE0200000
|
||||
|
||||
#define S5PV210_PA_SPDIF 0xE1100000
|
||||
|
||||
#define S5PV210_PA_SPI0 0xE1300000
|
||||
#define S5PV210_PA_SPI1 0xE1400000
|
||||
|
||||
#define S5PV210_PA_KEYPAD 0xE1600000
|
||||
|
||||
#define S5PV210_PA_ADC 0xE1700000
|
||||
|
||||
#define S5PV210_PA_IIC0 0xE1800000
|
||||
#define S5PV210_PA_IIC1 0xFAB00000
|
||||
#define S5PV210_PA_IIC2 0xE1A00000
|
||||
|
||||
#define S5PV210_PA_AC97 0xE2200000
|
||||
|
||||
#define S5PV210_PA_PCM0 0xE2300000
|
||||
#define S5PV210_PA_PCM1 0xE1200000
|
||||
#define S5PV210_PA_PCM2 0xE2B00000
|
||||
|
||||
#define S5PV210_PA_TIMER 0xE2500000
|
||||
#define S5PV210_PA_SYSTIMER 0xE2600000
|
||||
#define S5PV210_PA_WATCHDOG 0xE2700000
|
||||
#define S5PV210_PA_RTC 0xE2800000
|
||||
|
||||
#define S5PV210_PA_UART 0xE2900000
|
||||
|
||||
#define S5PV210_PA_SROMC 0xE8000000
|
||||
|
||||
#define S5PV210_PA_CFCON 0xE8200000
|
||||
|
||||
#define S5PV210_PA_MFC 0xF1700000
|
||||
|
||||
#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000))
|
||||
|
||||
#define S5PV210_PA_HSOTG 0xEC000000
|
||||
#define S5PV210_PA_HSPHY 0xEC100000
|
||||
|
||||
#define S5PV210_PA_IIS0 0xEEE30000
|
||||
#define S5PV210_PA_IIS1 0xE2100000
|
||||
#define S5PV210_PA_IIS2 0xE2A00000
|
||||
|
||||
#define S5PV210_PA_DMC0 0xF0000000
|
||||
#define S5PV210_PA_DMC1 0xF1400000
|
||||
|
||||
#define S5PV210_PA_VIC0 0xF2000000
|
||||
#define S5PV210_PA_VIC1 0xF2100000
|
||||
#define S5PV210_PA_VIC2 0xF2200000
|
||||
#define S5PV210_PA_VIC3 0xF2300000
|
||||
|
||||
#define S5PV210_PA_FB 0xF8000000
|
||||
|
||||
#define S5PV210_PA_MDMA 0xFA200000
|
||||
#define S5PV210_PA_PDMA0 0xE0900000
|
||||
#define S5PV210_PA_PDMA1 0xE0A00000
|
||||
|
||||
#define S5PV210_PA_MIPI_CSIS 0xFA600000
|
||||
|
||||
#define S5PV210_PA_FIMC0 0xFB200000
|
||||
#define S5PV210_PA_FIMC1 0xFB300000
|
||||
#define S5PV210_PA_FIMC2 0xFB400000
|
||||
|
||||
#define S5PV210_PA_JPEG 0xFB600000
|
||||
|
||||
#define S5PV210_PA_SDO 0xF9000000
|
||||
#define S5PV210_PA_VP 0xF9100000
|
||||
#define S5PV210_PA_MIXER 0xF9200000
|
||||
#define S5PV210_PA_HDMI 0xFA100000
|
||||
#define S5PV210_PA_IIC_HDMIPHY 0xFA900000
|
||||
|
||||
/* Compatibiltiy Defines */
|
||||
|
||||
#define S3C_PA_FB S5PV210_PA_FB
|
||||
#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0)
|
||||
#define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1)
|
||||
#define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2)
|
||||
#define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3)
|
||||
#define S3C_PA_IIC S5PV210_PA_IIC0
|
||||
#define S3C_PA_IIC1 S5PV210_PA_IIC1
|
||||
#define S3C_PA_IIC2 S5PV210_PA_IIC2
|
||||
#define S3C_PA_RTC S5PV210_PA_RTC
|
||||
#define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG
|
||||
#define S3C_PA_WDT S5PV210_PA_WATCHDOG
|
||||
#define S3C_PA_SPI0 S5PV210_PA_SPI0
|
||||
#define S3C_PA_SPI1 S5PV210_PA_SPI1
|
||||
|
||||
#define S5P_PA_CHIPID S5PV210_PA_CHIPID
|
||||
#define S5P_PA_FIMC0 S5PV210_PA_FIMC0
|
||||
#define S5P_PA_FIMC1 S5PV210_PA_FIMC1
|
||||
#define S5P_PA_FIMC2 S5PV210_PA_FIMC2
|
||||
#define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS
|
||||
#define S5P_PA_MFC S5PV210_PA_MFC
|
||||
#define S5P_PA_IIC_HDMIPHY S5PV210_PA_IIC_HDMIPHY
|
||||
|
||||
#define S5P_PA_SDO S5PV210_PA_SDO
|
||||
#define S5P_PA_VP S5PV210_PA_VP
|
||||
#define S5P_PA_MIXER S5PV210_PA_MIXER
|
||||
#define S5P_PA_HDMI S5PV210_PA_HDMI
|
||||
|
||||
#define S5P_PA_ONENAND S5PC110_PA_ONENAND
|
||||
#define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA
|
||||
#define S5P_PA_SDRAM S5PV210_PA_SDRAM
|
||||
#define S5P_PA_SROMC S5PV210_PA_SROMC
|
||||
#define S5P_PA_SYSCON S5PV210_PA_SYSCON
|
||||
#define S5P_PA_TIMER S5PV210_PA_TIMER
|
||||
|
||||
#define S5P_PA_JPEG S5PV210_PA_JPEG
|
||||
|
||||
#define SAMSUNG_PA_ADC S5PV210_PA_ADC
|
||||
#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON
|
||||
#define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD
|
||||
#define SAMSUNG_PA_TIMER S5PV210_PA_TIMER
|
||||
|
||||
/* UART */
|
||||
|
||||
#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
|
||||
|
||||
#define S3C_PA_UART S5PV210_PA_UART
|
||||
|
||||
#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
|
||||
#define S5P_PA_UART0 S5P_PA_UART(0)
|
||||
#define S5P_PA_UART1 S5P_PA_UART(1)
|
||||
#define S5P_PA_UART2 S5P_PA_UART(2)
|
||||
#define S5P_PA_UART3 S5P_PA_UART(3)
|
||||
|
||||
#define S5P_SZ_UART SZ_256
|
||||
|
||||
#endif /* __ASM_ARCH_MAP_H */
|
||||
@@ -1,27 +0,0 @@
|
||||
/* linux/arch/arm/mach-s5pv210/include/mach/memory.h
|
||||
*
|
||||
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com/
|
||||
*
|
||||
* S5PV210 - Memory definitions
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PLAT_PHYS_OFFSET UL(0x20000000)
|
||||
|
||||
/*
|
||||
* Sparsemem support
|
||||
* Physical memory can be located from 0x20000000 to 0x7fffffff,
|
||||
* so MAX_PHYSMEM_BITS is 31.
|
||||
*/
|
||||
|
||||
#define MAX_PHYSMEM_BITS 31
|
||||
#define SECTION_SIZE_BITS 28
|
||||
|
||||
#endif /* __ASM_ARCH_MEMORY_H */
|
||||
@@ -1,46 +0,0 @@
|
||||
/* linux/arch/arm/mach-s5pv210/include/mach/pm-core.h
|
||||
*
|
||||
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* Based on arch/arm/mach-s3c2410/include/mach/pm-core.h,
|
||||
* Copyright 2008 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* http://armlinux.simtec.co.uk/
|
||||
*
|
||||
* S5PV210 - PM core support for arch/arm/plat-s5p/pm.c
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
static inline void s3c_pm_debug_init_uart(void)
|
||||
{
|
||||
/* nothing here yet */
|
||||
}
|
||||
|
||||
static inline void s3c_pm_arch_prepare_irqs(void)
|
||||
{
|
||||
__raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK);
|
||||
__raw_writel(s3c_irqwake_eintmask, S5P_EINT_WAKEUP_MASK);
|
||||
}
|
||||
|
||||
static inline void s3c_pm_arch_stop_clocks(void)
|
||||
{
|
||||
/* nothing here yet */
|
||||
}
|
||||
|
||||
static inline void s3c_pm_arch_show_resume_irqs(void)
|
||||
{
|
||||
/* nothing here yet */
|
||||
}
|
||||
|
||||
static inline void s3c_pm_arch_update_uart(void __iomem *regs,
|
||||
struct pm_uart_save *save)
|
||||
{
|
||||
/* nothing here yet */
|
||||
}
|
||||
|
||||
static inline void s3c_pm_restored_gpios(void) { }
|
||||
static inline void samsung_pm_saved_gpios(void) { }
|
||||
@@ -13,7 +13,7 @@
|
||||
#ifndef __ASM_ARCH_REGS_CLOCK_H
|
||||
#define __ASM_ARCH_REGS_CLOCK_H __FILE__
|
||||
|
||||
#include <mach/map.h>
|
||||
#include <plat/map-base.h>
|
||||
|
||||
#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
|
||||
|
||||
|
||||
@@ -1,41 +0,0 @@
|
||||
/* linux/arch/arm/mach-s5pv210/include/mach/regs-gpio.h
|
||||
*
|
||||
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* S5PV210 - GPIO (including EINT) register definitions
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_REGS_GPIO_H
|
||||
#define __ASM_ARCH_REGS_GPIO_H __FILE__
|
||||
|
||||
#include <mach/map.h>
|
||||
|
||||
#define S5PV210_EINT30CON (S5P_VA_GPIO + 0xE00)
|
||||
#define S5P_EINT_CON(x) (S5PV210_EINT30CON + ((x) * 0x4))
|
||||
|
||||
#define S5PV210_EINT30FLTCON0 (S5P_VA_GPIO + 0xE80)
|
||||
#define S5P_EINT_FLTCON(x) (S5PV210_EINT30FLTCON0 + ((x) * 0x4))
|
||||
|
||||
#define S5PV210_EINT30MASK (S5P_VA_GPIO + 0xF00)
|
||||
#define S5P_EINT_MASK(x) (S5PV210_EINT30MASK + ((x) * 0x4))
|
||||
|
||||
#define S5PV210_EINT30PEND (S5P_VA_GPIO + 0xF40)
|
||||
#define S5P_EINT_PEND(x) (S5PV210_EINT30PEND + ((x) * 0x4))
|
||||
|
||||
#define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3)
|
||||
|
||||
#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7))
|
||||
|
||||
#define EINT_MODE S3C_GPIO_SFN(0xf)
|
||||
|
||||
#define EINT_GPIO_0(x) S5PV210_GPH0(x)
|
||||
#define EINT_GPIO_1(x) S5PV210_GPH1(x)
|
||||
#define EINT_GPIO_2(x) S5PV210_GPH2(x)
|
||||
#define EINT_GPIO_3(x) S5PV210_GPH3(x)
|
||||
|
||||
#endif /* __ASM_ARCH_REGS_GPIO_H */
|
||||
@@ -1,18 +0,0 @@
|
||||
/* linux/arch/arm/mach-s5pv210/include/mach/regs-irq.h
|
||||
*
|
||||
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com/
|
||||
*
|
||||
* S5PV210 - IRQ register definitions
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_REGS_IRQ_H
|
||||
#define __ASM_ARCH_REGS_IRQ_H __FILE__
|
||||
|
||||
#include <mach/map.h>
|
||||
|
||||
#endif /* __ASM_ARCH_REGS_IRQ_H */
|
||||
@@ -1,30 +0,0 @@
|
||||
/* linux/arch/arm/mach-s5pv210/setup-i2c0.c
|
||||
*
|
||||
* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com/
|
||||
*
|
||||
* I2C0 GPIO configuration.
|
||||
*
|
||||
* Based on plat-s3c64xx/setup-i2c0.c
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
struct platform_device; /* don't need the contents */
|
||||
|
||||
#include <linux/platform_data/i2c-s3c2410.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
|
||||
void s3c_i2c0_cfg_gpio(struct platform_device *dev)
|
||||
{
|
||||
/*
|
||||
* FIXME: Used only by legacy code that is not used anymore,
|
||||
* but still compiled in, until all dependencies are removed.
|
||||
*/
|
||||
}
|
||||
@@ -6,29 +6,16 @@
|
||||
|
||||
config PLAT_SAMSUNG
|
||||
bool
|
||||
depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P || ARCH_EXYNOS
|
||||
depends on PLAT_S3C24XX || ARCH_S3C64XX || ARCH_EXYNOS || ARCH_S5PV210
|
||||
default y
|
||||
select GENERIC_IRQ_CHIP
|
||||
select NO_IOPORT_MAP
|
||||
help
|
||||
Base platform code for all Samsung SoC based systems
|
||||
|
||||
config PLAT_S5P
|
||||
bool
|
||||
depends on ARCH_S5PV210
|
||||
default y
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_VIC
|
||||
select NO_IOPORT_MAP
|
||||
select PLAT_SAMSUNG
|
||||
select S3C_GPIO_TRACK
|
||||
select S5P_GPIO_DRVSTR
|
||||
help
|
||||
Base platform code for Samsung's S5P series SoC.
|
||||
|
||||
config SAMSUNG_PM
|
||||
bool
|
||||
depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || S5P_PM)
|
||||
depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX)
|
||||
default y
|
||||
help
|
||||
Base platform power management code for samsung code
|
||||
@@ -64,31 +51,6 @@ config SAMSUNG_ATAGS
|
||||
|
||||
if SAMSUNG_ATAGS
|
||||
|
||||
# options for IRQ support
|
||||
|
||||
config S5P_IRQ
|
||||
def_bool ARCH_S5PV210
|
||||
help
|
||||
Support common interrupt part for ARCH_S5P SoCs
|
||||
|
||||
config S5P_EXT_INT
|
||||
bool
|
||||
help
|
||||
Use the external interrupts (other than GPIO interrupts.)
|
||||
|
||||
config S5P_GPIO_INT
|
||||
bool
|
||||
help
|
||||
Common code for the GPIO interrupts (other than external interrupts.)
|
||||
|
||||
# options for gpio configuration support
|
||||
|
||||
config S5P_GPIO_DRVSTR
|
||||
bool
|
||||
help
|
||||
Internal configuration to get and set correct GPIO driver strength
|
||||
helper
|
||||
|
||||
config SAMSUNG_GPIO_EXTRA
|
||||
int "Number of additional GPIO pins"
|
||||
default 128 if SAMSUNG_GPIO_EXTRA128
|
||||
@@ -120,12 +82,6 @@ config S3C_GPIO_TRACK
|
||||
Internal configuration option to enable the s3c specific gpio
|
||||
chip tracking if the platform requires it.
|
||||
|
||||
# uart options
|
||||
|
||||
config S5P_DEV_UART
|
||||
def_bool y
|
||||
depends on ARCH_S5PV210
|
||||
|
||||
# ADC driver
|
||||
|
||||
config S3C_ADC
|
||||
@@ -283,66 +239,6 @@ config SAMSUNG_DEV_BACKLIGHT
|
||||
help
|
||||
Compile in platform device definition LCD backlight with PWM Timer
|
||||
|
||||
config S5P_DEV_CSIS0
|
||||
bool
|
||||
help
|
||||
Compile in platform device definitions for MIPI-CSIS channel 0
|
||||
|
||||
config S5P_DEV_CSIS1
|
||||
bool
|
||||
help
|
||||
Compile in platform device definitions for MIPI-CSIS channel 1
|
||||
|
||||
config S5P_DEV_FIMC0
|
||||
bool
|
||||
help
|
||||
Compile in platform device definitions for FIMC controller 0
|
||||
|
||||
config S5P_DEV_FIMC1
|
||||
bool
|
||||
help
|
||||
Compile in platform device definitions for FIMC controller 1
|
||||
|
||||
config S5P_DEV_FIMC2
|
||||
bool
|
||||
help
|
||||
Compile in platform device definitions for FIMC controller 2
|
||||
|
||||
config S5P_DEV_FIMC3
|
||||
bool
|
||||
help
|
||||
Compile in platform device definitions for FIMC controller 3
|
||||
|
||||
config S5P_DEV_FIMD0
|
||||
bool
|
||||
help
|
||||
Compile in platform device definitions for FIMD controller 0
|
||||
|
||||
config S5P_DEV_G2D
|
||||
bool
|
||||
help
|
||||
Compile in platform device definitions for G2D device
|
||||
|
||||
config S5P_DEV_I2C_HDMIPHY
|
||||
bool
|
||||
help
|
||||
Compile in platform device definitions for I2C HDMIPHY controller
|
||||
|
||||
config S5P_DEV_JPEG
|
||||
bool
|
||||
help
|
||||
Compile in platform device definitions for JPEG codec
|
||||
|
||||
config S5P_DEV_ONENAND
|
||||
bool
|
||||
help
|
||||
Compile in platform device definition for OneNAND controller
|
||||
|
||||
config S5P_DEV_TV
|
||||
bool
|
||||
help
|
||||
Compile in platform device definition for TV interface
|
||||
|
||||
config S3C24XX_PWM
|
||||
bool "PWM device support"
|
||||
select PWM
|
||||
@@ -363,12 +259,6 @@ config S3C_DMA
|
||||
help
|
||||
Internal configuration for S3C DMA core
|
||||
|
||||
config S5P_IRQ_PM
|
||||
bool
|
||||
default y if S5P_PM
|
||||
help
|
||||
Legacy IRQ power management for S5P platforms
|
||||
|
||||
config SAMSUNG_PM_GPIO
|
||||
bool
|
||||
default y if GPIO_SAMSUNG && PM
|
||||
@@ -451,17 +341,6 @@ config SAMSUNG_WDT_RESET
|
||||
Compile support for system restart by triggering watchdog reset.
|
||||
Used on SoCs that do not provide dedicated reset control.
|
||||
|
||||
config S5P_PM
|
||||
bool
|
||||
help
|
||||
Common code for power management support on S5P and newer SoCs
|
||||
|
||||
config S5P_SLEEP
|
||||
bool
|
||||
help
|
||||
Internal config node to apply common S5P sleep management code.
|
||||
Can be selected by S5P and newer SoCs with similar sleep procedure.
|
||||
|
||||
config DEBUG_S3C_UART
|
||||
depends on PLAT_SAMSUNG
|
||||
int
|
||||
|
||||
@@ -15,10 +15,6 @@ obj- :=
|
||||
|
||||
obj-y += init.o cpu.o
|
||||
|
||||
obj-$(CONFIG_S5P_IRQ) += s5p-irq.o
|
||||
obj-$(CONFIG_S5P_EXT_INT) += s5p-irq-eint.o
|
||||
obj-$(CONFIG_S5P_GPIO_INT) += s5p-irq-gpioint.o
|
||||
|
||||
# ADC
|
||||
|
||||
obj-$(CONFIG_S3C_ADC) += adc.o
|
||||
@@ -30,7 +26,6 @@ obj-$(CONFIG_SAMSUNG_ATAGS) += platformdata.o
|
||||
obj-$(CONFIG_SAMSUNG_ATAGS) += devs.o
|
||||
obj-$(CONFIG_SAMSUNG_ATAGS) += dev-uart.o
|
||||
obj-$(CONFIG_S5P_DEV_MFC) += s5p-dev-mfc.o
|
||||
obj-$(CONFIG_S5P_DEV_UART) += s5p-dev-uart.o
|
||||
|
||||
obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o
|
||||
|
||||
@@ -52,7 +47,3 @@ obj-$(CONFIG_SAMSUNG_PM_DEBUG) += pm-debug.o
|
||||
|
||||
obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o
|
||||
obj-$(CONFIG_SAMSUNG_WDT_RESET) += watchdog-reset.o
|
||||
|
||||
obj-$(CONFIG_S5P_PM) += s5p-pm.o
|
||||
obj-$(CONFIG_S5P_IRQ_PM) += s5p-irq-pm.o
|
||||
obj-$(CONFIG_S5P_SLEEP) += s5p-sleep.o
|
||||
|
||||
@@ -15,7 +15,6 @@
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
|
||||
#include <plat/map-base.h>
|
||||
#include <plat/cpu.h>
|
||||
|
||||
|
||||
@@ -53,7 +53,6 @@
|
||||
#include <linux/platform_data/ata-samsung_cf.h>
|
||||
#include <plat/fb.h>
|
||||
#include <plat/fb-s3c2410.h>
|
||||
#include <plat/hdmi.h>
|
||||
#include <linux/platform_data/hwmon-s3c.h>
|
||||
#include <linux/platform_data/i2c-s3c2410.h>
|
||||
#include <plat/keypad.h>
|
||||
@@ -145,23 +144,6 @@ struct platform_device s3c_device_camif = {
|
||||
};
|
||||
#endif /* CONFIG_CPU_S3C2440 */
|
||||
|
||||
/* ASOC DMA */
|
||||
|
||||
#ifdef CONFIG_PLAT_S5P
|
||||
static struct resource samsung_asoc_idma_resource = DEFINE_RES_IRQ(IRQ_I2S0);
|
||||
|
||||
struct platform_device samsung_asoc_idma = {
|
||||
.name = "samsung-idma",
|
||||
.id = -1,
|
||||
.num_resources = 1,
|
||||
.resource = &samsung_asoc_idma_resource,
|
||||
.dev = {
|
||||
.dma_mask = &samsung_device_dma_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
}
|
||||
};
|
||||
#endif
|
||||
|
||||
/* FB */
|
||||
|
||||
#ifdef CONFIG_S3C_DEV_FB
|
||||
@@ -190,151 +172,6 @@ void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
|
||||
}
|
||||
#endif /* CONFIG_S3C_DEV_FB */
|
||||
|
||||
/* FIMC */
|
||||
|
||||
#ifdef CONFIG_S5P_DEV_FIMC0
|
||||
static struct resource s5p_fimc0_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
|
||||
[1] = DEFINE_RES_IRQ(IRQ_FIMC0),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_fimc0 = {
|
||||
.name = "s5p-fimc",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(s5p_fimc0_resource),
|
||||
.resource = s5p_fimc0_resource,
|
||||
.dev = {
|
||||
.dma_mask = &samsung_device_dma_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_fimc_md = {
|
||||
.name = "s5p-fimc-md",
|
||||
.id = -1,
|
||||
};
|
||||
#endif /* CONFIG_S5P_DEV_FIMC0 */
|
||||
|
||||
#ifdef CONFIG_S5P_DEV_FIMC1
|
||||
static struct resource s5p_fimc1_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
|
||||
[1] = DEFINE_RES_IRQ(IRQ_FIMC1),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_fimc1 = {
|
||||
.name = "s5p-fimc",
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(s5p_fimc1_resource),
|
||||
.resource = s5p_fimc1_resource,
|
||||
.dev = {
|
||||
.dma_mask = &samsung_device_dma_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
#endif /* CONFIG_S5P_DEV_FIMC1 */
|
||||
|
||||
#ifdef CONFIG_S5P_DEV_FIMC2
|
||||
static struct resource s5p_fimc2_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
|
||||
[1] = DEFINE_RES_IRQ(IRQ_FIMC2),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_fimc2 = {
|
||||
.name = "s5p-fimc",
|
||||
.id = 2,
|
||||
.num_resources = ARRAY_SIZE(s5p_fimc2_resource),
|
||||
.resource = s5p_fimc2_resource,
|
||||
.dev = {
|
||||
.dma_mask = &samsung_device_dma_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
#endif /* CONFIG_S5P_DEV_FIMC2 */
|
||||
|
||||
#ifdef CONFIG_S5P_DEV_FIMC3
|
||||
static struct resource s5p_fimc3_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
|
||||
[1] = DEFINE_RES_IRQ(IRQ_FIMC3),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_fimc3 = {
|
||||
.name = "s5p-fimc",
|
||||
.id = 3,
|
||||
.num_resources = ARRAY_SIZE(s5p_fimc3_resource),
|
||||
.resource = s5p_fimc3_resource,
|
||||
.dev = {
|
||||
.dma_mask = &samsung_device_dma_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
#endif /* CONFIG_S5P_DEV_FIMC3 */
|
||||
|
||||
/* G2D */
|
||||
|
||||
#ifdef CONFIG_S5P_DEV_G2D
|
||||
static struct resource s5p_g2d_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
|
||||
[1] = DEFINE_RES_IRQ(IRQ_2D),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_g2d = {
|
||||
.name = "s5p-g2d",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(s5p_g2d_resource),
|
||||
.resource = s5p_g2d_resource,
|
||||
.dev = {
|
||||
.dma_mask = &samsung_device_dma_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
#endif /* CONFIG_S5P_DEV_G2D */
|
||||
|
||||
#ifdef CONFIG_S5P_DEV_JPEG
|
||||
static struct resource s5p_jpeg_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
|
||||
[1] = DEFINE_RES_IRQ(IRQ_JPEG),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_jpeg = {
|
||||
.name = "s5p-jpeg",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(s5p_jpeg_resource),
|
||||
.resource = s5p_jpeg_resource,
|
||||
.dev = {
|
||||
.dma_mask = &samsung_device_dma_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
#endif /* CONFIG_S5P_DEV_JPEG */
|
||||
|
||||
/* FIMD0 */
|
||||
|
||||
#ifdef CONFIG_S5P_DEV_FIMD0
|
||||
static struct resource s5p_fimd0_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
|
||||
[1] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_VSYNC, "vsync"),
|
||||
[2] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_FIFO, "fifo"),
|
||||
[3] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_SYSTEM, "lcd_sys"),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_fimd0 = {
|
||||
.name = "s5p-fb",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(s5p_fimd0_resource),
|
||||
.resource = s5p_fimd0_resource,
|
||||
.dev = {
|
||||
.dma_mask = &samsung_device_dma_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
|
||||
void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
|
||||
{
|
||||
s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
|
||||
&s5p_device_fimd0);
|
||||
}
|
||||
#endif /* CONFIG_S5P_DEV_FIMD0 */
|
||||
|
||||
/* HWMON */
|
||||
|
||||
#ifdef CONFIG_S3C_DEV_HWMON
|
||||
@@ -722,60 +559,6 @@ void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
|
||||
}
|
||||
#endif /* CONFIG_S3C_DEV_I2C7 */
|
||||
|
||||
/* I2C HDMIPHY */
|
||||
|
||||
#ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
|
||||
static struct resource s5p_i2c_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
|
||||
[1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_i2c_hdmiphy = {
|
||||
.name = "s3c2440-hdmiphy-i2c",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(s5p_i2c_resource),
|
||||
.resource = s5p_i2c_resource,
|
||||
};
|
||||
|
||||
void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
|
||||
{
|
||||
struct s3c2410_platform_i2c *npd;
|
||||
|
||||
if (!pd) {
|
||||
pd = &default_i2c_data;
|
||||
|
||||
if (soc_is_s5pv210())
|
||||
pd->bus_num = 3;
|
||||
else
|
||||
pd->bus_num = 0;
|
||||
}
|
||||
|
||||
npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
|
||||
&s5p_device_i2c_hdmiphy);
|
||||
}
|
||||
|
||||
static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
|
||||
|
||||
void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
|
||||
struct i2c_board_info *mhl_info, int mhl_bus)
|
||||
{
|
||||
struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
|
||||
|
||||
if (soc_is_s5pv210())
|
||||
pd->hdmiphy_bus = 3;
|
||||
else
|
||||
pd->hdmiphy_bus = 0;
|
||||
|
||||
pd->hdmiphy_info = hdmiphy_info;
|
||||
pd->mhl_info = mhl_info;
|
||||
pd->mhl_bus = mhl_bus;
|
||||
|
||||
s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
|
||||
&s5p_device_hdmi);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
|
||||
|
||||
/* I2S */
|
||||
|
||||
#ifdef CONFIG_PLAT_S3C24XX
|
||||
@@ -879,36 +662,6 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
|
||||
}
|
||||
#endif /* CONFIG_PLAT_S3C24XX */
|
||||
|
||||
/* MIPI CSIS */
|
||||
|
||||
#ifdef CONFIG_S5P_DEV_CSIS0
|
||||
static struct resource s5p_mipi_csis0_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
|
||||
[1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_mipi_csis0 = {
|
||||
.name = "s5p-mipi-csis",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
|
||||
.resource = s5p_mipi_csis0_resource,
|
||||
};
|
||||
#endif /* CONFIG_S5P_DEV_CSIS0 */
|
||||
|
||||
#ifdef CONFIG_S5P_DEV_CSIS1
|
||||
static struct resource s5p_mipi_csis1_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
|
||||
[1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_mipi_csis1 = {
|
||||
.name = "s5p-mipi-csis",
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
|
||||
.resource = s5p_mipi_csis1_resource,
|
||||
};
|
||||
#endif
|
||||
|
||||
/* NAND */
|
||||
|
||||
#ifdef CONFIG_S3C_DEV_NAND
|
||||
@@ -1052,43 +805,6 @@ void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
|
||||
}
|
||||
#endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
|
||||
|
||||
#ifdef CONFIG_S5P_DEV_ONENAND
|
||||
static struct resource s5p_onenand_resources[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
|
||||
[1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
|
||||
[2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_onenand = {
|
||||
.name = "s5pc110-onenand",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(s5p_onenand_resources),
|
||||
.resource = s5p_onenand_resources,
|
||||
};
|
||||
#endif /* CONFIG_S5P_DEV_ONENAND */
|
||||
|
||||
/* PMU */
|
||||
|
||||
#if defined(CONFIG_PLAT_S5P) && !defined(CONFIG_ARCH_EXYNOS)
|
||||
static struct resource s5p_pmu_resource[] = {
|
||||
DEFINE_RES_IRQ(IRQ_PMU)
|
||||
};
|
||||
|
||||
static struct platform_device s5p_device_pmu = {
|
||||
.name = "arm-pmu",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(s5p_pmu_resource),
|
||||
.resource = s5p_pmu_resource,
|
||||
};
|
||||
|
||||
static int __init s5p_pmu_init(void)
|
||||
{
|
||||
platform_device_register(&s5p_device_pmu);
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(s5p_pmu_init);
|
||||
#endif /* CONFIG_PLAT_S5P */
|
||||
|
||||
/* PWM Timer */
|
||||
|
||||
#ifdef CONFIG_SAMSUNG_DEV_PWM
|
||||
@@ -1251,52 +967,6 @@ void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
|
||||
}
|
||||
#endif /* CONFIG_SAMSUNG_DEV_TS */
|
||||
|
||||
/* TV */
|
||||
|
||||
#ifdef CONFIG_S5P_DEV_TV
|
||||
|
||||
static struct resource s5p_hdmi_resources[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
|
||||
[1] = DEFINE_RES_IRQ(IRQ_HDMI),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_hdmi = {
|
||||
.name = "s5p-hdmi",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(s5p_hdmi_resources),
|
||||
.resource = s5p_hdmi_resources,
|
||||
};
|
||||
|
||||
static struct resource s5p_sdo_resources[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
|
||||
[1] = DEFINE_RES_IRQ(IRQ_SDO),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_sdo = {
|
||||
.name = "s5p-sdo",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(s5p_sdo_resources),
|
||||
.resource = s5p_sdo_resources,
|
||||
};
|
||||
|
||||
static struct resource s5p_mixer_resources[] = {
|
||||
[0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
|
||||
[1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
|
||||
[2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
|
||||
};
|
||||
|
||||
struct platform_device s5p_device_mixer = {
|
||||
.name = "s5p-mixer",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(s5p_mixer_resources),
|
||||
.resource = s5p_mixer_resources,
|
||||
.dev = {
|
||||
.dma_mask = &samsung_device_dma_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
}
|
||||
};
|
||||
#endif /* CONFIG_S5P_DEV_TV */
|
||||
|
||||
/* USB */
|
||||
|
||||
#ifdef CONFIG_S3C_DEV_USB_HOST
|
||||
|
||||
@@ -1,28 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2011 Samsung Electronics Co., Ltd.
|
||||
*
|
||||
* S5P series camera interface helper functions
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __PLAT_SAMSUNG_CAMPORT_H_
|
||||
#define __PLAT_SAMSUNG_CAMPORT_H_ __FILE__
|
||||
|
||||
enum s5p_camport_id {
|
||||
S5P_CAMPORT_A,
|
||||
S5P_CAMPORT_B,
|
||||
};
|
||||
|
||||
/*
|
||||
* The helper functions to configure GPIO for the camera parallel bus.
|
||||
* The camera port can be multiplexed with any FIMC entity, even multiple
|
||||
* FIMC entities are allowed to be attached to a single port simultaneously.
|
||||
* These functions are to be used in the board setup code.
|
||||
*/
|
||||
int s5pv210_fimc_setup_gpio(enum s5p_camport_id id);
|
||||
int exynos4_fimc_setup_gpio(enum s5p_camport_id id);
|
||||
|
||||
#endif /* __PLAT_SAMSUNG_CAMPORT_H */
|
||||
@@ -47,7 +47,6 @@ IS_SAMSUNG_CPU(s3c24xx, S3C24XX_CPU_ID, S3C24XX_CPU_MASK)
|
||||
IS_SAMSUNG_CPU(s3c2412, S3C2412_CPU_ID, S3C2412_CPU_MASK)
|
||||
IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK)
|
||||
IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK)
|
||||
IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
|
||||
|
||||
#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
|
||||
defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \
|
||||
@@ -76,12 +75,6 @@ IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
|
||||
# define soc_is_s3c64xx() 0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CPU_S5PV210)
|
||||
# define soc_is_s5pv210() is_samsung_s5pv210()
|
||||
#else
|
||||
# define soc_is_s5pv210() 0
|
||||
#endif
|
||||
|
||||
#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
|
||||
|
||||
#ifndef KHZ
|
||||
@@ -117,12 +110,9 @@ extern void s3c_init_cpu(unsigned long idcode,
|
||||
|
||||
/* core initialisation functions */
|
||||
|
||||
extern void s5p_init_irq(u32 *vic, u32 num_vic);
|
||||
|
||||
extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
|
||||
|
||||
extern void s3c64xx_init_cpu(void);
|
||||
extern void s5p_init_cpu(void __iomem *cpuid_addr);
|
||||
|
||||
extern unsigned int samsung_rev(void);
|
||||
|
||||
@@ -150,6 +140,4 @@ extern struct bus_type s3c2442_subsys;
|
||||
extern struct bus_type s3c2443_subsys;
|
||||
extern struct bus_type s3c6410_subsys;
|
||||
|
||||
extern void (*s5pc1xx_idle)(void);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -25,9 +25,6 @@ struct s3c24xx_uart_resources {
|
||||
|
||||
extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
|
||||
extern struct s3c24xx_uart_resources s3c64xx_uart_resources[];
|
||||
extern struct s3c24xx_uart_resources s5p_uart_resources[];
|
||||
extern struct s3c24xx_uart_resources exynos4_uart_resources[];
|
||||
extern struct s3c24xx_uart_resources exynos5_uart_resources[];
|
||||
|
||||
extern struct platform_device *s3c24xx_uart_devs[];
|
||||
extern struct platform_device *s3c24xx_uart_src[];
|
||||
@@ -75,45 +72,6 @@ extern struct platform_device s3c_device_usb_hsotg;
|
||||
extern struct platform_device s3c_device_usb_hsudc;
|
||||
extern struct platform_device s3c_device_wdt;
|
||||
|
||||
extern struct platform_device s5p_device_fimc0;
|
||||
extern struct platform_device s5p_device_fimc1;
|
||||
extern struct platform_device s5p_device_fimc2;
|
||||
extern struct platform_device s5p_device_fimc3;
|
||||
extern struct platform_device s5p_device_fimc_md;
|
||||
extern struct platform_device s5p_device_jpeg;
|
||||
extern struct platform_device s5p_device_g2d;
|
||||
extern struct platform_device s5p_device_fimd0;
|
||||
extern struct platform_device s5p_device_hdmi;
|
||||
extern struct platform_device s5p_device_i2c_hdmiphy;
|
||||
extern struct platform_device s5p_device_mfc;
|
||||
extern struct platform_device s5p_device_mfc_l;
|
||||
extern struct platform_device s5p_device_mfc_r;
|
||||
extern struct platform_device s5p_device_mipi_csis0;
|
||||
extern struct platform_device s5p_device_mipi_csis1;
|
||||
extern struct platform_device s5p_device_mixer;
|
||||
extern struct platform_device s5p_device_onenand;
|
||||
extern struct platform_device s5p_device_sdo;
|
||||
|
||||
extern struct platform_device s5pv210_device_ac97;
|
||||
extern struct platform_device s5pv210_device_iis0;
|
||||
extern struct platform_device s5pv210_device_iis1;
|
||||
extern struct platform_device s5pv210_device_iis2;
|
||||
extern struct platform_device s5pv210_device_pcm0;
|
||||
extern struct platform_device s5pv210_device_pcm1;
|
||||
extern struct platform_device s5pv210_device_pcm2;
|
||||
extern struct platform_device s5pv210_device_spdif;
|
||||
|
||||
extern struct platform_device exynos4_device_ac97;
|
||||
extern struct platform_device exynos4_device_ahci;
|
||||
extern struct platform_device exynos4_device_i2s0;
|
||||
extern struct platform_device exynos4_device_i2s1;
|
||||
extern struct platform_device exynos4_device_i2s2;
|
||||
extern struct platform_device exynos4_device_ohci;
|
||||
extern struct platform_device exynos4_device_pcm0;
|
||||
extern struct platform_device exynos4_device_pcm1;
|
||||
extern struct platform_device exynos4_device_pcm2;
|
||||
extern struct platform_device exynos4_device_spdif;
|
||||
|
||||
extern struct platform_device samsung_asoc_idma;
|
||||
extern struct platform_device samsung_device_keypad;
|
||||
extern struct platform_device samsung_device_pwm;
|
||||
|
||||
@@ -26,19 +26,4 @@ static inline void s3c_fb_setname(char *name)
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Re-define device name depending on support. */
|
||||
static inline void s5p_fb_setname(int id, char *name)
|
||||
{
|
||||
switch (id) {
|
||||
#ifdef CONFIG_S5P_DEV_FIMD0
|
||||
case 0:
|
||||
s5p_device_fimd0.name = name;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
printk(KERN_ERR "%s: invalid device id(%d)\n", __func__, id);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* __ASM_PLAT_FB_CORE_H */
|
||||
|
||||
@@ -25,14 +25,6 @@
|
||||
*/
|
||||
extern void s3c_fb_set_platdata(struct s3c_fb_platdata *pd);
|
||||
|
||||
/**
|
||||
* s5p_fimd0_set_platdata() - Setup the FB device with platform data.
|
||||
* @pd: The platform data to set. The data is copied from the passed structure
|
||||
* so the machine data can mark the data __initdata so that any unused
|
||||
* machines will end up dumping their data at runtime.
|
||||
*/
|
||||
extern void s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd);
|
||||
|
||||
/**
|
||||
* s3c64xx_fb_gpio_setup_24bpp() - S3C64XX setup function for 24bpp LCD
|
||||
*
|
||||
@@ -40,18 +32,4 @@ extern void s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd);
|
||||
*/
|
||||
extern void s3c64xx_fb_gpio_setup_24bpp(void);
|
||||
|
||||
/**
|
||||
* s5pv210_fb_gpio_setup_24bpp() - S5PV210/S5PC110 setup function for 24bpp LCD
|
||||
*
|
||||
* Initialise the GPIO for an 24bpp LCD display on the RGB interface.
|
||||
*/
|
||||
extern void s5pv210_fb_gpio_setup_24bpp(void);
|
||||
|
||||
/**
|
||||
* exynos4_fimd0_gpio_setup_24bpp() - Exynos4 setup function for 24bpp LCD0
|
||||
*
|
||||
* Initialise the GPIO for an 24bpp LCD display on the RGB interface 0.
|
||||
*/
|
||||
extern void exynos4_fimd0_gpio_setup_24bpp(void);
|
||||
|
||||
#endif /* __PLAT_S3C_FB_H */
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user