intersil: remove obsolete prism54 wireless driver

Commit 1d89cae1b4 ("MAINTAINERS: mark prism54 obsolete") indicated the
prism54 driver as obsolete in July 2010.

Now, after being exposed for ten years to refactoring, general tree-wide
changes and various janitor clean-up, it is really time to delete the
driver for good.

This was discovered as part of a checkpatch evaluation, investigating all
reports of checkpatch's WARNING:OBSOLETE check.

p54 replaces prism54 so users should be unaffected. There was a one off chipset
someone long ago reported that p54 didn't work with but the reporter never
followed up on that. Additionally, distributions have been blacklisting prism54
for years now.

Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Acked-by: Luis Chamberlain <mcgrof@kernel.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20210713054025.32006-1-lukas.bulwahn@gmail.com
This commit is contained in:
Lukas Bulwahn
2021-07-13 07:40:25 +02:00
committed by Kalle Valo
parent 18cb62367a
commit d249ff28b1
19 changed files with 0 additions and 7477 deletions
-7
View File
@@ -14927,13 +14927,6 @@ S: Maintained
F: include/linux/printk.h
F: kernel/printk/
PRISM54 WIRELESS DRIVER
M: Luis Chamberlain <mcgrof@kernel.org>
L: linux-wireless@vger.kernel.org
S: Obsolete
W: https://wireless.wiki.kernel.org/en/users/Drivers/p54
F: drivers/net/wireless/intersil/prism54/
PROC FILESYSTEM
L: linux-kernel@vger.kernel.org
L: linux-fsdevel@vger.kernel.org
-20
View File
@@ -16,24 +16,4 @@ source "drivers/net/wireless/intersil/hostap/Kconfig"
source "drivers/net/wireless/intersil/orinoco/Kconfig"
source "drivers/net/wireless/intersil/p54/Kconfig"
config PRISM54
tristate 'Intersil Prism GT/Duette/Indigo PCI/Cardbus (DEPRECATED)'
depends on PCI
select WIRELESS_EXT
select WEXT_SPY
select WEXT_PRIV
select FW_LOADER
help
This enables support for FullMAC PCI/Cardbus prism54 devices. This
driver is now deprecated in favor for the SoftMAC driver, p54pci.
p54pci supports FullMAC PCI/Cardbus devices as well.
For more information refer to the p54 wiki:
http://wireless.wiki.kernel.org/en/users/Drivers/p54
Note: You need a motherboard with DMA support to use any of these cards
When built as module you get the module prism54
endif # WLAN_VENDOR_INTERSIL
-1
View File
@@ -2,4 +2,3 @@
obj-$(CONFIG_HOSTAP) += hostap/
obj-$(CONFIG_HERMES) += orinoco/
obj-$(CONFIG_P54_COMMON) += p54/
obj-$(CONFIG_PRISM54) += prism54/
@@ -1,9 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only
# $Id: Makefile.k26,v 1.7 2004/01/30 16:24:00 ajfa Exp $
prism54-objs := islpci_eth.o islpci_mgt.o \
isl_38xx.o isl_ioctl.o islpci_dev.o \
islpci_hotplug.o oid_mgt.o
obj-$(CONFIG_PRISM54) += prism54.o
@@ -1,245 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2002 Intersil Americas Inc.
* Copyright (C) 2003-2004 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>_
*/
#include <linux/module.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/ktime.h>
#include <linux/uaccess.h>
#include <asm/io.h>
#include "prismcompat.h"
#include "isl_38xx.h"
#include "islpci_dev.h"
#include "islpci_mgt.h"
/******************************************************************************
Device Interface & Control functions
******************************************************************************/
/**
* isl38xx_disable_interrupts - disable all interrupts
* @device: pci memory base address
*
* Instructs the device to disable all interrupt reporting by asserting
* the IRQ line. New events may still show up in the interrupt identification
* register located at offset %ISL38XX_INT_IDENT_REG.
*/
void
isl38xx_disable_interrupts(void __iomem *device)
{
isl38xx_w32_flush(device, 0x00000000, ISL38XX_INT_EN_REG);
udelay(ISL38XX_WRITEIO_DELAY);
}
void
isl38xx_handle_sleep_request(isl38xx_control_block *control_block,
int *powerstate, void __iomem *device_base)
{
/* device requests to go into sleep mode
* check whether the transmit queues for data and management are empty */
if (isl38xx_in_queue(control_block, ISL38XX_CB_TX_DATA_LQ))
/* data tx queue not empty */
return;
if (isl38xx_in_queue(control_block, ISL38XX_CB_TX_MGMTQ))
/* management tx queue not empty */
return;
/* check also whether received frames are pending */
if (isl38xx_in_queue(control_block, ISL38XX_CB_RX_DATA_LQ))
/* data rx queue not empty */
return;
if (isl38xx_in_queue(control_block, ISL38XX_CB_RX_MGMTQ))
/* management rx queue not empty */
return;
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_TRACING, "Device going to sleep mode\n");
#endif
/* all queues are empty, allow the device to go into sleep mode */
*powerstate = ISL38XX_PSM_POWERSAVE_STATE;
/* assert the Sleep interrupt in the Device Interrupt Register */
isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_SLEEP,
ISL38XX_DEV_INT_REG);
udelay(ISL38XX_WRITEIO_DELAY);
}
void
isl38xx_handle_wakeup(isl38xx_control_block *control_block,
int *powerstate, void __iomem *device_base)
{
/* device is in active state, update the powerstate flag */
*powerstate = ISL38XX_PSM_ACTIVE_STATE;
/* now check whether there are frames pending for the card */
if (!isl38xx_in_queue(control_block, ISL38XX_CB_TX_DATA_LQ)
&& !isl38xx_in_queue(control_block, ISL38XX_CB_TX_MGMTQ))
return;
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_ANYTHING, "Wake up handler trigger the device\n");
#endif
/* either data or management transmit queue has a frame pending
* trigger the device by setting the Update bit in the Device Int reg */
isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_UPDATE,
ISL38XX_DEV_INT_REG);
udelay(ISL38XX_WRITEIO_DELAY);
}
void
isl38xx_trigger_device(int asleep, void __iomem *device_base)
{
u32 reg;
#if VERBOSE > SHOW_ERROR_MESSAGES
u32 counter = 0;
struct timespec64 current_ts64;
DEBUG(SHOW_FUNCTION_CALLS, "isl38xx trigger device\n");
#endif
/* check whether the device is in power save mode */
if (asleep) {
/* device is in powersave, trigger the device for wakeup */
#if VERBOSE > SHOW_ERROR_MESSAGES
ktime_get_real_ts64(&current_ts64);
DEBUG(SHOW_TRACING, "%lld.%09ld Device wakeup triggered\n",
(s64)current_ts64.tv_sec, current_ts64.tv_nsec);
DEBUG(SHOW_TRACING, "%lld.%09ld Device register read %08x\n",
(s64)current_ts64.tv_sec, current_ts64.tv_nsec,
readl(device_base + ISL38XX_CTRL_STAT_REG));
#endif
reg = readl(device_base + ISL38XX_INT_IDENT_REG);
if (reg == 0xabadface) {
#if VERBOSE > SHOW_ERROR_MESSAGES
ktime_get_real_ts64(&current_ts64);
DEBUG(SHOW_TRACING,
"%lld.%09ld Device register abadface\n",
(s64)current_ts64.tv_sec, current_ts64.tv_nsec);
#endif
/* read the Device Status Register until Sleepmode bit is set */
while (reg = readl(device_base + ISL38XX_CTRL_STAT_REG),
(reg & ISL38XX_CTRL_STAT_SLEEPMODE) == 0) {
udelay(ISL38XX_WRITEIO_DELAY);
#if VERBOSE > SHOW_ERROR_MESSAGES
counter++;
#endif
}
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_TRACING,
"%lld.%09ld Device register read %08x\n",
(s64)current_ts64.tv_sec, current_ts64.tv_nsec,
readl(device_base + ISL38XX_CTRL_STAT_REG));
ktime_get_real_ts64(&current_ts64);
DEBUG(SHOW_TRACING,
"%lld.%09ld Device asleep counter %i\n",
(s64)current_ts64.tv_sec, current_ts64.tv_nsec,
counter);
#endif
}
/* assert the Wakeup interrupt in the Device Interrupt Register */
isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_WAKEUP,
ISL38XX_DEV_INT_REG);
#if VERBOSE > SHOW_ERROR_MESSAGES
udelay(ISL38XX_WRITEIO_DELAY);
/* perform another read on the Device Status Register */
reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
ktime_get_real_ts64(&current_ts64);
DEBUG(SHOW_TRACING, "%lld.%00ld Device register read %08x\n",
(s64)current_ts64.tv_sec, current_ts64.tv_nsec, reg);
#endif
} else {
/* device is (still) awake */
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_TRACING, "Device is in active state\n");
#endif
/* trigger the device by setting the Update bit in the Device Int reg */
isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_UPDATE,
ISL38XX_DEV_INT_REG);
}
}
void
isl38xx_interface_reset(void __iomem *device_base, dma_addr_t host_address)
{
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_FUNCTION_CALLS, "isl38xx_interface_reset\n");
#endif
/* load the address of the control block in the device */
isl38xx_w32_flush(device_base, host_address, ISL38XX_CTRL_BLK_BASE_REG);
udelay(ISL38XX_WRITEIO_DELAY);
/* set the reset bit in the Device Interrupt Register */
isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_RESET, ISL38XX_DEV_INT_REG);
udelay(ISL38XX_WRITEIO_DELAY);
/* enable the interrupt for detecting initialization */
/* Note: Do not enable other interrupts here. We want the
* device to have come up first 100% before allowing any other
* interrupts. */
isl38xx_w32_flush(device_base, ISL38XX_INT_IDENT_INIT, ISL38XX_INT_EN_REG);
udelay(ISL38XX_WRITEIO_DELAY); /* allow complete full reset */
}
void
isl38xx_enable_common_interrupts(void __iomem *device_base)
{
u32 reg;
reg = ISL38XX_INT_IDENT_UPDATE | ISL38XX_INT_IDENT_SLEEP |
ISL38XX_INT_IDENT_WAKEUP;
isl38xx_w32_flush(device_base, reg, ISL38XX_INT_EN_REG);
udelay(ISL38XX_WRITEIO_DELAY);
}
int
isl38xx_in_queue(isl38xx_control_block *cb, int queue)
{
const s32 delta = (le32_to_cpu(cb->driver_curr_frag[queue]) -
le32_to_cpu(cb->device_curr_frag[queue]));
/* determine the amount of fragments in the queue depending on the type
* of the queue, either transmit or receive */
BUG_ON(delta < 0); /* driver ptr must be ahead of device ptr */
switch (queue) {
/* send queues */
case ISL38XX_CB_TX_MGMTQ:
BUG_ON(delta > ISL38XX_CB_MGMT_QSIZE);
fallthrough;
case ISL38XX_CB_TX_DATA_LQ:
case ISL38XX_CB_TX_DATA_HQ:
BUG_ON(delta > ISL38XX_CB_TX_QSIZE);
return delta;
/* receive queues */
case ISL38XX_CB_RX_MGMTQ:
BUG_ON(delta > ISL38XX_CB_MGMT_QSIZE);
return ISL38XX_CB_MGMT_QSIZE - delta;
case ISL38XX_CB_RX_DATA_LQ:
case ISL38XX_CB_RX_DATA_HQ:
BUG_ON(delta > ISL38XX_CB_RX_QSIZE);
return ISL38XX_CB_RX_QSIZE - delta;
}
BUG();
return 0;
}
@@ -1,158 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2002 Intersil Americas Inc.
*/
#ifndef _ISL_38XX_H
#define _ISL_38XX_H
#include <asm/io.h>
#include <asm/byteorder.h>
#define ISL38XX_CB_RX_QSIZE 8
#define ISL38XX_CB_TX_QSIZE 32
/* ISL38XX Access Point Specific definitions */
#define ISL38XX_MAX_WDS_LINKS 8
/* ISL38xx Client Specific definitions */
#define ISL38XX_PSM_ACTIVE_STATE 0
#define ISL38XX_PSM_POWERSAVE_STATE 1
/* ISL38XX Host Interface Definitions */
#define ISL38XX_PCI_MEM_SIZE 0x02000
#define ISL38XX_MEMORY_WINDOW_SIZE 0x01000
#define ISL38XX_DEV_FIRMWARE_ADDRES 0x20000
#define ISL38XX_WRITEIO_DELAY 10 /* in us */
#define ISL38XX_RESET_DELAY 50 /* in ms */
#define ISL38XX_WAIT_CYCLE 10 /* in 10ms */
#define ISL38XX_MAX_WAIT_CYCLES 10
/* PCI Memory Area */
#define ISL38XX_HARDWARE_REG 0x0000
#define ISL38XX_CARDBUS_CIS 0x0800
#define ISL38XX_DIRECT_MEM_WIN 0x1000
/* Hardware registers */
#define ISL38XX_DEV_INT_REG 0x0000
#define ISL38XX_INT_IDENT_REG 0x0010
#define ISL38XX_INT_ACK_REG 0x0014
#define ISL38XX_INT_EN_REG 0x0018
#define ISL38XX_GEN_PURP_COM_REG_1 0x0020
#define ISL38XX_GEN_PURP_COM_REG_2 0x0024
#define ISL38XX_CTRL_BLK_BASE_REG ISL38XX_GEN_PURP_COM_REG_1
#define ISL38XX_DIR_MEM_BASE_REG 0x0030
#define ISL38XX_CTRL_STAT_REG 0x0078
/* High end mobos queue up pci writes, the following
* is used to "read" from after a write to force flush */
#define ISL38XX_PCI_POSTING_FLUSH ISL38XX_INT_EN_REG
/**
* isl38xx_w32_flush - PCI iomem write helper
* @base: (host) memory base address of the device
* @val: 32bit value (host order) to write
* @offset: byte offset into @base to write value to
*
* This helper takes care of writing a 32bit datum to the
* specified offset into the device's pci memory space, and making sure
* the pci memory buffers get flushed by performing one harmless read
* from the %ISL38XX_PCI_POSTING_FLUSH offset.
*/
static inline void
isl38xx_w32_flush(void __iomem *base, u32 val, unsigned long offset)
{
writel(val, base + offset);
(void) readl(base + ISL38XX_PCI_POSTING_FLUSH);
}
/* Device Interrupt register bits */
#define ISL38XX_DEV_INT_RESET 0x0001
#define ISL38XX_DEV_INT_UPDATE 0x0002
#define ISL38XX_DEV_INT_WAKEUP 0x0008
#define ISL38XX_DEV_INT_SLEEP 0x0010
/* Interrupt Identification/Acknowledge/Enable register bits */
#define ISL38XX_INT_IDENT_UPDATE 0x0002
#define ISL38XX_INT_IDENT_INIT 0x0004
#define ISL38XX_INT_IDENT_WAKEUP 0x0008
#define ISL38XX_INT_IDENT_SLEEP 0x0010
#define ISL38XX_INT_SOURCES 0x001E
/* Control/Status register bits */
/* Looks like there are other meaningful bits
0x20004400 seen in normal operation,
0x200044db at 'timeout waiting for mgmt response'
*/
#define ISL38XX_CTRL_STAT_SLEEPMODE 0x00000200
#define ISL38XX_CTRL_STAT_CLKRUN 0x00800000
#define ISL38XX_CTRL_STAT_RESET 0x10000000
#define ISL38XX_CTRL_STAT_RAMBOOT 0x20000000
#define ISL38XX_CTRL_STAT_STARTHALTED 0x40000000
#define ISL38XX_CTRL_STAT_HOST_OVERRIDE 0x80000000
/* Control Block definitions */
#define ISL38XX_CB_RX_DATA_LQ 0
#define ISL38XX_CB_TX_DATA_LQ 1
#define ISL38XX_CB_RX_DATA_HQ 2
#define ISL38XX_CB_TX_DATA_HQ 3
#define ISL38XX_CB_RX_MGMTQ 4
#define ISL38XX_CB_TX_MGMTQ 5
#define ISL38XX_CB_QCOUNT 6
#define ISL38XX_CB_MGMT_QSIZE 4
#define ISL38XX_MIN_QTHRESHOLD 4 /* fragments */
/* Memory Manager definitions */
#define MGMT_FRAME_SIZE 1500 /* >= size struct obj_bsslist */
#define MGMT_TX_FRAME_COUNT 24 /* max 4 + spare 4 + 8 init */
#define MGMT_RX_FRAME_COUNT 24 /* 4*4 + spare 8 */
#define MGMT_FRAME_COUNT (MGMT_TX_FRAME_COUNT + MGMT_RX_FRAME_COUNT)
#define CONTROL_BLOCK_SIZE 1024 /* should be enough */
#define PSM_FRAME_SIZE 1536
#define PSM_MINIMAL_STATION_COUNT 64
#define PSM_FRAME_COUNT PSM_MINIMAL_STATION_COUNT
#define PSM_BUFFER_SIZE PSM_FRAME_SIZE * PSM_FRAME_COUNT
#define MAX_TRAP_RX_QUEUE 4
#define HOST_MEM_BLOCK CONTROL_BLOCK_SIZE + PSM_BUFFER_SIZE
/* Fragment package definitions */
#define FRAGMENT_FLAG_MF 0x0001
#define MAX_FRAGMENT_SIZE 1536
/* In monitor mode frames have a header. I don't know exactly how big those
* frame can be but I've never seen any frame bigger than 1584... :
*/
#define MAX_FRAGMENT_SIZE_RX 1600
typedef struct {
__le32 address; /* physical address on host */
__le16 size; /* packet size */
__le16 flags; /* set of bit-wise flags */
} isl38xx_fragment;
struct isl38xx_cb {
__le32 driver_curr_frag[ISL38XX_CB_QCOUNT];
__le32 device_curr_frag[ISL38XX_CB_QCOUNT];
isl38xx_fragment rx_data_low[ISL38XX_CB_RX_QSIZE];
isl38xx_fragment tx_data_low[ISL38XX_CB_TX_QSIZE];
isl38xx_fragment rx_data_high[ISL38XX_CB_RX_QSIZE];
isl38xx_fragment tx_data_high[ISL38XX_CB_TX_QSIZE];
isl38xx_fragment rx_data_mgmt[ISL38XX_CB_MGMT_QSIZE];
isl38xx_fragment tx_data_mgmt[ISL38XX_CB_MGMT_QSIZE];
};
typedef struct isl38xx_cb isl38xx_control_block;
/* determine number of entries currently in queue */
int isl38xx_in_queue(isl38xx_control_block *cb, int queue);
void isl38xx_disable_interrupts(void __iomem *);
void isl38xx_enable_common_interrupts(void __iomem *);
void isl38xx_handle_sleep_request(isl38xx_control_block *, int *,
void __iomem *);
void isl38xx_handle_wakeup(isl38xx_control_block *, int *, void __iomem *);
void isl38xx_trigger_device(int, void __iomem *);
void isl38xx_interface_reset(void __iomem *, dma_addr_t);
#endif /* _ISL_38XX_H */
File diff suppressed because it is too large Load Diff
@@ -1,35 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2002 Intersil Americas Inc.
* (C) 2003 Aurelien Alleaume <slts@free.fr>
* (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
*/
#ifndef _ISL_IOCTL_H
#define _ISL_IOCTL_H
#include "islpci_mgt.h"
#include "islpci_dev.h"
#include <net/iw_handler.h> /* New driver API */
#define SUPPORTED_WIRELESS_EXT 19
void prism54_mib_init(islpci_private *);
struct iw_statistics *prism54_get_wireless_stats(struct net_device *);
void prism54_update_stats(struct work_struct *);
void prism54_acl_init(struct islpci_acl *);
void prism54_acl_clean(struct islpci_acl *);
void prism54_process_trap(struct work_struct *);
void prism54_wpa_bss_ie_init(islpci_private *priv);
void prism54_wpa_bss_ie_clean(islpci_private *priv);
int prism54_set_mac_address(struct net_device *, void *);
extern const struct iw_handler_def prism54_handler_def;
#endif /* _ISL_IOCTL_H */
@@ -1,492 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
* Copyright (C) 2004 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
* Copyright (C) 2004 Aurelien Alleaume <slts@free.fr>
*/
#if !defined(_ISL_OID_H)
#define _ISL_OID_H
/*
* MIB related constant and structure definitions for communicating
* with the device firmware
*/
struct obj_ssid {
u8 length;
char octets[33];
} __packed;
struct obj_key {
u8 type; /* dot11_priv_t */
u8 length;
char key[32];
} __packed;
struct obj_mlme {
u8 address[6];
u16 id;
u16 state;
u16 code;
} __packed;
struct obj_mlmeex {
u8 address[6];
u16 id;
u16 state;
u16 code;
u16 size;
u8 data[];
} __packed;
struct obj_buffer {
u32 size;
u32 addr; /* 32bit bus address */
} __packed;
struct obj_bss {
u8 address[6];
int:16; /* padding */
char state;
char reserved;
short age;
char quality;
char rssi;
struct obj_ssid ssid;
short channel;
char beacon_period;
char dtim_period;
short capinfo;
short rates;
short basic_rates;
int:16; /* padding */
} __packed;
struct obj_bsslist {
u32 nr;
struct obj_bss bsslist[];
} __packed;
struct obj_frequencies {
u16 nr;
u16 mhz[];
} __packed;
struct obj_attachment {
char type;
char reserved;
short id;
short size;
char data[];
} __packed;
/*
* in case everything's ok, the inlined function below will be
* optimized away by the compiler...
*/
static inline void
__bug_on_wrong_struct_sizes(void)
{
BUILD_BUG_ON(sizeof (struct obj_ssid) != 34);
BUILD_BUG_ON(sizeof (struct obj_key) != 34);
BUILD_BUG_ON(sizeof (struct obj_mlme) != 12);
BUILD_BUG_ON(sizeof (struct obj_mlmeex) != 14);
BUILD_BUG_ON(sizeof (struct obj_buffer) != 8);
BUILD_BUG_ON(sizeof (struct obj_bss) != 60);
BUILD_BUG_ON(sizeof (struct obj_bsslist) != 4);
BUILD_BUG_ON(sizeof (struct obj_frequencies) != 2);
}
enum dot11_state_t {
DOT11_STATE_NONE = 0,
DOT11_STATE_AUTHING = 1,
DOT11_STATE_AUTH = 2,
DOT11_STATE_ASSOCING = 3,
DOT11_STATE_ASSOC = 5,
DOT11_STATE_IBSS = 6,
DOT11_STATE_WDS = 7
};
enum dot11_bsstype_t {
DOT11_BSSTYPE_NONE = 0,
DOT11_BSSTYPE_INFRA = 1,
DOT11_BSSTYPE_IBSS = 2,
DOT11_BSSTYPE_ANY = 3
};
enum dot11_auth_t {
DOT11_AUTH_NONE = 0,
DOT11_AUTH_OS = 1,
DOT11_AUTH_SK = 2,
DOT11_AUTH_BOTH = 3
};
enum dot11_mlme_t {
DOT11_MLME_AUTO = 0,
DOT11_MLME_INTERMEDIATE = 1,
DOT11_MLME_EXTENDED = 2
};
enum dot11_priv_t {
DOT11_PRIV_WEP = 0,
DOT11_PRIV_TKIP = 1
};
/* Prism "Nitro" / Frameburst / "Packet Frame Grouping"
* Value is in microseconds. Represents the # microseconds
* the firmware will take to group frames before sending out then out
* together with a CSMA contention. Without this all frames are
* sent with a CSMA contention.
* Bibliography:
* https://www.hpl.hp.com/personal/Jean_Tourrilhes/Papers/Packet.Frame.Grouping.html
*/
enum dot11_maxframeburst_t {
/* Values for DOT11_OID_MAXFRAMEBURST */
DOT11_MAXFRAMEBURST_OFF = 0, /* Card firmware default */
DOT11_MAXFRAMEBURST_MIXED_SAFE = 650, /* 802.11 a,b,g safe */
DOT11_MAXFRAMEBURST_IDEAL = 1300, /* Theoretical ideal level */
DOT11_MAXFRAMEBURST_MAX = 5000, /* Use this as max,
* Note: firmware allows for greater values. This is a
* recommended max. I'll update this as I find
* out what the real MAX is. Also note that you don't necessarily
* get better results with a greater value here.
*/
};
/* Support for 802.11 long and short frame preambles.
* Long preamble uses 128-bit sync field, 8-bit CRC
* Short preamble uses 56-bit sync field, 16-bit CRC
*
* 802.11a -- not sure, both optionally ?
* 802.11b supports long and optionally short
* 802.11g supports both */
enum dot11_preamblesettings_t {
DOT11_PREAMBLESETTING_LONG = 0,
/* Allows *only* long 802.11 preambles */
DOT11_PREAMBLESETTING_SHORT = 1,
/* Allows *only* short 802.11 preambles */
DOT11_PREAMBLESETTING_DYNAMIC = 2
/* AutomatiGically set */
};
/* Support for 802.11 slot timing (time between packets).
*
* Long uses 802.11a slot timing (9 usec ?)
* Short uses 802.11b slot timing (20 use ?) */
enum dot11_slotsettings_t {
DOT11_SLOTSETTINGS_LONG = 0,
/* Allows *only* long 802.11b slot timing */
DOT11_SLOTSETTINGS_SHORT = 1,
/* Allows *only* long 802.11a slot timing */
DOT11_SLOTSETTINGS_DYNAMIC = 2
/* AutomatiGically set */
};
/* All you need to know, ERP is "Extended Rate PHY".
* An Extended Rate PHY (ERP) STA or AP shall support three different
* preamble and header formats:
* Long preamble (refer to above)
* Short preamble (refer to above)
* OFDM preamble ( ? )
*
* I'm assuming here Protection tells the AP
* to be careful, a STA which cannot handle the long pre-amble
* has joined.
*/
enum do11_nonerpstatus_t {
DOT11_ERPSTAT_NONEPRESENT = 0,
DOT11_ERPSTAT_USEPROTECTION = 1
};
/* (ERP is "Extended Rate PHY") Way to read NONERP is NON-ERP-*
* The key here is DOT11 NON ERP NEVER protects against
* NON ERP STA's. You *don't* want this unless
* you know what you are doing. It means you will only
* get Extended Rate capabilities */
enum dot11_nonerpprotection_t {
DOT11_NONERP_NEVER = 0,
DOT11_NONERP_ALWAYS = 1,
DOT11_NONERP_DYNAMIC = 2
};
/* Preset OID configuration for 802.11 modes
* Note: DOT11_OID_CW[MIN|MAX] hold the values of the
* DCS MIN|MAX backoff used */
enum dot11_profile_t { /* And set/allowed values */
/* Allowed values for DOT11_OID_PROFILES */
DOT11_PROFILE_B_ONLY = 0,
/* DOT11_OID_RATES: 1, 2, 5.5, 11Mbps
* DOT11_OID_PREAMBLESETTINGS: DOT11_PREAMBLESETTING_DYNAMIC
* DOT11_OID_CWMIN: 31
* DOT11_OID_NONEPROTECTION: DOT11_NOERP_DYNAMIC
* DOT11_OID_SLOTSETTINGS: DOT11_SLOTSETTINGS_LONG
*/
DOT11_PROFILE_MIXED_G_WIFI = 1,
/* DOT11_OID_RATES: 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54Mbs
* DOT11_OID_PREAMBLESETTINGS: DOT11_PREAMBLESETTING_DYNAMIC
* DOT11_OID_CWMIN: 15
* DOT11_OID_NONEPROTECTION: DOT11_NOERP_DYNAMIC
* DOT11_OID_SLOTSETTINGS: DOT11_SLOTSETTINGS_DYNAMIC
*/
DOT11_PROFILE_MIXED_LONG = 2, /* "Long range" */
/* Same as Profile MIXED_G_WIFI */
DOT11_PROFILE_G_ONLY = 3,
/* Same as Profile MIXED_G_WIFI */
DOT11_PROFILE_TEST = 4,
/* Same as Profile MIXED_G_WIFI except:
* DOT11_OID_PREAMBLESETTINGS: DOT11_PREAMBLESETTING_SHORT
* DOT11_OID_NONEPROTECTION: DOT11_NOERP_NEVER
* DOT11_OID_SLOTSETTINGS: DOT11_SLOTSETTINGS_SHORT
*/
DOT11_PROFILE_B_WIFI = 5,
/* Same as Profile B_ONLY */
DOT11_PROFILE_A_ONLY = 6,
/* Same as Profile MIXED_G_WIFI except:
* DOT11_OID_RATES: 6, 9, 12, 18, 24, 36, 48, 54Mbs
*/
DOT11_PROFILE_MIXED_SHORT = 7
/* Same as MIXED_G_WIFI */
};
/* The dot11d conformance level configures the 802.11d conformance levels.
* The following conformance levels exist:*/
enum oid_inl_conformance_t {
OID_INL_CONFORMANCE_NONE = 0, /* Perform active scanning */
OID_INL_CONFORMANCE_STRICT = 1, /* Strictly adhere to 802.11d */
OID_INL_CONFORMANCE_FLEXIBLE = 2, /* Use passed 802.11d info to
* determine channel AND/OR just make assumption that active
* channels are valid channels */
};
enum oid_inl_mode_t {
INL_MODE_NONE = -1,
INL_MODE_PROMISCUOUS = 0,
INL_MODE_CLIENT = 1,
INL_MODE_AP = 2,
INL_MODE_SNIFFER = 3
};
enum oid_inl_config_t {
INL_CONFIG_NOTHING = 0x00,
INL_CONFIG_MANUALRUN = 0x01,
INL_CONFIG_FRAMETRAP = 0x02,
INL_CONFIG_RXANNEX = 0x04,
INL_CONFIG_TXANNEX = 0x08,
INL_CONFIG_WDS = 0x10
};
enum oid_inl_phycap_t {
INL_PHYCAP_2400MHZ = 1,
INL_PHYCAP_5000MHZ = 2,
INL_PHYCAP_FAA = 0x80000000, /* Means card supports the FAA switch */
};
enum oid_num_t {
GEN_OID_MACADDRESS = 0,
GEN_OID_LINKSTATE,
GEN_OID_WATCHDOG,
GEN_OID_MIBOP,
GEN_OID_OPTIONS,
GEN_OID_LEDCONFIG,
/* 802.11 */
DOT11_OID_BSSTYPE,
DOT11_OID_BSSID,
DOT11_OID_SSID,
DOT11_OID_STATE,
DOT11_OID_AID,
DOT11_OID_COUNTRYSTRING,
DOT11_OID_SSIDOVERRIDE,
DOT11_OID_MEDIUMLIMIT,
DOT11_OID_BEACONPERIOD,
DOT11_OID_DTIMPERIOD,
DOT11_OID_ATIMWINDOW,
DOT11_OID_LISTENINTERVAL,
DOT11_OID_CFPPERIOD,
DOT11_OID_CFPDURATION,
DOT11_OID_AUTHENABLE,
DOT11_OID_PRIVACYINVOKED,
DOT11_OID_EXUNENCRYPTED,
DOT11_OID_DEFKEYID,
DOT11_OID_DEFKEYX, /* DOT11_OID_DEFKEY1,...DOT11_OID_DEFKEY4 */
DOT11_OID_STAKEY,
DOT11_OID_REKEYTHRESHOLD,
DOT11_OID_STASC,
DOT11_OID_PRIVTXREJECTED,
DOT11_OID_PRIVRXPLAIN,
DOT11_OID_PRIVRXFAILED,
DOT11_OID_PRIVRXNOKEY,
DOT11_OID_RTSTHRESH,
DOT11_OID_FRAGTHRESH,
DOT11_OID_SHORTRETRIES,
DOT11_OID_LONGRETRIES,
DOT11_OID_MAXTXLIFETIME,
DOT11_OID_MAXRXLIFETIME,
DOT11_OID_AUTHRESPTIMEOUT,
DOT11_OID_ASSOCRESPTIMEOUT,
DOT11_OID_ALOFT_TABLE,
DOT11_OID_ALOFT_CTRL_TABLE,
DOT11_OID_ALOFT_RETREAT,
DOT11_OID_ALOFT_PROGRESS,
DOT11_OID_ALOFT_FIXEDRATE,
DOT11_OID_ALOFT_RSSIGRAPH,
DOT11_OID_ALOFT_CONFIG,
DOT11_OID_VDCFX,
DOT11_OID_MAXFRAMEBURST,
DOT11_OID_PSM,
DOT11_OID_CAMTIMEOUT,
DOT11_OID_RECEIVEDTIMS,
DOT11_OID_ROAMPREFERENCE,
DOT11_OID_BRIDGELOCAL,
DOT11_OID_CLIENTS,
DOT11_OID_CLIENTSASSOCIATED,
DOT11_OID_CLIENTX, /* DOT11_OID_CLIENTX,...DOT11_OID_CLIENT2007 */
DOT11_OID_CLIENTFIND,
DOT11_OID_WDSLINKADD,
DOT11_OID_WDSLINKREMOVE,
DOT11_OID_EAPAUTHSTA,
DOT11_OID_EAPUNAUTHSTA,
DOT11_OID_DOT1XENABLE,
DOT11_OID_MICFAILURE,
DOT11_OID_REKEYINDICATE,
DOT11_OID_MPDUTXSUCCESSFUL,
DOT11_OID_MPDUTXONERETRY,
DOT11_OID_MPDUTXMULTIPLERETRIES,
DOT11_OID_MPDUTXFAILED,
DOT11_OID_MPDURXSUCCESSFUL,
DOT11_OID_MPDURXDUPS,
DOT11_OID_RTSSUCCESSFUL,
DOT11_OID_RTSFAILED,
DOT11_OID_ACKFAILED,
DOT11_OID_FRAMERECEIVES,
DOT11_OID_FRAMEERRORS,
DOT11_OID_FRAMEABORTS,
DOT11_OID_FRAMEABORTSPHY,
DOT11_OID_SLOTTIME,
DOT11_OID_CWMIN, /* MIN DCS backoff */
DOT11_OID_CWMAX, /* MAX DCS backoff */
DOT11_OID_ACKWINDOW,
DOT11_OID_ANTENNARX,
DOT11_OID_ANTENNATX,
DOT11_OID_ANTENNADIVERSITY,
DOT11_OID_CHANNEL,
DOT11_OID_EDTHRESHOLD,
DOT11_OID_PREAMBLESETTINGS,
DOT11_OID_RATES,
DOT11_OID_CCAMODESUPPORTED,
DOT11_OID_CCAMODE,
DOT11_OID_RSSIVECTOR,
DOT11_OID_OUTPUTPOWERTABLE,
DOT11_OID_OUTPUTPOWER,
DOT11_OID_SUPPORTEDRATES,
DOT11_OID_FREQUENCY,
DOT11_OID_SUPPORTEDFREQUENCIES,
DOT11_OID_NOISEFLOOR,
DOT11_OID_FREQUENCYACTIVITY,
DOT11_OID_IQCALIBRATIONTABLE,
DOT11_OID_NONERPPROTECTION,
DOT11_OID_SLOTSETTINGS,
DOT11_OID_NONERPTIMEOUT,
DOT11_OID_PROFILES,
DOT11_OID_EXTENDEDRATES,
DOT11_OID_DEAUTHENTICATE,
DOT11_OID_AUTHENTICATE,
DOT11_OID_DISASSOCIATE,
DOT11_OID_ASSOCIATE,
DOT11_OID_SCAN,
DOT11_OID_BEACON,
DOT11_OID_PROBE,
DOT11_OID_DEAUTHENTICATEEX,
DOT11_OID_AUTHENTICATEEX,
DOT11_OID_DISASSOCIATEEX,
DOT11_OID_ASSOCIATEEX,
DOT11_OID_REASSOCIATE,
DOT11_OID_REASSOCIATEEX,
DOT11_OID_NONERPSTATUS,
DOT11_OID_STATIMEOUT,
DOT11_OID_MLMEAUTOLEVEL,
DOT11_OID_BSSTIMEOUT,
DOT11_OID_ATTACHMENT,
DOT11_OID_PSMBUFFER,
DOT11_OID_BSSS,
DOT11_OID_BSSX, /*DOT11_OID_BSS1,...,DOT11_OID_BSS64 */
DOT11_OID_BSSFIND,
DOT11_OID_BSSLIST,
OID_INL_TUNNEL,
OID_INL_MEMADDR,
OID_INL_MEMORY,
OID_INL_MODE,
OID_INL_COMPONENT_NR,
OID_INL_VERSION,
OID_INL_INTERFACE_ID,
OID_INL_COMPONENT_ID,
OID_INL_CONFIG,
OID_INL_DOT11D_CONFORMANCE,
OID_INL_PHYCAPABILITIES,
OID_INL_OUTPUTPOWER,
OID_NUM_LAST
};
#define OID_FLAG_CACHED 0x80
#define OID_FLAG_TYPE 0x7f
#define OID_TYPE_U32 0x01
#define OID_TYPE_SSID 0x02
#define OID_TYPE_KEY 0x03
#define OID_TYPE_BUFFER 0x04
#define OID_TYPE_BSS 0x05
#define OID_TYPE_BSSLIST 0x06
#define OID_TYPE_FREQUENCIES 0x07
#define OID_TYPE_MLME 0x08
#define OID_TYPE_MLMEEX 0x09
#define OID_TYPE_ADDR 0x0A
#define OID_TYPE_RAW 0x0B
#define OID_TYPE_ATTACH 0x0C
/* OID_TYPE_MLMEEX is special because of a variable size field when sending.
* Not yet implemented (not used in driver anyway).
*/
struct oid_t {
enum oid_num_t oid;
short range; /* to define a range of oid */
short size; /* max size of the associated data */
char flags;
};
union oid_res_t {
void *ptr;
u32 u;
};
#define IWMAX_BITRATES 20
#define IWMAX_BSS 24
#define IWMAX_FREQ 30
#define PRIV_STR_SIZE 1024
#endif /* !defined(_ISL_OID_H) */
/* EOF */
File diff suppressed because it is too large Load Diff
@@ -1,204 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2002 Intersil Americas Inc.
* Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
* Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
* Copyright (C) 2003 Aurelien Alleaume <slts@free.fr>
*/
#ifndef _ISLPCI_DEV_H
#define _ISLPCI_DEV_H
#include <linux/irqreturn.h>
#include <linux/netdevice.h>
#include <linux/wireless.h>
#include <net/iw_handler.h>
#include <linux/list.h>
#include <linux/mutex.h>
#include "isl_38xx.h"
#include "isl_oid.h"
#include "islpci_mgt.h"
/* some states might not be superflous and may be removed when
design is finalized (hvr) */
typedef enum {
PRV_STATE_OFF = 0, /* this means hw_unavailable is != 0 */
PRV_STATE_PREBOOT, /* we are in a pre-boot state (empty RAM) */
PRV_STATE_BOOT, /* boot state (fw upload, run fw) */
PRV_STATE_POSTBOOT, /* after boot state, need reset now */
PRV_STATE_PREINIT, /* pre-init state */
PRV_STATE_INIT, /* init state (restore MIB backup to device) */
PRV_STATE_READY, /* driver&device are in operational state */
PRV_STATE_SLEEP /* device in sleep mode */
} islpci_state_t;
/* ACL using MAC address */
struct mac_entry {
struct list_head _list;
char addr[ETH_ALEN];
};
struct islpci_acl {
enum { MAC_POLICY_OPEN=0, MAC_POLICY_ACCEPT=1, MAC_POLICY_REJECT=2 } policy;
struct list_head mac_list; /* a list of mac_entry */
int size; /* size of queue */
struct mutex lock; /* accessed in ioctls and trap_work */
};
struct islpci_membuf {
int size; /* size of memory */
void *mem; /* address of memory as seen by CPU */
dma_addr_t pci_addr; /* address of memory as seen by device */
};
#define MAX_BSS_WPA_IE_COUNT 64
#define MAX_WPA_IE_LEN 64
struct islpci_bss_wpa_ie {
struct list_head list;
unsigned long last_update;
u8 bssid[ETH_ALEN];
u8 wpa_ie[MAX_WPA_IE_LEN];
size_t wpa_ie_len;
};
typedef struct {
spinlock_t slock; /* generic spinlock; */
u32 priv_oid;
/* our mib cache */
u32 iw_mode;
struct rw_semaphore mib_sem;
void **mib;
char nickname[IW_ESSID_MAX_SIZE+1];
/* Take care of the wireless stats */
struct work_struct stats_work;
struct mutex stats_lock;
/* remember when we last updated the stats */
unsigned long stats_timestamp;
/* The first is accessed under semaphore locking.
* The second is the clean one we return to iwconfig.
*/
struct iw_statistics local_iwstatistics;
struct iw_statistics iwstatistics;
struct iw_spy_data spy_data; /* iwspy support */
struct iw_public_data wireless_data;
int monitor_type; /* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_PRISM */
struct islpci_acl acl;
/* PCI bus allocation & configuration members */
struct pci_dev *pdev; /* PCI structure information */
char firmware[33];
void __iomem *device_base; /* ioremapped device base address */
/* consistent DMA region */
void *driver_mem_address; /* base DMA address */
dma_addr_t device_host_address; /* base DMA address (bus address) */
dma_addr_t device_psm_buffer; /* host memory for PSM buffering (bus address) */
/* our network_device structure */
struct net_device *ndev;
/* device queue interface members */
struct isl38xx_cb *control_block; /* device control block
(== driver_mem_address!) */
/* Each queue has three indexes:
* free/index_mgmt/data_rx/tx (called index, see below),
* driver_curr_frag, and device_curr_frag (in the control block)
* All indexes are ever-increasing, but interpreted modulo the
* device queue size when used.
* index <= device_curr_frag <= driver_curr_frag at all times
* For rx queues, [index, device_curr_frag) contains fragments
* that the interrupt processing needs to handle (owned by driver).
* [device_curr_frag, driver_curr_frag) is the free space in the
* rx queue, waiting for data (owned by device). The driver
* increments driver_curr_frag to indicate to the device that more
* buffers are available.
* If device_curr_frag == driver_curr_frag, no more rx buffers are
* available, and the rx DMA engine of the device is halted.
* For tx queues, [index, device_curr_frag) contains fragments
* where tx is done; they need to be freed (owned by driver).
* [device_curr_frag, driver_curr_frag) contains the frames
* that are being transferred (owned by device). The driver
* increments driver_curr_frag to indicate that more tx work
* needs to be done.
*/
u32 index_mgmt_rx; /* real index mgmt rx queue */
u32 index_mgmt_tx; /* read index mgmt tx queue */
u32 free_data_rx; /* free pointer data rx queue */
u32 free_data_tx; /* free pointer data tx queue */
u32 data_low_tx_full; /* full detected flag */
/* frame memory buffers for the device queues */
struct islpci_membuf mgmt_tx[ISL38XX_CB_MGMT_QSIZE];
struct islpci_membuf mgmt_rx[ISL38XX_CB_MGMT_QSIZE];
struct sk_buff *data_low_tx[ISL38XX_CB_TX_QSIZE];
struct sk_buff *data_low_rx[ISL38XX_CB_RX_QSIZE];
dma_addr_t pci_map_tx_address[ISL38XX_CB_TX_QSIZE];
dma_addr_t pci_map_rx_address[ISL38XX_CB_RX_QSIZE];
/* wait for a reset interrupt */
wait_queue_head_t reset_done;
/* used by islpci_mgt_transaction */
struct mutex mgmt_lock; /* serialize access to mailbox and wqueue */
struct islpci_mgmtframe *mgmt_received; /* mbox for incoming frame */
wait_queue_head_t mgmt_wqueue; /* waitqueue for mbox */
/* state machine */
islpci_state_t state;
int state_off; /* enumeration of off-state, if 0 then
* we're not in any off-state */
/* WPA stuff */
int wpa; /* WPA mode enabled */
struct list_head bss_wpa_list;
int num_bss_wpa;
struct mutex wpa_lock;
u8 wpa_ie[MAX_WPA_IE_LEN];
size_t wpa_ie_len;
struct work_struct reset_task;
int reset_task_pending;
} islpci_private;
static inline islpci_state_t
islpci_get_state(islpci_private *priv)
{
/* lock */
return priv->state;
/* unlock */
}
islpci_state_t islpci_set_state(islpci_private *priv, islpci_state_t new_state);
#define ISLPCI_TX_TIMEOUT (2*HZ)
irqreturn_t islpci_interrupt(int, void *);
int prism54_post_setup(islpci_private *, int);
int islpci_reset(islpci_private *, int);
static inline void
islpci_trigger(islpci_private *priv)
{
isl38xx_trigger_device(islpci_get_state(priv) == PRV_STATE_SLEEP,
priv->device_base);
}
int islpci_free_memory(islpci_private *);
struct net_device *islpci_setup(struct pci_dev *);
#define DRV_NAME "prism54"
#define DRV_VERSION "1.2"
#endif /* _ISLPCI_DEV_H */
@@ -1,489 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2002 Intersil Americas Inc.
* Copyright (C) 2004 Aurelien Alleaume <slts@free.fr>
*/
#include <linux/module.h>
#include <linux/gfp.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/if_arp.h>
#include <asm/byteorder.h>
#include "prismcompat.h"
#include "isl_38xx.h"
#include "islpci_eth.h"
#include "islpci_mgt.h"
#include "oid_mgt.h"
/******************************************************************************
Network Interface functions
******************************************************************************/
void
islpci_eth_cleanup_transmit(islpci_private *priv,
isl38xx_control_block *control_block)
{
struct sk_buff *skb;
u32 index;
/* compare the control block read pointer with the free pointer */
while (priv->free_data_tx !=
le32_to_cpu(control_block->
device_curr_frag[ISL38XX_CB_TX_DATA_LQ])) {
/* read the index of the first fragment to be freed */
index = priv->free_data_tx % ISL38XX_CB_TX_QSIZE;
/* check for holes in the arrays caused by multi fragment frames
* searching for the last fragment of a frame */
if (priv->pci_map_tx_address[index]) {
/* entry is the last fragment of a frame
* free the skb structure and unmap pci memory */
skb = priv->data_low_tx[index];
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_TRACING,
"cleanup skb %p skb->data %p skb->len %u truesize %u\n",
skb, skb->data, skb->len, skb->truesize);
#endif
dma_unmap_single(&priv->pdev->dev,
priv->pci_map_tx_address[index],
skb->len, DMA_TO_DEVICE);
dev_kfree_skb_irq(skb);
skb = NULL;
}
/* increment the free data low queue pointer */
priv->free_data_tx++;
}
}
netdev_tx_t
islpci_eth_transmit(struct sk_buff *skb, struct net_device *ndev)
{
islpci_private *priv = netdev_priv(ndev);
isl38xx_control_block *cb = priv->control_block;
u32 index;
dma_addr_t pci_map_address;
int frame_size;
isl38xx_fragment *fragment;
int offset;
struct sk_buff *newskb;
int newskb_offset;
unsigned long flags;
unsigned char wds_mac[6];
u32 curr_frag;
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_FUNCTION_CALLS, "islpci_eth_transmit\n");
#endif
/* lock the driver code */
spin_lock_irqsave(&priv->slock, flags);
/* check whether the destination queue has enough fragments for the frame */
curr_frag = le32_to_cpu(cb->driver_curr_frag[ISL38XX_CB_TX_DATA_LQ]);
if (unlikely(curr_frag - priv->free_data_tx >= ISL38XX_CB_TX_QSIZE)) {
printk(KERN_ERR "%s: transmit device queue full when awake\n",
ndev->name);
netif_stop_queue(ndev);
/* trigger the device */
isl38xx_w32_flush(priv->device_base, ISL38XX_DEV_INT_UPDATE,
ISL38XX_DEV_INT_REG);
udelay(ISL38XX_WRITEIO_DELAY);
goto drop_free;
}
/* Check alignment and WDS frame formatting. The start of the packet should
* be aligned on a 4-byte boundary. If WDS is enabled add another 6 bytes
* and add WDS address information */
if (likely(((long) skb->data & 0x03) | init_wds)) {
/* get the number of bytes to add and re-align */
offset = (4 - (long) skb->data) & 0x03;
offset += init_wds ? 6 : 0;
/* check whether the current skb can be used */
if (!skb_cloned(skb) && (skb_tailroom(skb) >= offset)) {
unsigned char *src = skb->data;
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_TRACING, "skb offset %i wds %i\n", offset,
init_wds);
#endif
/* align the buffer on 4-byte boundary */
skb_reserve(skb, (4 - (long) skb->data) & 0x03);
if (init_wds) {
/* wds requires an additional address field of 6 bytes */
skb_put(skb, 6);
#ifdef ISLPCI_ETH_DEBUG
printk("islpci_eth_transmit:wds_mac\n");
#endif
memmove(skb->data + 6, src, skb->len);
skb_copy_to_linear_data(skb, wds_mac, 6);
} else {
memmove(skb->data, src, skb->len);
}
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_TRACING, "memmove %p %p %i\n", skb->data,
src, skb->len);
#endif
} else {
newskb =
dev_alloc_skb(init_wds ? skb->len + 6 : skb->len);
if (unlikely(newskb == NULL)) {
printk(KERN_ERR "%s: Cannot allocate skb\n",
ndev->name);
goto drop_free;
}
newskb_offset = (4 - (long) newskb->data) & 0x03;
/* Check if newskb->data is aligned */
if (newskb_offset)
skb_reserve(newskb, newskb_offset);
skb_put(newskb, init_wds ? skb->len + 6 : skb->len);
if (init_wds) {
skb_copy_from_linear_data(skb,
newskb->data + 6,
skb->len);
skb_copy_to_linear_data(newskb, wds_mac, 6);
#ifdef ISLPCI_ETH_DEBUG
printk("islpci_eth_transmit:wds_mac\n");
#endif
} else
skb_copy_from_linear_data(skb, newskb->data,
skb->len);
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_TRACING, "memcpy %p %p %i wds %i\n",
newskb->data, skb->data, skb->len, init_wds);
#endif
newskb->dev = skb->dev;
dev_kfree_skb_irq(skb);
skb = newskb;
}
}
/* display the buffer contents for debugging */
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_BUFFER_CONTENTS, "\ntx %p ", skb->data);
display_buffer((char *) skb->data, skb->len);
#endif
/* map the skb buffer to pci memory for DMA operation */
pci_map_address = dma_map_single(&priv->pdev->dev, (void *)skb->data,
skb->len, DMA_TO_DEVICE);
if (dma_mapping_error(&priv->pdev->dev, pci_map_address)) {
printk(KERN_WARNING "%s: cannot map buffer to PCI\n",
ndev->name);
goto drop_free;
}
/* Place the fragment in the control block structure. */
index = curr_frag % ISL38XX_CB_TX_QSIZE;
fragment = &cb->tx_data_low[index];
priv->pci_map_tx_address[index] = pci_map_address;
/* store the skb address for future freeing */
priv->data_low_tx[index] = skb;
/* set the proper fragment start address and size information */
frame_size = skb->len;
fragment->size = cpu_to_le16(frame_size);
fragment->flags = cpu_to_le16(0); /* set to 1 if more fragments */
fragment->address = cpu_to_le32(pci_map_address);
curr_frag++;
/* The fragment address in the control block must have been
* written before announcing the frame buffer to device. */
wmb();
cb->driver_curr_frag[ISL38XX_CB_TX_DATA_LQ] = cpu_to_le32(curr_frag);
if (curr_frag - priv->free_data_tx + ISL38XX_MIN_QTHRESHOLD
> ISL38XX_CB_TX_QSIZE) {
/* stop sends from upper layers */
netif_stop_queue(ndev);
/* set the full flag for the transmission queue */
priv->data_low_tx_full = 1;
}
ndev->stats.tx_packets++;
ndev->stats.tx_bytes += skb->len;
/* trigger the device */
islpci_trigger(priv);
/* unlock the driver code */
spin_unlock_irqrestore(&priv->slock, flags);
return NETDEV_TX_OK;
drop_free:
ndev->stats.tx_dropped++;
spin_unlock_irqrestore(&priv->slock, flags);
dev_kfree_skb(skb);
return NETDEV_TX_OK;
}
static inline int
islpci_monitor_rx(islpci_private *priv, struct sk_buff **skb)
{
/* The card reports full 802.11 packets but with a 20 bytes
* header and without the FCS. But there a is a bit that
* indicates if the packet is corrupted :-) */
struct rfmon_header *hdr = (struct rfmon_header *) (*skb)->data;
if (hdr->flags & 0x01)
/* This one is bad. Drop it ! */
return -1;
if (priv->ndev->type == ARPHRD_IEEE80211_PRISM) {
struct avs_80211_1_header *avs;
/* extract the relevant data from the header */
u32 clock = le32_to_cpu(hdr->clock);
u8 rate = hdr->rate;
u16 freq = le16_to_cpu(hdr->freq);
u8 rssi = hdr->rssi;
skb_pull(*skb, sizeof (struct rfmon_header));
if (skb_headroom(*skb) < sizeof (struct avs_80211_1_header)) {
struct sk_buff *newskb = skb_copy_expand(*skb,
sizeof (struct
avs_80211_1_header),
0, GFP_ATOMIC);
if (newskb) {
dev_kfree_skb_irq(*skb);
*skb = newskb;
} else
return -1;
/* This behavior is not very subtile... */
}
/* make room for the new header and fill it. */
avs = skb_push(*skb, sizeof(struct avs_80211_1_header));
avs->version = cpu_to_be32(P80211CAPTURE_VERSION);
avs->length = cpu_to_be32(sizeof (struct avs_80211_1_header));
avs->mactime = cpu_to_be64(clock);
avs->hosttime = cpu_to_be64(jiffies);
avs->phytype = cpu_to_be32(6); /*OFDM: 6 for (g), 8 for (a) */
avs->channel = cpu_to_be32(channel_of_freq(freq));
avs->datarate = cpu_to_be32(rate * 5);
avs->antenna = cpu_to_be32(0); /*unknown */
avs->priority = cpu_to_be32(0); /*unknown */
avs->ssi_type = cpu_to_be32(3); /*2: dBm, 3: raw RSSI */
avs->ssi_signal = cpu_to_be32(rssi & 0x7f);
avs->ssi_noise = cpu_to_be32(priv->local_iwstatistics.qual.noise); /*better than 'undefined', I assume */
avs->preamble = cpu_to_be32(0); /*unknown */
avs->encoding = cpu_to_be32(0); /*unknown */
} else
skb_pull(*skb, sizeof (struct rfmon_header));
(*skb)->protocol = htons(ETH_P_802_2);
skb_reset_mac_header(*skb);
(*skb)->pkt_type = PACKET_OTHERHOST;
return 0;
}
int
islpci_eth_receive(islpci_private *priv)
{
struct net_device *ndev = priv->ndev;
isl38xx_control_block *control_block = priv->control_block;
struct sk_buff *skb;
u16 size;
u32 index, offset;
unsigned char *src;
int discard = 0;
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_FUNCTION_CALLS, "islpci_eth_receive\n");
#endif
/* the device has written an Ethernet frame in the data area
* of the sk_buff without updating the structure, do it now */
index = priv->free_data_rx % ISL38XX_CB_RX_QSIZE;
size = le16_to_cpu(control_block->rx_data_low[index].size);
skb = priv->data_low_rx[index];
offset = ((unsigned long)
le32_to_cpu(control_block->rx_data_low[index].address) -
(unsigned long) skb->data) & 3;
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_TRACING,
"frq->addr %x skb->data %p skb->len %u offset %u truesize %u\n",
control_block->rx_data_low[priv->free_data_rx].address, skb->data,
skb->len, offset, skb->truesize);
#endif
/* delete the streaming DMA mapping before processing the skb */
dma_unmap_single(&priv->pdev->dev, priv->pci_map_rx_address[index],
MAX_FRAGMENT_SIZE_RX + 2, DMA_FROM_DEVICE);
/* update the skb structure and align the buffer */
skb_put(skb, size);
if (offset) {
/* shift the buffer allocation offset bytes to get the right frame */
skb_pull(skb, 2);
skb_put(skb, 2);
}
#if VERBOSE > SHOW_ERROR_MESSAGES
/* display the buffer contents for debugging */
DEBUG(SHOW_BUFFER_CONTENTS, "\nrx %p ", skb->data);
display_buffer((char *) skb->data, skb->len);
#endif
/* check whether WDS is enabled and whether the data frame is a WDS frame */
if (init_wds) {
/* WDS enabled, check for the wds address on the first 6 bytes of the buffer */
src = skb->data + 6;
memmove(skb->data, src, skb->len - 6);
skb_trim(skb, skb->len - 6);
}
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_TRACING, "Fragment size %i in skb at %p\n", size, skb);
DEBUG(SHOW_TRACING, "Skb data at %p, length %i\n", skb->data, skb->len);
/* display the buffer contents for debugging */
DEBUG(SHOW_BUFFER_CONTENTS, "\nrx %p ", skb->data);
display_buffer((char *) skb->data, skb->len);
#endif
/* take care of monitor mode and spy monitoring. */
if (unlikely(priv->iw_mode == IW_MODE_MONITOR)) {
skb->dev = ndev;
discard = islpci_monitor_rx(priv, &skb);
} else {
if (unlikely(skb->data[2 * ETH_ALEN] == 0)) {
/* The packet has a rx_annex. Read it for spy monitoring, Then
* remove it, while keeping the 2 leading MAC addr.
*/
struct iw_quality wstats;
struct rx_annex_header *annex =
(struct rx_annex_header *) skb->data;
wstats.level = annex->rfmon.rssi;
/* The noise value can be a bit outdated if nobody's
* reading wireless stats... */
wstats.noise = priv->local_iwstatistics.qual.noise;
wstats.qual = wstats.level - wstats.noise;
wstats.updated = 0x07;
/* Update spy records */
wireless_spy_update(ndev, annex->addr2, &wstats);
skb_copy_from_linear_data(skb,
(skb->data +
sizeof(struct rfmon_header)),
2 * ETH_ALEN);
skb_pull(skb, sizeof (struct rfmon_header));
}
skb->protocol = eth_type_trans(skb, ndev);
}
skb->ip_summed = CHECKSUM_NONE;
ndev->stats.rx_packets++;
ndev->stats.rx_bytes += size;
/* deliver the skb to the network layer */
#ifdef ISLPCI_ETH_DEBUG
printk
("islpci_eth_receive:netif_rx %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
skb->data[0], skb->data[1], skb->data[2], skb->data[3],
skb->data[4], skb->data[5]);
#endif
if (unlikely(discard)) {
dev_kfree_skb_irq(skb);
skb = NULL;
} else
netif_rx(skb);
/* increment the read index for the rx data low queue */
priv->free_data_rx++;
/* add one or more sk_buff structures */
while (index =
le32_to_cpu(control_block->
driver_curr_frag[ISL38XX_CB_RX_DATA_LQ]),
index - priv->free_data_rx < ISL38XX_CB_RX_QSIZE) {
/* allocate an sk_buff for received data frames storage
* include any required allignment operations */
skb = dev_alloc_skb(MAX_FRAGMENT_SIZE_RX + 2);
if (unlikely(skb == NULL)) {
/* error allocating an sk_buff structure elements */
DEBUG(SHOW_ERROR_MESSAGES, "Error allocating skb\n");
break;
}
skb_reserve(skb, (4 - (long) skb->data) & 0x03);
/* store the new skb structure pointer */
index = index % ISL38XX_CB_RX_QSIZE;
priv->data_low_rx[index] = skb;
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_TRACING,
"new alloc skb %p skb->data %p skb->len %u index %u truesize %u\n",
skb, skb->data, skb->len, index, skb->truesize);
#endif
/* set the streaming DMA mapping for proper PCI bus operation */
priv->pci_map_rx_address[index] =
dma_map_single(&priv->pdev->dev, (void *)skb->data,
MAX_FRAGMENT_SIZE_RX + 2, DMA_FROM_DEVICE);
if (dma_mapping_error(&priv->pdev->dev, priv->pci_map_rx_address[index])) {
/* error mapping the buffer to device accessible memory address */
DEBUG(SHOW_ERROR_MESSAGES,
"Error mapping DMA address\n");
/* free the skbuf structure before aborting */
dev_kfree_skb_irq(skb);
skb = NULL;
break;
}
/* update the fragment address */
control_block->rx_data_low[index].address =
cpu_to_le32((u32)priv->pci_map_rx_address[index]);
wmb();
/* increment the driver read pointer */
le32_add_cpu(&control_block->
driver_curr_frag[ISL38XX_CB_RX_DATA_LQ], 1);
}
/* trigger the device */
islpci_trigger(priv);
return 0;
}
void
islpci_do_reset_and_wake(struct work_struct *work)
{
islpci_private *priv = container_of(work, islpci_private, reset_task);
islpci_reset(priv, 1);
priv->reset_task_pending = 0;
smp_wmb();
netif_wake_queue(priv->ndev);
}
void
islpci_eth_tx_timeout(struct net_device *ndev, unsigned int txqueue)
{
islpci_private *priv = netdev_priv(ndev);
/* increment the transmit error counter */
ndev->stats.tx_errors++;
if (!priv->reset_task_pending) {
printk(KERN_WARNING
"%s: tx_timeout, scheduling reset", ndev->name);
netif_stop_queue(ndev);
priv->reset_task_pending = 1;
schedule_work(&priv->reset_task);
} else {
printk(KERN_WARNING
"%s: tx_timeout, waiting for reset", ndev->name);
}
}
@@ -1,59 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2002 Intersil Americas Inc.
*/
#ifndef _ISLPCI_ETH_H
#define _ISLPCI_ETH_H
#include "isl_38xx.h"
#include "islpci_dev.h"
struct rfmon_header {
__le16 unk0; /* = 0x0000 */
__le16 length; /* = 0x1400 */
__le32 clock; /* 1MHz clock */
u8 flags;
u8 unk1;
u8 rate;
u8 unk2;
__le16 freq;
__le16 unk3;
u8 rssi;
u8 padding[3];
} __packed;
struct rx_annex_header {
u8 addr1[ETH_ALEN];
u8 addr2[ETH_ALEN];
struct rfmon_header rfmon;
} __packed;
/* wlan-ng (and hopefully others) AVS header, version one. Fields in
* network byte order. */
#define P80211CAPTURE_VERSION 0x80211001
struct avs_80211_1_header {
__be32 version;
__be32 length;
__be64 mactime;
__be64 hosttime;
__be32 phytype;
__be32 channel;
__be32 datarate;
__be32 antenna;
__be32 priority;
__be32 ssi_type;
__be32 ssi_signal;
__be32 ssi_noise;
__be32 preamble;
__be32 encoding;
};
void islpci_eth_cleanup_transmit(islpci_private *, isl38xx_control_block *);
netdev_tx_t islpci_eth_transmit(struct sk_buff *, struct net_device *);
int islpci_eth_receive(islpci_private *);
void islpci_eth_tx_timeout(struct net_device *, unsigned int txqueue);
void islpci_do_reset_and_wake(struct work_struct *);
#endif /* _ISL_GEN_H */
@@ -1,316 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2002 Intersil Americas Inc.
* Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
*/
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/init.h> /* For __init, __exit */
#include <linux/dma-mapping.h>
#include "prismcompat.h"
#include "islpci_dev.h"
#include "islpci_mgt.h" /* for pc_debug */
#include "isl_oid.h"
MODULE_AUTHOR("[Intersil] R.Bastings and W.Termorshuizen, The prism54.org Development Team <prism54-devel@prism54.org>");
MODULE_DESCRIPTION("The Prism54 802.11 Wireless LAN adapter");
MODULE_LICENSE("GPL");
static int init_pcitm = 0;
module_param(init_pcitm, int, 0);
/* In this order: vendor, device, subvendor, subdevice, class, class_mask,
* driver_data
* If you have an update for this please contact prism54-devel@prism54.org
* The latest list can be found at http://wireless.wiki.kernel.org/en/users/Drivers/p54
*/
static const struct pci_device_id prism54_id_tbl[] = {
/* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
{
0x1260, 0x3890,
PCI_ANY_ID, PCI_ANY_ID,
0, 0, 0
},
/* 3COM 3CRWE154G72 Wireless LAN adapter */
{
PCI_VDEVICE(3COM, 0x6001), 0
},
/* Intersil PRISM Indigo Wireless LAN adapter */
{
0x1260, 0x3877,
PCI_ANY_ID, PCI_ANY_ID,
0, 0, 0
},
/* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
{
0x1260, 0x3886,
PCI_ANY_ID, PCI_ANY_ID,
0, 0, 0
},
/* End of list */
{0,0,0,0,0,0,0}
};
/* register the device with the Hotplug facilities of the kernel */
MODULE_DEVICE_TABLE(pci, prism54_id_tbl);
static int prism54_probe(struct pci_dev *, const struct pci_device_id *);
static void prism54_remove(struct pci_dev *);
static int __maybe_unused prism54_suspend(struct device *);
static int __maybe_unused prism54_resume(struct device *);
static SIMPLE_DEV_PM_OPS(prism54_pm_ops, prism54_suspend, prism54_resume);
static struct pci_driver prism54_driver = {
.name = DRV_NAME,
.id_table = prism54_id_tbl,
.probe = prism54_probe,
.remove = prism54_remove,
.driver.pm = &prism54_pm_ops,
};
/******************************************************************************
Module initialization functions
******************************************************************************/
static int
prism54_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
struct net_device *ndev;
u8 latency_tmr;
u32 mem_addr;
islpci_private *priv;
int rvalue;
/* Enable the pci device */
if (pci_enable_device(pdev)) {
printk(KERN_ERR "%s: pci_enable_device() failed.\n", DRV_NAME);
return -ENODEV;
}
/* check whether the latency timer is set correctly */
pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_tmr);
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_TRACING, "latency timer: %x\n", latency_tmr);
#endif
if (latency_tmr < PCIDEVICE_LATENCY_TIMER_MIN) {
/* set the latency timer */
pci_write_config_byte(pdev, PCI_LATENCY_TIMER,
PCIDEVICE_LATENCY_TIMER_VAL);
}
/* enable PCI DMA */
if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
printk(KERN_ERR "%s: 32-bit PCI DMA not supported", DRV_NAME);
goto do_pci_disable_device;
}
/* 0x40 is the programmable timer to configure the response timeout (TRDY_TIMEOUT)
* 0x41 is the programmable timer to configure the retry timeout (RETRY_TIMEOUT)
* The RETRY_TIMEOUT is used to set the number of retries that the core, as a
* Master, will perform before abandoning a cycle. The default value for
* RETRY_TIMEOUT is 0x80, which far exceeds the PCI 2.1 requirement for new
* devices. A write of zero to the RETRY_TIMEOUT register disables this
* function to allow use with any non-compliant legacy devices that may
* execute more retries.
*
* Writing zero to both these two registers will disable both timeouts and
* *can* solve problems caused by devices that are slow to respond.
* Make this configurable - MSW
*/
if ( init_pcitm >= 0 ) {
pci_write_config_byte(pdev, 0x40, (u8)init_pcitm);
pci_write_config_byte(pdev, 0x41, (u8)init_pcitm);
} else {
printk(KERN_INFO "PCI TRDY/RETRY unchanged\n");
}
/* request the pci device I/O regions */
rvalue = pci_request_regions(pdev, DRV_NAME);
if (rvalue) {
printk(KERN_ERR "%s: pci_request_regions failure (rc=%d)\n",
DRV_NAME, rvalue);
goto do_pci_disable_device;
}
/* check if the memory window is indeed set */
rvalue = pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &mem_addr);
if (rvalue || !mem_addr) {
printk(KERN_ERR "%s: PCI device memory region not configured; fix your BIOS or CardBus bridge/drivers\n",
DRV_NAME);
goto do_pci_release_regions;
}
/* enable PCI bus-mastering */
DEBUG(SHOW_TRACING, "%s: pci_set_master(pdev)\n", DRV_NAME);
pci_set_master(pdev);
/* enable MWI */
pci_try_set_mwi(pdev);
/* setup the network device interface and its structure */
if (!(ndev = islpci_setup(pdev))) {
/* error configuring the driver as a network device */
printk(KERN_ERR "%s: could not configure network device\n",
DRV_NAME);
goto do_pci_clear_mwi;
}
priv = netdev_priv(ndev);
islpci_set_state(priv, PRV_STATE_PREBOOT); /* we are attempting to boot */
/* card is in unknown state yet, might have some interrupts pending */
isl38xx_disable_interrupts(priv->device_base);
/* request for the interrupt before uploading the firmware */
rvalue = request_irq(pdev->irq, islpci_interrupt,
IRQF_SHARED, ndev->name, priv);
if (rvalue) {
/* error, could not hook the handler to the irq */
printk(KERN_ERR "%s: could not install IRQ handler\n",
ndev->name);
goto do_unregister_netdev;
}
/* firmware upload is triggered in islpci_open */
return 0;
do_unregister_netdev:
unregister_netdev(ndev);
islpci_free_memory(priv);
free_netdev(ndev);
priv = NULL;
do_pci_clear_mwi:
pci_clear_mwi(pdev);
do_pci_release_regions:
pci_release_regions(pdev);
do_pci_disable_device:
pci_disable_device(pdev);
return -EIO;
}
/* set by cleanup_module */
static volatile int __in_cleanup_module = 0;
/* this one removes one(!!) instance only */
static void
prism54_remove(struct pci_dev *pdev)
{
struct net_device *ndev = pci_get_drvdata(pdev);
islpci_private *priv = ndev ? netdev_priv(ndev) : NULL;
BUG_ON(!priv);
if (!__in_cleanup_module) {
printk(KERN_DEBUG "%s: hot unplug detected\n", ndev->name);
islpci_set_state(priv, PRV_STATE_OFF);
}
printk(KERN_DEBUG "%s: removing device\n", ndev->name);
unregister_netdev(ndev);
/* free the interrupt request */
if (islpci_get_state(priv) != PRV_STATE_OFF) {
isl38xx_disable_interrupts(priv->device_base);
islpci_set_state(priv, PRV_STATE_OFF);
/* This bellow causes a lockup at rmmod time. It might be
* because some interrupts still linger after rmmod time,
* see bug #17 */
/* pci_set_power_state(pdev, 3);*/ /* try to power-off */
}
free_irq(pdev->irq, priv);
/* free the PCI memory and unmap the remapped page */
islpci_free_memory(priv);
free_netdev(ndev);
priv = NULL;
pci_clear_mwi(pdev);
pci_release_regions(pdev);
pci_disable_device(pdev);
}
static int __maybe_unused
prism54_suspend(struct device *dev)
{
struct net_device *ndev = dev_get_drvdata(dev);
islpci_private *priv = ndev ? netdev_priv(ndev) : NULL;
BUG_ON(!priv);
/* tell the device not to trigger interrupts for now... */
isl38xx_disable_interrupts(priv->device_base);
/* from now on assume the hardware was already powered down
and don't touch it anymore */
islpci_set_state(priv, PRV_STATE_OFF);
netif_stop_queue(ndev);
netif_device_detach(ndev);
return 0;
}
static int __maybe_unused
prism54_resume(struct device *dev)
{
struct net_device *ndev = dev_get_drvdata(dev);
islpci_private *priv = ndev ? netdev_priv(ndev) : NULL;
BUG_ON(!priv);
printk(KERN_NOTICE "%s: got resume request\n", ndev->name);
/* alright let's go into the PREBOOT state */
islpci_reset(priv, 1);
netif_device_attach(ndev);
netif_start_queue(ndev);
return 0;
}
static int __init
prism54_module_init(void)
{
printk(KERN_INFO "Loaded %s driver, version %s\n",
DRV_NAME, DRV_VERSION);
__bug_on_wrong_struct_sizes ();
return pci_register_driver(&prism54_driver);
}
/* by the time prism54_module_exit() terminates, as a postcondition
* all instances will have been destroyed by calls to
* prism54_remove() */
static void __exit
prism54_module_exit(void)
{
__in_cleanup_module = 1;
pci_unregister_driver(&prism54_driver);
printk(KERN_INFO "Unloaded %s driver\n", DRV_NAME);
__in_cleanup_module = 0;
}
/* register entry points */
module_init(prism54_module_init);
module_exit(prism54_module_exit);
/* EOF */
@@ -1,491 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2002 Intersil Americas Inc.
* Copyright 2004 Jens Maurer <Jens.Maurer@gmx.net>
*/
#include <linux/netdevice.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <asm/io.h>
#include <linux/if_arp.h>
#include "prismcompat.h"
#include "isl_38xx.h"
#include "islpci_mgt.h"
#include "isl_oid.h" /* additional types and defs for isl38xx fw */
#include "isl_ioctl.h"
#include <net/iw_handler.h>
/******************************************************************************
Global variable definition section
******************************************************************************/
int pc_debug = VERBOSE;
module_param(pc_debug, int, 0);
/******************************************************************************
Driver general functions
******************************************************************************/
#if VERBOSE > SHOW_ERROR_MESSAGES
void
display_buffer(char *buffer, int length)
{
if ((pc_debug & SHOW_BUFFER_CONTENTS) == 0)
return;
while (length > 0) {
printk("[%02x]", *buffer & 255);
length--;
buffer++;
}
printk("\n");
}
#endif
/*****************************************************************************
Queue handling for management frames
******************************************************************************/
/*
* Helper function to create a PIMFOR management frame header.
*/
static void
pimfor_encode_header(int operation, u32 oid, u32 length, pimfor_header_t *h)
{
h->version = PIMFOR_VERSION;
h->operation = operation;
h->device_id = PIMFOR_DEV_ID_MHLI_MIB;
h->flags = 0;
h->oid = cpu_to_be32(oid);
h->length = cpu_to_be32(length);
}
/*
* Helper function to analyze a PIMFOR management frame header.
*/
static pimfor_header_t *
pimfor_decode_header(void *data, int len)
{
pimfor_header_t *h = data;
while ((void *) h < data + len) {
if (h->flags & PIMFOR_FLAG_LITTLE_ENDIAN) {
le32_to_cpus(&h->oid);
le32_to_cpus(&h->length);
} else {
be32_to_cpus(&h->oid);
be32_to_cpus(&h->length);
}
if (h->oid != OID_INL_TUNNEL)
return h;
h++;
}
return NULL;
}
/*
* Fill the receive queue for management frames with fresh buffers.
*/
int
islpci_mgmt_rx_fill(struct net_device *ndev)
{
islpci_private *priv = netdev_priv(ndev);
isl38xx_control_block *cb = /* volatile not needed */
(isl38xx_control_block *) priv->control_block;
u32 curr = le32_to_cpu(cb->driver_curr_frag[ISL38XX_CB_RX_MGMTQ]);
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgmt_rx_fill\n");
#endif
while (curr - priv->index_mgmt_rx < ISL38XX_CB_MGMT_QSIZE) {
u32 index = curr % ISL38XX_CB_MGMT_QSIZE;
struct islpci_membuf *buf = &priv->mgmt_rx[index];
isl38xx_fragment *frag = &cb->rx_data_mgmt[index];
if (buf->mem == NULL) {
buf->mem = kmalloc(MGMT_FRAME_SIZE, GFP_ATOMIC);
if (!buf->mem)
return -ENOMEM;
buf->size = MGMT_FRAME_SIZE;
}
if (buf->pci_addr == 0) {
buf->pci_addr = dma_map_single(&priv->pdev->dev,
buf->mem,
MGMT_FRAME_SIZE,
DMA_FROM_DEVICE);
if (dma_mapping_error(&priv->pdev->dev, buf->pci_addr)) {
printk(KERN_WARNING
"Failed to make memory DMA'able.\n");
return -ENOMEM;
}
}
/* be safe: always reset control block information */
frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
frag->flags = 0;
frag->address = cpu_to_le32(buf->pci_addr);
curr++;
/* The fragment address in the control block must have
* been written before announcing the frame buffer to
* device */
wmb();
cb->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] = cpu_to_le32(curr);
}
return 0;
}
/*
* Create and transmit a management frame using "operation" and "oid",
* with arguments data/length.
* We either return an error and free the frame, or we return 0 and
* islpci_mgt_cleanup_transmit() frees the frame in the tx-done
* interrupt.
*/
static int
islpci_mgt_transmit(struct net_device *ndev, int operation, unsigned long oid,
void *data, int length)
{
islpci_private *priv = netdev_priv(ndev);
isl38xx_control_block *cb =
(isl38xx_control_block *) priv->control_block;
void *p;
int err = -EINVAL;
unsigned long flags;
isl38xx_fragment *frag;
struct islpci_membuf buf;
u32 curr_frag;
int index;
int frag_len = length + PIMFOR_HEADER_SIZE;
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgt_transmit\n");
#endif
if (frag_len > MGMT_FRAME_SIZE) {
printk(KERN_DEBUG "%s: mgmt frame too large %d\n",
ndev->name, frag_len);
goto error;
}
err = -ENOMEM;
p = buf.mem = kmalloc(frag_len, GFP_KERNEL);
if (!buf.mem)
goto error;
buf.size = frag_len;
/* create the header directly in the fragment data area */
pimfor_encode_header(operation, oid, length, (pimfor_header_t *) p);
p += PIMFOR_HEADER_SIZE;
if (data)
memcpy(p, data, length);
else
memset(p, 0, length);
#if VERBOSE > SHOW_ERROR_MESSAGES
{
pimfor_header_t *h = buf.mem;
DEBUG(SHOW_PIMFOR_FRAMES,
"PIMFOR: op %i, oid 0x%08lx, device %i, flags 0x%x length 0x%x\n",
h->operation, oid, h->device_id, h->flags, length);
/* display the buffer contents for debugging */
display_buffer((char *) h, sizeof (pimfor_header_t));
display_buffer(p, length);
}
#endif
err = -ENOMEM;
buf.pci_addr = dma_map_single(&priv->pdev->dev, buf.mem, frag_len,
DMA_TO_DEVICE);
if (dma_mapping_error(&priv->pdev->dev, buf.pci_addr)) {
printk(KERN_WARNING "%s: cannot map PCI memory for mgmt\n",
ndev->name);
goto error_free;
}
/* Protect the control block modifications against interrupts. */
spin_lock_irqsave(&priv->slock, flags);
curr_frag = le32_to_cpu(cb->driver_curr_frag[ISL38XX_CB_TX_MGMTQ]);
if (curr_frag - priv->index_mgmt_tx >= ISL38XX_CB_MGMT_QSIZE) {
printk(KERN_WARNING "%s: mgmt tx queue is still full\n",
ndev->name);
goto error_unlock;
}
/* commit the frame to the tx device queue */
index = curr_frag % ISL38XX_CB_MGMT_QSIZE;
priv->mgmt_tx[index] = buf;
frag = &cb->tx_data_mgmt[index];
frag->size = cpu_to_le16(frag_len);
frag->flags = 0; /* for any other than the last fragment, set to 1 */
frag->address = cpu_to_le32(buf.pci_addr);
/* The fragment address in the control block must have
* been written before announcing the frame buffer to
* device */
wmb();
cb->driver_curr_frag[ISL38XX_CB_TX_MGMTQ] = cpu_to_le32(curr_frag + 1);
spin_unlock_irqrestore(&priv->slock, flags);
/* trigger the device */
islpci_trigger(priv);
return 0;
error_unlock:
spin_unlock_irqrestore(&priv->slock, flags);
error_free:
kfree(buf.mem);
error:
return err;
}
/*
* Receive a management frame from the device.
* This can be an arbitrary number of traps, and at most one response
* frame for a previous request sent via islpci_mgt_transmit().
*/
int
islpci_mgt_receive(struct net_device *ndev)
{
islpci_private *priv = netdev_priv(ndev);
isl38xx_control_block *cb =
(isl38xx_control_block *) priv->control_block;
u32 curr_frag;
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgt_receive\n");
#endif
/* Only once per interrupt, determine fragment range to
* process. This avoids an endless loop (i.e. lockup) if
* frames come in faster than we can process them. */
curr_frag = le32_to_cpu(cb->device_curr_frag[ISL38XX_CB_RX_MGMTQ]);
barrier();
for (; priv->index_mgmt_rx < curr_frag; priv->index_mgmt_rx++) {
pimfor_header_t *header;
u32 index = priv->index_mgmt_rx % ISL38XX_CB_MGMT_QSIZE;
struct islpci_membuf *buf = &priv->mgmt_rx[index];
u16 frag_len;
int size;
struct islpci_mgmtframe *frame;
/* I have no idea (and no documentation) if flags != 0
* is possible. Drop the frame, reuse the buffer. */
if (le16_to_cpu(cb->rx_data_mgmt[index].flags) != 0) {
printk(KERN_WARNING "%s: unknown flags 0x%04x\n",
ndev->name,
le16_to_cpu(cb->rx_data_mgmt[index].flags));
continue;
}
/* The device only returns the size of the header(s) here. */
frag_len = le16_to_cpu(cb->rx_data_mgmt[index].size);
/*
* We appear to have no way to tell the device the
* size of a receive buffer. Thus, if this check
* triggers, we likely have kernel heap corruption. */
if (frag_len > MGMT_FRAME_SIZE) {
printk(KERN_WARNING
"%s: Bogus packet size of %d (%#x).\n",
ndev->name, frag_len, frag_len);
frag_len = MGMT_FRAME_SIZE;
}
/* Ensure the results of device DMA are visible to the CPU. */
dma_sync_single_for_cpu(&priv->pdev->dev, buf->pci_addr,
buf->size, DMA_FROM_DEVICE);
/* Perform endianess conversion for PIMFOR header in-place. */
header = pimfor_decode_header(buf->mem, frag_len);
if (!header) {
printk(KERN_WARNING "%s: no PIMFOR header found\n",
ndev->name);
continue;
}
/* The device ID from the PIMFOR packet received from
* the MVC is always 0. We forward a sensible device_id.
* Not that anyone upstream would care... */
header->device_id = priv->ndev->ifindex;
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_PIMFOR_FRAMES,
"PIMFOR: op %i, oid 0x%08x, device %i, flags 0x%x length 0x%x\n",
header->operation, header->oid, header->device_id,
header->flags, header->length);
/* display the buffer contents for debugging */
display_buffer((char *) header, PIMFOR_HEADER_SIZE);
display_buffer((char *) header + PIMFOR_HEADER_SIZE,
header->length);
#endif
/* nobody sends these */
if (header->flags & PIMFOR_FLAG_APPLIC_ORIGIN) {
printk(KERN_DEBUG
"%s: errant PIMFOR application frame\n",
ndev->name);
continue;
}
/* Determine frame size, skipping OID_INL_TUNNEL headers. */
size = PIMFOR_HEADER_SIZE + header->length;
frame = kmalloc(sizeof(struct islpci_mgmtframe) + size,
GFP_ATOMIC);
if (!frame)
continue;
frame->ndev = ndev;
memcpy(&frame->buf, header, size);
frame->header = (pimfor_header_t *) frame->buf;
frame->data = frame->buf + PIMFOR_HEADER_SIZE;
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_PIMFOR_FRAMES,
"frame: header: %p, data: %p, size: %d\n",
frame->header, frame->data, size);
#endif
if (header->operation == PIMFOR_OP_TRAP) {
#if VERBOSE > SHOW_ERROR_MESSAGES
printk(KERN_DEBUG
"TRAP: oid 0x%x, device %i, flags 0x%x length %i\n",
header->oid, header->device_id, header->flags,
header->length);
#endif
/* Create work to handle trap out of interrupt
* context. */
INIT_WORK(&frame->ws, prism54_process_trap);
schedule_work(&frame->ws);
} else {
/* Signal the one waiting process that a response
* has been received. */
if ((frame = xchg(&priv->mgmt_received, frame)) != NULL) {
printk(KERN_WARNING
"%s: mgmt response not collected\n",
ndev->name);
kfree(frame);
}
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_TRACING, "Wake up Mgmt Queue\n");
#endif
wake_up(&priv->mgmt_wqueue);
}
}
return 0;
}
/*
* Cleanup the transmit queue by freeing all frames handled by the device.
*/
void
islpci_mgt_cleanup_transmit(struct net_device *ndev)
{
islpci_private *priv = netdev_priv(ndev);
isl38xx_control_block *cb = /* volatile not needed */
(isl38xx_control_block *) priv->control_block;
u32 curr_frag;
#if VERBOSE > SHOW_ERROR_MESSAGES
DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgt_cleanup_transmit\n");
#endif
/* Only once per cleanup, determine fragment range to
* process. This avoids an endless loop (i.e. lockup) if
* the device became confused, incrementing device_curr_frag
* rapidly. */
curr_frag = le32_to_cpu(cb->device_curr_frag[ISL38XX_CB_TX_MGMTQ]);
barrier();
for (; priv->index_mgmt_tx < curr_frag; priv->index_mgmt_tx++) {
int index = priv->index_mgmt_tx % ISL38XX_CB_MGMT_QSIZE;
struct islpci_membuf *buf = &priv->mgmt_tx[index];
dma_unmap_single(&priv->pdev->dev, buf->pci_addr, buf->size,
DMA_TO_DEVICE);
buf->pci_addr = 0;
kfree(buf->mem);
buf->mem = NULL;
buf->size = 0;
}
}
/*
* Perform one request-response transaction to the device.
*/
int
islpci_mgt_transaction(struct net_device *ndev,
int operation, unsigned long oid,
void *senddata, int sendlen,
struct islpci_mgmtframe **recvframe)
{
islpci_private *priv = netdev_priv(ndev);
const long wait_cycle_jiffies = msecs_to_jiffies(ISL38XX_WAIT_CYCLE * 10);
long timeout_left = ISL38XX_MAX_WAIT_CYCLES * wait_cycle_jiffies;
int err;
DEFINE_WAIT(wait);
*recvframe = NULL;
if (mutex_lock_interruptible(&priv->mgmt_lock))
return -ERESTARTSYS;
prepare_to_wait(&priv->mgmt_wqueue, &wait, TASK_UNINTERRUPTIBLE);
err = islpci_mgt_transmit(ndev, operation, oid, senddata, sendlen);
if (err)
goto out;
err = -ETIMEDOUT;
while (timeout_left > 0) {
int timeleft;
struct islpci_mgmtframe *frame;
timeleft = schedule_timeout_uninterruptible(wait_cycle_jiffies);
frame = xchg(&priv->mgmt_received, NULL);
if (frame) {
if (frame->header->oid == oid) {
*recvframe = frame;
err = 0;
goto out;
} else {
printk(KERN_DEBUG
"%s: expecting oid 0x%x, received 0x%x.\n",
ndev->name, (unsigned int) oid,
frame->header->oid);
kfree(frame);
frame = NULL;
}
}
if (timeleft == 0) {
printk(KERN_DEBUG
"%s: timeout waiting for mgmt response %lu, "
"triggering device\n",
ndev->name, timeout_left);
islpci_trigger(priv);
}
timeout_left += timeleft - wait_cycle_jiffies;
}
printk(KERN_WARNING "%s: timeout waiting for mgmt response\n",
ndev->name);
/* TODO: we should reset the device here */
out:
finish_wait(&priv->mgmt_wqueue, &wait);
mutex_unlock(&priv->mgmt_lock);
return err;
}
@@ -1,126 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2002 Intersil Americas Inc.
* Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
*/
#ifndef _ISLPCI_MGT_H
#define _ISLPCI_MGT_H
#include <linux/wireless.h>
#include <linux/skbuff.h>
#include <linux/slab.h>
/*
* Function definitions
*/
#define K_DEBUG(f, m, args...) do { if(f & m) printk(KERN_DEBUG args); } while(0)
#define DEBUG(f, args...) K_DEBUG(f, pc_debug, args)
extern int pc_debug;
#define init_wds 0 /* help compiler optimize away dead code */
/* General driver definitions */
#define PCIDEVICE_LATENCY_TIMER_MIN 0x40
#define PCIDEVICE_LATENCY_TIMER_VAL 0x50
/* Debugging verbose definitions */
#define SHOW_NOTHING 0x00 /* overrules everything */
#define SHOW_ANYTHING 0xFF
#define SHOW_ERROR_MESSAGES 0x01
#define SHOW_TRAPS 0x02
#define SHOW_FUNCTION_CALLS 0x04
#define SHOW_TRACING 0x08
#define SHOW_QUEUE_INDEXES 0x10
#define SHOW_PIMFOR_FRAMES 0x20
#define SHOW_BUFFER_CONTENTS 0x40
#define VERBOSE 0x01
/* Default card definitions */
#define CARD_DEFAULT_CHANNEL 6
#define CARD_DEFAULT_MODE INL_MODE_CLIENT
#define CARD_DEFAULT_IW_MODE IW_MODE_INFRA
#define CARD_DEFAULT_BSSTYPE DOT11_BSSTYPE_INFRA
#define CARD_DEFAULT_CLIENT_SSID ""
#define CARD_DEFAULT_AP_SSID "default"
#define CARD_DEFAULT_KEY1 "default_key_1"
#define CARD_DEFAULT_KEY2 "default_key_2"
#define CARD_DEFAULT_KEY3 "default_key_3"
#define CARD_DEFAULT_KEY4 "default_key_4"
#define CARD_DEFAULT_WEP 0
#define CARD_DEFAULT_FILTER 0
#define CARD_DEFAULT_WDS 0
#define CARD_DEFAULT_AUTHEN DOT11_AUTH_OS
#define CARD_DEFAULT_DOT1X 0
#define CARD_DEFAULT_MLME_MODE DOT11_MLME_AUTO
#define CARD_DEFAULT_CONFORMANCE OID_INL_CONFORMANCE_NONE
#define CARD_DEFAULT_PROFILE DOT11_PROFILE_MIXED_G_WIFI
#define CARD_DEFAULT_MAXFRAMEBURST DOT11_MAXFRAMEBURST_MIXED_SAFE
/* PIMFOR package definitions */
#define PIMFOR_ETHERTYPE 0x8828
#define PIMFOR_HEADER_SIZE 12
#define PIMFOR_VERSION 1
#define PIMFOR_OP_GET 0
#define PIMFOR_OP_SET 1
#define PIMFOR_OP_RESPONSE 2
#define PIMFOR_OP_ERROR 3
#define PIMFOR_OP_TRAP 4
#define PIMFOR_OP_RESERVED 5 /* till 255 */
#define PIMFOR_DEV_ID_MHLI_MIB 0
#define PIMFOR_FLAG_APPLIC_ORIGIN 0x01
#define PIMFOR_FLAG_LITTLE_ENDIAN 0x02
void display_buffer(char *, int);
/*
* Type definition section
*
* the structure defines only the header allowing copyless
* frame handling
*/
typedef struct {
u8 version;
u8 operation;
u32 oid;
u8 device_id;
u8 flags;
u32 length;
} __packed
pimfor_header_t;
/* A received and interrupt-processed management frame, either for
* schedule_work(prism54_process_trap) or for priv->mgmt_received,
* processed by islpci_mgt_transaction(). */
struct islpci_mgmtframe {
struct net_device *ndev; /* pointer to network device */
pimfor_header_t *header; /* payload header, points into buf */
void *data; /* payload ex header, points into buf */
struct work_struct ws; /* argument for schedule_work() */
char buf[]; /* fragment buffer */
};
int
islpci_mgt_receive(struct net_device *ndev);
int
islpci_mgmt_rx_fill(struct net_device *ndev);
void
islpci_mgt_cleanup_transmit(struct net_device *ndev);
int
islpci_mgt_transaction(struct net_device *ndev,
int operation, unsigned long oid,
void *senddata, int sendlen,
struct islpci_mgmtframe **recvframe);
static inline void
islpci_mgt_release(struct islpci_mgmtframe *frame)
{
kfree(frame);
}
#endif /* _ISLPCI_MGT_H */
File diff suppressed because it is too large Load Diff
@@ -1,46 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2003 Aurelien Alleaume <slts@free.fr>
*/
#if !defined(_OID_MGT_H)
#define _OID_MGT_H
#include "isl_oid.h"
#include "islpci_dev.h"
extern struct oid_t isl_oid[];
int mgt_init(islpci_private *);
void mgt_clean(islpci_private *);
/* I don't know where to put these 2 */
extern const int frequency_list_a[];
int channel_of_freq(int);
void mgt_le_to_cpu(int, void *);
int mgt_set_request(islpci_private *, enum oid_num_t, int, void *);
int mgt_set_varlen(islpci_private *, enum oid_num_t, void *, int);
int mgt_get_request(islpci_private *, enum oid_num_t, int, void *,
union oid_res_t *);
int mgt_commit_list(islpci_private *, enum oid_num_t *, int);
void mgt_set(islpci_private *, enum oid_num_t, void *);
void mgt_get(islpci_private *, enum oid_num_t, void *);
int mgt_commit(islpci_private *);
int mgt_mlme_answer(islpci_private *);
enum oid_num_t mgt_oidtonum(u32 oid);
int mgt_response_to_str(enum oid_num_t, union oid_res_t *, char *);
#endif /* !defined(_OID_MGT_H) */
/* EOF */
@@ -1,30 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* (C) 2004 Margit Schubert-While <margitsw@t-online.de>
*/
/*
* Compatibility header file to aid support of different kernel versions
*/
#ifdef PRISM54_COMPAT24
#include "prismcompat24.h"
#else /* PRISM54_COMPAT24 */
#ifndef _PRISM_COMPAT_H
#define _PRISM_COMPAT_H
#include <linux/device.h>
#include <linux/firmware.h>
#include <linux/moduleparam.h>
#include <linux/workqueue.h>
#include <linux/compiler.h>
#ifndef __iomem
#define __iomem
#endif
#define PRISM_FW_PDEV &priv->pdev->dev
#endif /* _PRISM_COMPAT_H */
#endif /* PRISM54_COMPAT24 */