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pinctrl: Add pinctrl-aspeed-g5 driver

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A small subset of pins and functions are exposed. The selection of pins
and functions is driven by the development of OpenBMC[1] on the
AST2500 SoC, particularly around booting the IBM Witherspoon platform.

[1] https://github.com/openbmc/docs

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Andrew Jeffery
2016-08-30 17:24:26 +09:30
committed by Linus Walleij
parent 524594d401
commit 56e57cb6c0
3 changed files with 817 additions and 0 deletions
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8
drivers/pinctrl/aspeed/Kconfig
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@@ -14,3 +14,11 @@ config PINCTRL_ASPEED_G4
help
Say Y here to enable pin controller support for Aspeed's 4th
generation SoCs. GPIO is provided by a separate GPIO driver.
config PINCTRL_ASPEED_G5
bool "Aspeed G5 SoC pin control"
depends on (MACH_ASPEED_G5 || COMPILE_TEST) && OF
select PINCTRL_ASPEED
help
Say Y here to enable pin controller support for Aspeed's 5th
generation SoCs. GPIO is provided by a separate GPIO driver.

1
drivers/pinctrl/aspeed/Makefile
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@@ -3,3 +3,4 @@
ccflags-y += -Woverride-init
obj-$(CONFIG_PINCTRL_ASPEED) += pinctrl-aspeed.o
obj-$(CONFIG_PINCTRL_ASPEED_G4) += pinctrl-aspeed-g4.o
obj-$(CONFIG_PINCTRL_ASPEED_G5) += pinctrl-aspeed-g5.o

808
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c Normal file
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