mirror of
https://github.com/ukui/kernel.git
synced 2026-03-09 10:07:04 -07:00
Merge branch 'master'
This commit is contained in:
Jeff Garzik
@@ -59,11 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
|
||||
* fallback to the default.
|
||||
*/
|
||||
static inline void __iomem *
|
||||
__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned long align)
|
||||
__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags)
|
||||
{
|
||||
extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
|
||||
if((addr < 0x48000000) || (addr > 0x4fffffff))
|
||||
return __ioremap(addr, size, flags, align);
|
||||
return __ioremap(addr, size, flags);
|
||||
|
||||
return (void *)addr;
|
||||
}
|
||||
@@ -71,13 +70,11 @@ __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned
|
||||
static inline void
|
||||
__ixp4xx_iounmap(void __iomem *addr)
|
||||
{
|
||||
extern void __iounmap(void __iomem *addr);
|
||||
|
||||
if ((u32)addr >= VMALLOC_START)
|
||||
__iounmap(addr);
|
||||
}
|
||||
|
||||
#define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x)
|
||||
#define __arch_ioremap(a, s, f) __ixp4xx_ioremap(a, s, f)
|
||||
#define __arch_iounmap(a) __ixp4xx_iounmap(a)
|
||||
|
||||
#define writeb(v, p) __ixp4xx_writeb(v, p)
|
||||
|
||||
@@ -50,6 +50,11 @@
|
||||
#define UART011_ICR 0x44 /* Interrupt clear register. */
|
||||
#define UART011_DMACR 0x48 /* DMA control register. */
|
||||
|
||||
#define UART011_DR_OE (1 << 11)
|
||||
#define UART011_DR_BE (1 << 10)
|
||||
#define UART011_DR_PE (1 << 9)
|
||||
#define UART011_DR_FE (1 << 8)
|
||||
|
||||
#define UART01x_RSR_OE 0x08
|
||||
#define UART01x_RSR_BE 0x04
|
||||
#define UART01x_RSR_PE 0x02
|
||||
|
||||
@@ -54,6 +54,12 @@ extern void __raw_readsl(void __iomem *addr, void *data, int longlen);
|
||||
#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
|
||||
#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))
|
||||
|
||||
/*
|
||||
* Architecture ioremap implementation.
|
||||
*/
|
||||
extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
|
||||
extern void __iounmap(void __iomem *addr);
|
||||
|
||||
/*
|
||||
* Bad read/write accesses...
|
||||
*/
|
||||
@@ -256,18 +262,15 @@ out:
|
||||
* ioremap takes a PCI memory address, as specified in
|
||||
* Documentation/IO-mapping.txt.
|
||||
*/
|
||||
extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
|
||||
extern void __iounmap(void __iomem *addr);
|
||||
|
||||
#ifndef __arch_ioremap
|
||||
#define ioremap(cookie,size) __ioremap(cookie,size,0,1)
|
||||
#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0,1)
|
||||
#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE,1)
|
||||
#define ioremap(cookie,size) __ioremap(cookie,size,0)
|
||||
#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0)
|
||||
#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE)
|
||||
#define iounmap(cookie) __iounmap(cookie)
|
||||
#else
|
||||
#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0,1)
|
||||
#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0,1)
|
||||
#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1)
|
||||
#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0)
|
||||
#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0)
|
||||
#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE)
|
||||
#define iounmap(cookie) __arch_iounmap(cookie)
|
||||
#endif
|
||||
|
||||
|
||||
@@ -100,7 +100,6 @@ static inline void set_fs (mm_segment_t fs)
|
||||
extern int __get_user_1(void *);
|
||||
extern int __get_user_2(void *);
|
||||
extern int __get_user_4(void *);
|
||||
extern int __get_user_8(void *);
|
||||
extern int __get_user_bad(void);
|
||||
|
||||
#define __get_user_x(__r2,__p,__e,__s,__i...) \
|
||||
@@ -114,7 +113,7 @@ extern int __get_user_bad(void);
|
||||
#define get_user(x,p) \
|
||||
({ \
|
||||
const register typeof(*(p)) __user *__p asm("r0") = (p);\
|
||||
register typeof(*(p)) __r2 asm("r2"); \
|
||||
register unsigned int __r2 asm("r2"); \
|
||||
register int __e asm("r0"); \
|
||||
switch (sizeof(*(__p))) { \
|
||||
case 1: \
|
||||
@@ -126,12 +125,9 @@ extern int __get_user_bad(void);
|
||||
case 4: \
|
||||
__get_user_x(__r2, __p, __e, 4, "lr"); \
|
||||
break; \
|
||||
case 8: \
|
||||
__get_user_x(__r2, __p, __e, 8, "lr"); \
|
||||
break; \
|
||||
default: __e = __get_user_bad(); break; \
|
||||
} \
|
||||
x = __r2; \
|
||||
x = (typeof(*(p))) __r2; \
|
||||
__e; \
|
||||
})
|
||||
|
||||
|
||||
@@ -1,15 +1,22 @@
|
||||
/*
|
||||
* This is based on both include/asm-sh/dma-mapping.h and
|
||||
* include/asm-ppc/pci.h
|
||||
* Copyright (C) 2004 IBM
|
||||
*
|
||||
* Implements the generic device dma API for powerpc.
|
||||
* the pci and vio busses
|
||||
*/
|
||||
#ifndef __ASM_PPC_DMA_MAPPING_H
|
||||
#define __ASM_PPC_DMA_MAPPING_H
|
||||
#ifndef _ASM_DMA_MAPPING_H
|
||||
#define _ASM_DMA_MAPPING_H
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/cache.h>
|
||||
/* need struct page definitions */
|
||||
#include <linux/mm.h>
|
||||
#include <asm/scatterlist.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/bug.h>
|
||||
|
||||
#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
|
||||
|
||||
#ifdef CONFIG_NOT_COHERENT_CACHE
|
||||
/*
|
||||
@@ -24,22 +31,12 @@ extern void __dma_free_coherent(size_t size, void *vaddr);
|
||||
extern void __dma_sync(void *vaddr, size_t size, int direction);
|
||||
extern void __dma_sync_page(struct page *page, unsigned long offset,
|
||||
size_t size, int direction);
|
||||
#define dma_cache_inv(_start,_size) \
|
||||
invalidate_dcache_range(_start, (_start + _size))
|
||||
#define dma_cache_wback(_start,_size) \
|
||||
clean_dcache_range(_start, (_start + _size))
|
||||
#define dma_cache_wback_inv(_start,_size) \
|
||||
flush_dcache_range(_start, (_start + _size))
|
||||
|
||||
#else /* ! CONFIG_NOT_COHERENT_CACHE */
|
||||
/*
|
||||
* Cache coherent cores.
|
||||
*/
|
||||
|
||||
#define dma_cache_inv(_start,_size) do { } while (0)
|
||||
#define dma_cache_wback(_start,_size) do { } while (0)
|
||||
#define dma_cache_wback_inv(_start,_size) do { } while (0)
|
||||
|
||||
#define __dma_alloc_coherent(gfp, size, handle) NULL
|
||||
#define __dma_free_coherent(size, addr) do { } while (0)
|
||||
#define __dma_sync(addr, size, rw) do { } while (0)
|
||||
@@ -47,6 +44,30 @@ extern void __dma_sync_page(struct page *page, unsigned long offset,
|
||||
|
||||
#endif /* ! CONFIG_NOT_COHERENT_CACHE */
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
|
||||
extern int dma_supported(struct device *dev, u64 mask);
|
||||
extern int dma_set_mask(struct device *dev, u64 dma_mask);
|
||||
extern void *dma_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t flag);
|
||||
extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
|
||||
dma_addr_t dma_handle);
|
||||
extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
|
||||
size_t size, enum dma_data_direction direction);
|
||||
extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
|
||||
size_t size, enum dma_data_direction direction);
|
||||
extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction);
|
||||
extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
|
||||
size_t size, enum dma_data_direction direction);
|
||||
extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
|
||||
enum dma_data_direction direction);
|
||||
extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
|
||||
int nhwentries, enum dma_data_direction direction);
|
||||
|
||||
#else /* CONFIG_PPC64 */
|
||||
|
||||
#define dma_supported(dev, mask) (1)
|
||||
|
||||
static inline int dma_set_mask(struct device *dev, u64 dma_mask)
|
||||
@@ -144,29 +165,27 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
|
||||
/* We don't do anything here. */
|
||||
#define dma_unmap_sg(dev, sg, nents, dir) do { } while (0)
|
||||
|
||||
static inline void
|
||||
dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
|
||||
size_t size,
|
||||
enum dma_data_direction direction)
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
static inline void dma_sync_single_for_cpu(struct device *dev,
|
||||
dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
|
||||
__dma_sync(bus_to_virt(dma_handle), size, direction);
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
|
||||
size_t size,
|
||||
enum dma_data_direction direction)
|
||||
static inline void dma_sync_single_for_device(struct device *dev,
|
||||
dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
|
||||
__dma_sync(bus_to_virt(dma_handle), size, direction);
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
|
||||
enum dma_data_direction direction)
|
||||
static inline void dma_sync_sg_for_cpu(struct device *dev,
|
||||
struct scatterlist *sg, int nents,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
int i;
|
||||
|
||||
@@ -176,9 +195,9 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
|
||||
__dma_sync_page(sg->page, sg->offset, sg->length, direction);
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
|
||||
enum dma_data_direction direction)
|
||||
static inline void dma_sync_sg_for_device(struct device *dev,
|
||||
struct scatterlist *sg, int nents,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
int i;
|
||||
|
||||
@@ -188,6 +207,15 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
|
||||
__dma_sync_page(sg->page, sg->offset, sg->length, direction);
|
||||
}
|
||||
|
||||
static inline int dma_mapping_error(dma_addr_t dma_addr)
|
||||
{
|
||||
#ifdef CONFIG_PPC64
|
||||
return (dma_addr == DMA_ERROR_CODE);
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
|
||||
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
|
||||
#ifdef CONFIG_NOT_COHERENT_CACHE
|
||||
@@ -198,40 +226,60 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
|
||||
|
||||
static inline int dma_get_cache_alignment(void)
|
||||
{
|
||||
#ifdef CONFIG_PPC64
|
||||
/* no easy way to get cache size on all processors, so return
|
||||
* the maximum possible, to be safe */
|
||||
return (1 << L1_CACHE_SHIFT_MAX);
|
||||
#else
|
||||
/*
|
||||
* Each processor family will define its own L1_CACHE_SHIFT,
|
||||
* L1_CACHE_BYTES wraps to this, so this is always safe.
|
||||
*/
|
||||
return L1_CACHE_BYTES;
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
static inline void dma_sync_single_range_for_cpu(struct device *dev,
|
||||
dma_addr_t dma_handle, unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
/* just sync everything for now */
|
||||
dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
static inline void dma_sync_single_range_for_device(struct device *dev,
|
||||
dma_addr_t dma_handle, unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
/* just sync everything for now */
|
||||
dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
|
||||
}
|
||||
|
||||
static inline void dma_cache_sync(void *vaddr, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
__dma_sync(vaddr, size, (int)direction);
|
||||
}
|
||||
|
||||
static inline int dma_mapping_error(dma_addr_t dma_addr)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
/*
|
||||
* DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
|
||||
*/
|
||||
struct dma_mapping_ops {
|
||||
void * (*alloc_coherent)(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t flag);
|
||||
void (*free_coherent)(struct device *dev, size_t size,
|
||||
void *vaddr, dma_addr_t dma_handle);
|
||||
dma_addr_t (*map_single)(struct device *dev, void *ptr,
|
||||
size_t size, enum dma_data_direction direction);
|
||||
void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
|
||||
size_t size, enum dma_data_direction direction);
|
||||
int (*map_sg)(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction direction);
|
||||
void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction direction);
|
||||
int (*dma_supported)(struct device *dev, u64 mask);
|
||||
int (*dac_dma_supported)(struct device *dev, u64 mask);
|
||||
};
|
||||
|
||||
#endif /* __ASM_PPC_DMA_MAPPING_H */
|
||||
#endif /* _ASM_DMA_MAPPING_H */
|
||||
@@ -1,5 +1,5 @@
|
||||
#ifndef _PPC64_IO_H
|
||||
#define _PPC64_IO_H
|
||||
#ifndef _ASM_POWERPC_IO_H
|
||||
#define _ASM_POWERPC_IO_H
|
||||
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
@@ -8,7 +8,10 @@
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
#ifndef CONFIG_PPC64
|
||||
#include <asm-ppc/io.h>
|
||||
#else
|
||||
|
||||
#include <linux/compiler.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/byteorder.h>
|
||||
@@ -455,4 +458,5 @@ extern int check_legacy_ioport(unsigned long base_port);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _PPC64_IO_H */
|
||||
#endif /* CONFIG_PPC64 */
|
||||
#endif /* _ASM_POWERPC_IO_H */
|
||||
@@ -1,3 +1,10 @@
|
||||
#ifndef _ASM_POWERPC_MMU_H_
|
||||
#define _ASM_POWERPC_MMU_H_
|
||||
|
||||
#ifndef CONFIG_PPC64
|
||||
#include <asm-ppc/mmu.h>
|
||||
#else
|
||||
|
||||
/*
|
||||
* PowerPC memory management structures
|
||||
*
|
||||
@@ -10,10 +17,6 @@
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef _PPC64_MMU_H_
|
||||
#define _PPC64_MMU_H_
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <asm/asm-compat.h>
|
||||
#include <asm/page.h>
|
||||
|
||||
@@ -392,4 +395,5 @@ static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
|
||||
|
||||
#endif /* __ASSEMBLY */
|
||||
|
||||
#endif /* _PPC64_MMU_H_ */
|
||||
#endif /* CONFIG_PPC64 */
|
||||
#endif /* _ASM_POWERPC_MMU_H_ */
|
||||
@@ -1,7 +1,10 @@
|
||||
#ifndef __PPC64_MMU_CONTEXT_H
|
||||
#define __PPC64_MMU_CONTEXT_H
|
||||
#ifndef __ASM_POWERPC_MMU_CONTEXT_H
|
||||
#define __ASM_POWERPC_MMU_CONTEXT_H
|
||||
|
||||
#ifndef CONFIG_PPC64
|
||||
#include <asm-ppc/mmu_context.h>
|
||||
#else
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mm.h>
|
||||
#include <asm/mmu.h>
|
||||
@@ -82,4 +85,5 @@ static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
#endif /* __PPC64_MMU_CONTEXT_H */
|
||||
#endif /* CONFIG_PPC64 */
|
||||
#endif /* __ASM_POWERPC_MMU_CONTEXT_H */
|
||||
@@ -1,8 +1,10 @@
|
||||
#ifdef __KERNEL__
|
||||
#ifndef _ASM_PCI_BRIDGE_H
|
||||
#define _ASM_PCI_BRIDGE_H
|
||||
#ifndef _ASM_POWERPC_PCI_BRIDGE_H
|
||||
#define _ASM_POWERPC_PCI_BRIDGE_H
|
||||
|
||||
#ifndef CONFIG_PPC64
|
||||
#include <asm-ppc/pci-bridge.h>
|
||||
#else
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/list.h>
|
||||
|
||||
@@ -147,5 +149,5 @@ extern void pcibios_free_controller(struct pci_controller *phb);
|
||||
#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
|
||||
#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
|
||||
|
||||
#endif /* CONFIG_PPC64 */
|
||||
#endif
|
||||
#endif /* __KERNEL__ */
|
||||
@@ -1,5 +1,5 @@
|
||||
#ifndef __PPC64_PCI_H
|
||||
#define __PPC64_PCI_H
|
||||
#ifndef __ASM_POWERPC_PCI_H
|
||||
#define __ASM_POWERPC_PCI_H
|
||||
#ifdef __KERNEL__
|
||||
|
||||
/*
|
||||
@@ -18,6 +18,7 @@
|
||||
#include <asm/scatterlist.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
|
||||
#include <asm-generic/pci-dma-compat.h>
|
||||
|
||||
@@ -26,11 +27,21 @@
|
||||
|
||||
struct pci_dev;
|
||||
|
||||
#ifdef CONFIG_PPC_ISERIES
|
||||
/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
|
||||
#define IOBASE_BRIDGE_NUMBER 0
|
||||
#define IOBASE_MEMORY 1
|
||||
#define IOBASE_IO 2
|
||||
#define IOBASE_ISA_IO 3
|
||||
#define IOBASE_ISA_MEM 4
|
||||
|
||||
/*
|
||||
* Set this to 1 if you want the kernel to re-assign all PCI
|
||||
* bus numbers
|
||||
*/
|
||||
extern int pci_assign_all_buses;
|
||||
#define pcibios_assign_all_busses() (pci_assign_all_buses)
|
||||
|
||||
#define pcibios_scan_all_fns(a, b) 0
|
||||
#else
|
||||
extern int pcibios_scan_all_fns(struct pci_bus *bus, int devfn);
|
||||
#endif
|
||||
|
||||
static inline void pcibios_set_master(struct pci_dev *dev)
|
||||
{
|
||||
@@ -50,6 +61,7 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
|
||||
return channel ? 15 : 14;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
#define HAVE_ARCH_PCI_MWI 1
|
||||
static inline int pcibios_prep_mwi(struct pci_dev *dev)
|
||||
{
|
||||
@@ -64,12 +76,10 @@ static inline int pcibios_prep_mwi(struct pci_dev *dev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern unsigned int pcibios_assign_all_busses(void);
|
||||
|
||||
extern struct dma_mapping_ops pci_dma_ops;
|
||||
|
||||
/* For DAC DMA, we currently don't support it by default, but
|
||||
* we let the platform override this
|
||||
* we let 64-bit platforms override this.
|
||||
*/
|
||||
static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask)
|
||||
{
|
||||
@@ -102,6 +112,35 @@ extern int pci_domain_nr(struct pci_bus *bus);
|
||||
/* Decide whether to display the domain number in /proc */
|
||||
extern int pci_proc_domain(struct pci_bus *bus);
|
||||
|
||||
#else /* 32-bit */
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
static inline void pci_dma_burst_advice(struct pci_dev *pdev,
|
||||
enum pci_dma_burst_strategy *strat,
|
||||
unsigned long *strategy_parameter)
|
||||
{
|
||||
*strat = PCI_DMA_BURST_INFINITY;
|
||||
*strategy_parameter = ~0UL;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* At present there are very few 32-bit PPC machines that can have
|
||||
* memory above the 4GB point, and we don't support that.
|
||||
*/
|
||||
#define pci_dac_dma_supported(pci_dev, mask) (0)
|
||||
|
||||
/* Return the index of the PCI controller for device PDEV. */
|
||||
#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
|
||||
|
||||
/* Set the name of the bus as it appears in /proc/bus/pci */
|
||||
static inline int pci_proc_domain(struct pci_bus *bus)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
struct vm_area_struct;
|
||||
/* Map a range of PCI memory or I/O space for a device into user space */
|
||||
int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
|
||||
@@ -110,6 +149,7 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
|
||||
/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
|
||||
#define HAVE_PCI_MMAP 1
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
/* pci_unmap_{single,page} is not a nop, thus... */
|
||||
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
|
||||
dma_addr_t ADDR_NAME;
|
||||
@@ -124,22 +164,40 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
|
||||
#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
|
||||
(((PTR)->LEN_NAME) = (VAL))
|
||||
|
||||
/* The PCI address space does equal the physical memory
|
||||
* address space. The networking and block device layers use
|
||||
/* The PCI address space does not equal the physical memory address
|
||||
* space (we have an IOMMU). The IDE and SCSI device layers use
|
||||
* this boolean for bounce buffer decisions.
|
||||
*/
|
||||
#define PCI_DMA_BUS_IS_PHYS (0)
|
||||
|
||||
#else /* 32-bit */
|
||||
|
||||
/* The PCI address space does equal the physical memory
|
||||
* address space (no IOMMU). The IDE and SCSI device layers use
|
||||
* this boolean for bounce buffer decisions.
|
||||
*/
|
||||
#define PCI_DMA_BUS_IS_PHYS (1)
|
||||
|
||||
/* pci_unmap_{page,single} is a nop so... */
|
||||
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
|
||||
#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
|
||||
#define pci_unmap_addr(PTR, ADDR_NAME) (0)
|
||||
#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
|
||||
#define pci_unmap_len(PTR, LEN_NAME) (0)
|
||||
#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
|
||||
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
extern void
|
||||
pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
extern void pcibios_resource_to_bus(struct pci_dev *dev,
|
||||
struct pci_bus_region *region,
|
||||
struct resource *res);
|
||||
|
||||
extern void
|
||||
pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
extern void pcibios_bus_to_resource(struct pci_dev *dev,
|
||||
struct resource *res,
|
||||
struct pci_bus_region *region);
|
||||
|
||||
static inline struct resource *
|
||||
pcibios_select_root(struct pci_dev *pdev, struct resource *res)
|
||||
static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
|
||||
struct resource *res)
|
||||
{
|
||||
struct resource *root = NULL;
|
||||
|
||||
@@ -151,14 +209,12 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res)
|
||||
return root;
|
||||
}
|
||||
|
||||
extern int
|
||||
unmap_bus_range(struct pci_bus *bus);
|
||||
extern int unmap_bus_range(struct pci_bus *bus);
|
||||
|
||||
extern int
|
||||
remap_bus_range(struct pci_bus *bus);
|
||||
extern int remap_bus_range(struct pci_bus *bus);
|
||||
|
||||
extern void
|
||||
pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus);
|
||||
extern void pcibios_fixup_device_resources(struct pci_dev *dev,
|
||||
struct pci_bus *bus);
|
||||
|
||||
extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
|
||||
|
||||
@@ -180,14 +236,12 @@ extern pgprot_t pci_phys_mem_access_prot(struct file *file,
|
||||
unsigned long size,
|
||||
pgprot_t prot);
|
||||
|
||||
#ifdef CONFIG_PPC_MULTIPLATFORM
|
||||
#if defined(CONFIG_PPC_MULTIPLATFORM) || defined(CONFIG_PPC32)
|
||||
#define HAVE_ARCH_PCI_RESOURCE_TO_USER
|
||||
extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
|
||||
const struct resource *rsrc,
|
||||
u64 *start, u64 *end);
|
||||
#endif /* CONFIG_PPC_MULTIPLATFORM */
|
||||
|
||||
#endif /* CONFIG_PPC_MULTIPLATFORM || CONFIG_PPC32 */
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* __PPC64_PCI_H */
|
||||
#endif /* __ASM_POWERPC_PCI_H */
|
||||
@@ -1,5 +1,9 @@
|
||||
#ifndef _PPC64_PGALLOC_H
|
||||
#define _PPC64_PGALLOC_H
|
||||
#ifndef _ASM_POWERPC_PGALLOC_H
|
||||
#define _ASM_POWERPC_PGALLOC_H
|
||||
|
||||
#ifndef CONFIG_PPC64
|
||||
#include <asm-ppc/pgalloc.h>
|
||||
#else
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/slab.h>
|
||||
@@ -148,4 +152,5 @@ extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
|
||||
|
||||
#define check_pgt_cache() do { } while (0)
|
||||
|
||||
#endif /* _PPC64_PGALLOC_H */
|
||||
#endif /* CONFIG_PPC64 */
|
||||
#endif /* _ASM_POWERPC_PGALLOC_H */
|
||||
@@ -1,5 +1,9 @@
|
||||
#ifndef _PPC64_PGTABLE_H
|
||||
#define _PPC64_PGTABLE_H
|
||||
#ifndef _ASM_POWERPC_PGTABLE_H
|
||||
#define _ASM_POWERPC_PGTABLE_H
|
||||
|
||||
#ifndef CONFIG_PPC64
|
||||
#include <asm-ppc/pgtable.h>
|
||||
#else
|
||||
|
||||
/*
|
||||
* This file contains the functions and defines necessary to modify and use
|
||||
@@ -46,6 +50,13 @@ struct mm_struct;
|
||||
#define VMALLOC_SIZE (0x80000000000UL)
|
||||
#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
|
||||
|
||||
/*
|
||||
* Define the address range of the imalloc VM area.
|
||||
*/
|
||||
#define PHBS_IO_BASE VMALLOC_END
|
||||
#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
|
||||
#define IMALLOC_END (VMALLOC_START + PGTABLE_RANGE)
|
||||
|
||||
/*
|
||||
* Common bits in a linux-style PTE. These match the bits in the
|
||||
* (hardware-defined) PowerPC PTE as closely as possible. Additional
|
||||
@@ -69,7 +80,7 @@ struct mm_struct;
|
||||
|
||||
#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
|
||||
|
||||
/* __pgprot defined in asm-ppc64/page.h */
|
||||
/* __pgprot defined in asm-powerpc/page.h */
|
||||
#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
|
||||
|
||||
#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
|
||||
@@ -509,4 +520,5 @@ void pgtable_cache_init(void);
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* _PPC64_PGTABLE_H */
|
||||
#endif /* CONFIG_PPC64 */
|
||||
#endif /* _ASM_POWERPC_PGTABLE_H */
|
||||
@@ -48,8 +48,6 @@ extern void pSeries_final_fixup(void);
|
||||
extern void pSeries_irq_bus_setup(struct pci_bus *bus);
|
||||
|
||||
extern unsigned long pci_probe_only;
|
||||
extern unsigned long pci_assign_all_buses;
|
||||
extern int pci_read_irq_line(struct pci_dev *pci_dev);
|
||||
|
||||
/* ---- EEH internal-use-only related routines ---- */
|
||||
#ifdef CONFIG_EEH
|
||||
|
||||
@@ -18,31 +18,41 @@
|
||||
*
|
||||
* (the type definitions are in asm/spinlock_types.h)
|
||||
*/
|
||||
#include <linux/config.h>
|
||||
#ifdef CONFIG_PPC64
|
||||
#include <asm/paca.h>
|
||||
#include <asm/hvcall.h>
|
||||
#include <asm/iseries/hv_call.h>
|
||||
#endif
|
||||
#include <asm/asm-compat.h>
|
||||
#include <asm/synch.h>
|
||||
|
||||
#define __raw_spin_is_locked(x) ((x)->slock != 0)
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
/* use 0x800000yy when locked, where yy == CPU number */
|
||||
#define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token))
|
||||
#else
|
||||
#define LOCK_TOKEN 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This returns the old value in the lock, so we succeeded
|
||||
* in getting the lock if the return value is 0.
|
||||
*/
|
||||
static __inline__ unsigned long __spin_trylock(raw_spinlock_t *lock)
|
||||
{
|
||||
unsigned long tmp, tmp2;
|
||||
unsigned long tmp, token;
|
||||
|
||||
token = LOCK_TOKEN;
|
||||
__asm__ __volatile__(
|
||||
" lwz %1,%3(13) # __spin_trylock\n\
|
||||
1: lwarx %0,0,%2\n\
|
||||
"1: lwarx %0,0,%2 # __spin_trylock\n\
|
||||
cmpwi 0,%0,0\n\
|
||||
bne- 2f\n\
|
||||
stwcx. %1,0,%2\n\
|
||||
bne- 1b\n\
|
||||
isync\n\
|
||||
2:" : "=&r" (tmp), "=&r" (tmp2)
|
||||
: "r" (&lock->slock), "i" (offsetof(struct paca_struct, lock_token))
|
||||
2:" : "=&r" (tmp)
|
||||
: "r" (token), "r" (&lock->slock)
|
||||
: "cr0", "memory");
|
||||
|
||||
return tmp;
|
||||
@@ -113,11 +123,17 @@ static void __inline__ __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long
|
||||
|
||||
static __inline__ void __raw_spin_unlock(raw_spinlock_t *lock)
|
||||
{
|
||||
__asm__ __volatile__("lwsync # __raw_spin_unlock": : :"memory");
|
||||
__asm__ __volatile__(SYNC_ON_SMP" # __raw_spin_unlock"
|
||||
: : :"memory");
|
||||
lock->slock = 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
|
||||
#else
|
||||
#define __raw_spin_unlock_wait(lock) \
|
||||
do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Read-write spinlocks, allowing multiple readers
|
||||
@@ -133,6 +149,14 @@ extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
|
||||
#define __raw_read_can_lock(rw) ((rw)->lock >= 0)
|
||||
#define __raw_write_can_lock(rw) (!(rw)->lock)
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
#define __DO_SIGN_EXTEND "extsw %0,%0\n"
|
||||
#define WRLOCK_TOKEN LOCK_TOKEN /* it's negative */
|
||||
#else
|
||||
#define __DO_SIGN_EXTEND
|
||||
#define WRLOCK_TOKEN (-1)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This returns the old value in the lock + 1,
|
||||
* so we got a read lock if the return value is > 0.
|
||||
@@ -142,11 +166,12 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw)
|
||||
long tmp;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: lwarx %0,0,%1 # read_trylock\n\
|
||||
extsw %0,%0\n\
|
||||
addic. %0,%0,1\n\
|
||||
ble- 2f\n\
|
||||
stwcx. %0,0,%1\n\
|
||||
"1: lwarx %0,0,%1 # read_trylock\n"
|
||||
__DO_SIGN_EXTEND
|
||||
" addic. %0,%0,1\n\
|
||||
ble- 2f\n"
|
||||
PPC405_ERR77(0,%1)
|
||||
" stwcx. %0,0,%1\n\
|
||||
bne- 1b\n\
|
||||
isync\n\
|
||||
2:" : "=&r" (tmp)
|
||||
@@ -162,18 +187,19 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw)
|
||||
*/
|
||||
static __inline__ long __write_trylock(raw_rwlock_t *rw)
|
||||
{
|
||||
long tmp, tmp2;
|
||||
long tmp, token;
|
||||
|
||||
token = WRLOCK_TOKEN;
|
||||
__asm__ __volatile__(
|
||||
" lwz %1,%3(13) # write_trylock\n\
|
||||
1: lwarx %0,0,%2\n\
|
||||
"1: lwarx %0,0,%2 # write_trylock\n\
|
||||
cmpwi 0,%0,0\n\
|
||||
bne- 2f\n\
|
||||
stwcx. %1,0,%2\n\
|
||||
bne- 2f\n"
|
||||
PPC405_ERR77(0,%1)
|
||||
" stwcx. %1,0,%2\n\
|
||||
bne- 1b\n\
|
||||
isync\n\
|
||||
2:" : "=&r" (tmp), "=&r" (tmp2)
|
||||
: "r" (&rw->lock), "i" (offsetof(struct paca_struct, lock_token))
|
||||
2:" : "=&r" (tmp)
|
||||
: "r" (token), "r" (&rw->lock)
|
||||
: "cr0", "memory");
|
||||
|
||||
return tmp;
|
||||
@@ -224,8 +250,9 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw)
|
||||
__asm__ __volatile__(
|
||||
"eieio # read_unlock\n\
|
||||
1: lwarx %0,0,%1\n\
|
||||
addic %0,%0,-1\n\
|
||||
stwcx. %0,0,%1\n\
|
||||
addic %0,%0,-1\n"
|
||||
PPC405_ERR77(0,%1)
|
||||
" stwcx. %0,0,%1\n\
|
||||
bne- 1b"
|
||||
: "=&r"(tmp)
|
||||
: "r"(&rw->lock)
|
||||
@@ -234,7 +261,8 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw)
|
||||
|
||||
static __inline__ void __raw_write_unlock(raw_rwlock_t *rw)
|
||||
{
|
||||
__asm__ __volatile__("lwsync # write_unlock": : :"memory");
|
||||
__asm__ __volatile__(SYNC_ON_SMP" # write_unlock"
|
||||
: : :"memory");
|
||||
rw->lock = 0;
|
||||
}
|
||||
|
||||
@@ -545,6 +545,23 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
|
||||
#include <asm/mpc8260_pci9.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_NOT_COHERENT_CACHE
|
||||
|
||||
#define dma_cache_inv(_start,_size) \
|
||||
invalidate_dcache_range(_start, (_start + _size))
|
||||
#define dma_cache_wback(_start,_size) \
|
||||
clean_dcache_range(_start, (_start + _size))
|
||||
#define dma_cache_wback_inv(_start,_size) \
|
||||
flush_dcache_range(_start, (_start + _size))
|
||||
|
||||
#else
|
||||
|
||||
#define dma_cache_inv(_start,_size) do { } while (0)
|
||||
#define dma_cache_wback(_start,_size) do { } while (0)
|
||||
#define dma_cache_wback_inv(_start,_size) do { } while (0)
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
|
||||
* access
|
||||
|
||||
@@ -1,136 +0,0 @@
|
||||
/* Copyright (C) 2004 IBM
|
||||
*
|
||||
* Implements the generic device dma API for ppc64. Handles
|
||||
* the pci and vio busses
|
||||
*/
|
||||
|
||||
#ifndef _ASM_DMA_MAPPING_H
|
||||
#define _ASM_DMA_MAPPING_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/cache.h>
|
||||
/* need struct page definitions */
|
||||
#include <linux/mm.h>
|
||||
#include <asm/scatterlist.h>
|
||||
#include <asm/bug.h>
|
||||
|
||||
#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
|
||||
|
||||
extern int dma_supported(struct device *dev, u64 mask);
|
||||
extern int dma_set_mask(struct device *dev, u64 dma_mask);
|
||||
extern void *dma_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t flag);
|
||||
extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
|
||||
dma_addr_t dma_handle);
|
||||
extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
|
||||
size_t size, enum dma_data_direction direction);
|
||||
extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
|
||||
size_t size, enum dma_data_direction direction);
|
||||
extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction);
|
||||
extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
|
||||
size_t size, enum dma_data_direction direction);
|
||||
extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
|
||||
enum dma_data_direction direction);
|
||||
extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
|
||||
int nhwentries, enum dma_data_direction direction);
|
||||
|
||||
static inline void
|
||||
dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
/* nothing to do */
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
/* nothing to do */
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
/* nothing to do */
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
/* nothing to do */
|
||||
}
|
||||
|
||||
static inline int dma_mapping_error(dma_addr_t dma_addr)
|
||||
{
|
||||
return (dma_addr == DMA_ERROR_CODE);
|
||||
}
|
||||
|
||||
/* Now for the API extensions over the pci_ one */
|
||||
|
||||
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
|
||||
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
|
||||
#define dma_is_consistent(d) (1)
|
||||
|
||||
static inline int
|
||||
dma_get_cache_alignment(void)
|
||||
{
|
||||
/* no easy way to get cache size on all processors, so return
|
||||
* the maximum possible, to be safe */
|
||||
return (1 << L1_CACHE_SHIFT_MAX);
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
/* nothing to do */
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
/* nothing to do */
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_cache_sync(void *vaddr, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
/* nothing to do */
|
||||
}
|
||||
|
||||
/*
|
||||
* DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
|
||||
*/
|
||||
struct dma_mapping_ops {
|
||||
void * (*alloc_coherent)(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t flag);
|
||||
void (*free_coherent)(struct device *dev, size_t size,
|
||||
void *vaddr, dma_addr_t dma_handle);
|
||||
dma_addr_t (*map_single)(struct device *dev, void *ptr,
|
||||
size_t size, enum dma_data_direction direction);
|
||||
void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
|
||||
size_t size, enum dma_data_direction direction);
|
||||
int (*map_sg)(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction direction);
|
||||
void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction direction);
|
||||
int (*dma_supported)(struct device *dev, u64 mask);
|
||||
int (*dac_dma_supported)(struct device *dev, u64 mask);
|
||||
};
|
||||
|
||||
#endif /* _ASM_DMA_MAPPING_H */
|
||||
@@ -1,26 +0,0 @@
|
||||
#ifndef _PPC64_IMALLOC_H
|
||||
#define _PPC64_IMALLOC_H
|
||||
|
||||
/*
|
||||
* Define the address range of the imalloc VM area.
|
||||
*/
|
||||
#define PHBS_IO_BASE VMALLOC_END
|
||||
#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
|
||||
#define IMALLOC_END (VMALLOC_START + PGTABLE_RANGE)
|
||||
|
||||
|
||||
/* imalloc region types */
|
||||
#define IM_REGION_UNUSED 0x1
|
||||
#define IM_REGION_SUBSET 0x2
|
||||
#define IM_REGION_EXISTS 0x4
|
||||
#define IM_REGION_OVERLAP 0x8
|
||||
#define IM_REGION_SUPERSET 0x10
|
||||
|
||||
extern struct vm_struct * im_get_free_area(unsigned long size);
|
||||
extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size,
|
||||
int region_type);
|
||||
extern void im_free(void *addr);
|
||||
|
||||
extern unsigned long ioremap_bot;
|
||||
|
||||
#endif /* _PPC64_IMALLOC_H */
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user