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clocksource/drivers: Rename CLOCKSOURCE_OF_DECLARE to TIMER_OF_DECLARE
The CLOCKSOURCE_OF_DECLARE macro is used widely for the timers to declare the clocksource at early stage. However, this macro is also used to initialize the clockevent if any, or the clockevent only. It was originally suggested to declare another macro to initialize a clockevent, so in order to separate the two entities even they belong to the same IP. This was not accepted because of the impact on the DT where splitting a clocksource/clockevent definition does not make sense as it is a Linux concept not a hardware description. On the other side, the clocksource has not interrupt declared while the clockevent has, so it is easy from the driver to know if the description is for a clockevent or a clocksource, IOW it could be implemented at the driver level. So instead of dealing with a named clocksource macro, let's use a more generic one: TIMER_OF_DECLARE. The patch has not functional changes. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
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@@ -403,7 +403,7 @@ out:
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WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
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return err;
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}
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CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
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CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
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CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
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TIMER_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
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TIMER_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
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TIMER_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
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#endif
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@@ -333,5 +333,5 @@ static int __init xilinx_timer_init(struct device_node *timer)
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return 0;
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}
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CLOCKSOURCE_OF_DECLARE(xilinx_timer, "xlnx,xps-timer-1.00.a",
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TIMER_OF_DECLARE(xilinx_timer, "xlnx,xps-timer-1.00.a",
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xilinx_timer_init);
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@@ -152,4 +152,4 @@ static int __init ralink_systick_init(struct device_node *np)
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return 0;
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}
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CLOCKSOURCE_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init);
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TIMER_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init);
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@@ -353,4 +353,4 @@ void __init time_init(void)
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clocksource_probe();
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}
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CLOCKSOURCE_OF_DECLARE(nios2_timer, ALTR_TIMER_COMPATIBLE, nios2_time_init);
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TIMER_OF_DECLARE(nios2_timer, ALTR_TIMER_COMPATIBLE, nios2_time_init);
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@@ -99,7 +99,7 @@ static int __init arc_cs_setup_gfrc(struct device_node *node)
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return clocksource_register_hz(&arc_counter_gfrc, arc_timer_freq);
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}
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CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
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TIMER_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
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#define AUX_RTC_CTRL 0x103
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#define AUX_RTC_LOW 0x104
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@@ -158,7 +158,7 @@ static int __init arc_cs_setup_rtc(struct device_node *node)
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return clocksource_register_hz(&arc_counter_rtc, arc_timer_freq);
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}
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CLOCKSOURCE_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc);
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TIMER_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc);
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#endif
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@@ -333,4 +333,4 @@ static int __init arc_of_timer_init(struct device_node *np)
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return ret;
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}
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CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init);
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TIMER_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init);
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@@ -1194,8 +1194,8 @@ static int __init arch_timer_of_init(struct device_node *np)
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return arch_timer_common_init();
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}
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CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
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CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
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TIMER_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
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TIMER_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
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static u32 __init
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arch_timer_mem_frame_get_cntfrq(struct arch_timer_mem_frame *frame)
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@@ -1382,7 +1382,7 @@ out:
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kfree(timer_mem);
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return ret;
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}
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CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
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TIMER_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
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arch_timer_mem_of_init);
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#ifdef CONFIG_ACPI_GTDT
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@@ -339,5 +339,5 @@ out_unmap:
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}
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/* Only tested on r2p2 and r3p0 */
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CLOCKSOURCE_OF_DECLARE(arm_gt, "arm,cortex-a9-global-timer",
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TIMER_OF_DECLARE(arm_gt, "arm,cortex-a9-global-timer",
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global_timer_of_register);
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@@ -82,5 +82,5 @@ out_unmap:
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return ret;
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}
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CLOCKSOURCE_OF_DECLARE(arm_systick, "arm,armv7m-systick",
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TIMER_OF_DECLARE(arm_systick, "arm,armv7m-systick",
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system_timer_of_register);
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@@ -238,5 +238,5 @@ static int __init asm9260_timer_init(struct device_node *np)
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return 0;
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}
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CLOCKSOURCE_OF_DECLARE(asm9260_timer, "alphascale,asm9260-timer",
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TIMER_OF_DECLARE(asm9260_timer, "alphascale,asm9260-timer",
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asm9260_timer_init);
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@@ -148,5 +148,5 @@ err_iounmap:
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iounmap(base);
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return ret;
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}
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CLOCKSOURCE_OF_DECLARE(bcm2835, "brcm,bcm2835-system-timer",
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TIMER_OF_DECLARE(bcm2835, "brcm,bcm2835-system-timer",
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bcm2835_timer_init);
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@@ -198,9 +198,9 @@ static int __init kona_timer_init(struct device_node *node)
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return 0;
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}
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CLOCKSOURCE_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
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TIMER_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
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/*
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* bcm,kona-timer is deprecated by brcm,kona-timer
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* being kept here for driver compatibility
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*/
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CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);
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TIMER_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);
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@@ -539,4 +539,4 @@ static int __init ttc_timer_init(struct device_node *timer)
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return 0;
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}
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CLOCKSOURCE_OF_DECLARE(ttc, "cdns,ttc", ttc_timer_init);
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TIMER_OF_DECLARE(ttc, "cdns,ttc", ttc_timer_init);
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@@ -86,5 +86,5 @@ static int __init clksrc_dbx500_prcmu_init(struct device_node *node)
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#endif
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return clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K);
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}
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CLOCKSOURCE_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4",
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TIMER_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4",
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clksrc_dbx500_prcmu_init);
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@@ -132,4 +132,4 @@ static int __init st_clksrc_of_register(struct device_node *np)
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return ret;
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}
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CLOCKSOURCE_OF_DECLARE(ddata, "st,stih407-lpc", st_clksrc_of_register);
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TIMER_OF_DECLARE(ddata, "st,stih407-lpc", st_clksrc_of_register);
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@@ -119,5 +119,5 @@ static int __init clps711x_timer_init(struct device_node *np)
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return -EINVAL;
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}
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}
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CLOCKSOURCE_OF_DECLARE(clps711x, "cirrus,ep7209-timer", clps711x_timer_init);
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TIMER_OF_DECLARE(clps711x, "cirrus,ep7209-timer", clps711x_timer_init);
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#endif
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@@ -167,7 +167,7 @@ static int __init dw_apb_timer_init(struct device_node *timer)
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return 0;
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}
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CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
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CLOCKSOURCE_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init);
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CLOCKSOURCE_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init);
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CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);
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TIMER_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
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TIMER_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init);
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TIMER_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init);
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TIMER_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);
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@@ -610,5 +610,5 @@ static int __init mct_init_ppi(struct device_node *np)
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{
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return mct_init_dt(np, MCT_INT_PPI);
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}
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CLOCKSOURCE_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init_spi);
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CLOCKSOURCE_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init_ppi);
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TIMER_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init_spi);
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TIMER_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init_ppi);
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@@ -369,4 +369,4 @@ err:
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kfree(priv);
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return ret;
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}
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CLOCKSOURCE_OF_DECLARE(flextimer, "fsl,ftm-timer", ftm_timer_init);
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TIMER_OF_DECLARE(flextimer, "fsl,ftm-timer", ftm_timer_init);
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@@ -187,5 +187,5 @@ free_clk:
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return ret;
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}
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CLOCKSOURCE_OF_DECLARE(h8300_16bit, "renesas,16bit-timer",
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TIMER_OF_DECLARE(h8300_16bit, "renesas,16bit-timer",
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h8300_16timer_init);
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@@ -207,4 +207,4 @@ free_clk:
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return ret;
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}
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CLOCKSOURCE_OF_DECLARE(h8300_8bit, "renesas,8bit-timer", h8300_8timer_init);
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TIMER_OF_DECLARE(h8300_8bit, "renesas,8bit-timer", h8300_8timer_init);
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