Commit Graph

364 Commits

Author SHA1 Message Date
jason-jh.lin 85dfdbfc13 mailbox: cmdq: add multi-gce clocks support for mt8195
For the design of GCE hardware event signal transportation,
evnet rx will send the event signal to all GCE event merges
after receiving the event signal from the other hardware.

Because GCE event merges need to response to event rx, their
clocks must be enabled at that time.

To make sure all the gce clock is enabled while receiving the
hardware event, each cmdq mailbox should enable or disable
the others gce clk at the same time.

Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-31 22:57:45 -05:00
jason-jh.lin 8d4f5a9e01 mailbox: cmdq: add mediatek mailbox support for mt8195
Add mt8195 compatible name in the driver data of cmdq mailbox driver.

Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-31 22:57:39 -05:00
Vladimir Lypak e5c11ee310 mailbox: qcom-apcs-ipc: Add compatible for MSM8953 SoC
MSM8953 has an APCS block similar to MSM8916 but with different clocks
which are spread over 2MB IO region next to it.

Signed-off-by: Vladimir Lypak <junak.pub@gmail.com>
Signed-off-by: Sireesh Kodali <sireeshkodali@protonmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-30 00:29:29 -05:00
Iskren Chernev dc2b8edfa3 mailbox: qcom: Add support for SM6115 APCS IPC
Qcom SM4250/6115, have APCS mailbox setup similar to msm8998 and
msm8916.

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-30 00:28:34 -05:00
Yongqiang Niu 8b60ed2b16 soc: mediatek: cmdq: add address shift in jump
Add address shift when compose jump instruction
to compatible with 35bit format.

Fixes: 0858fde496 ("mailbox: cmdq: variablize address shift in platform")
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-30 00:21:38 -05:00
Yongqiang Niu 84fd4201b7 mailbox: cmdq: add mt8192 support
add mt8192 support

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-30 00:20:36 -05:00
Amit Pundir 8d7e5908c0 mailbox: qcom-ipcc: Enable loading QCOM_IPCC as a module
This patch enables the qcom_ipcc driver to be loaded as a
module. IPCC is fairly core to system, so as such it should
never be unloaded. It registers as a mailbox + irq controller
and the irq controller drivers in kernel are not supposed to
be unloaded as they don't have the visibility over the clients
consuming the irqs. Hence adding supress_bind_attrs to disable
bind/unbind via sysfs.

Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-29 23:50:15 -05:00
Randy Dunlap 23e6a7ca46 mailbox: sti: quieten kernel-doc warnings
Use kernel-doc struct notation for the mailbox structs to prevent
these kernel-doc warnings:

   drivers/mailbox/mailbox-sti.c:39: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * STi Mailbox device data
   drivers/mailbox/mailbox-sti.c:63: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * STi Mailbox platform specific configuration
   drivers/mailbox/mailbox-sti.c:74: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * STi Mailbox allocated channel information

Also move the field descriptions ahead of the function description as
is expected in kernel-doc. This prevents another kernel-doc warning.

Fixes: 9ef4546cbd ("mailbox: Add support for ST's Mailbox IP")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot <lkp@intel.com>
Cc: Aditya Srivastava <yashsri421@gmail.com>
Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-29 23:50:12 -05:00
Conor Dooley 83d7b15608 mbox: add polarfire soc system controller mailbox
This driver adds support for the single mailbox channel of the MSS
system controller on the Microchip PolarFire SoC.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 12:06:48 -05:00
Nathan Chancellor e80a7e7eaf mailbox: imx: Avoid using val uninitialized in imx_mu_isr()
Clang warns:

drivers/mailbox/imx-mailbox.c:284:2: warning: variable 'val' is used
uninitialized whenever switch default is taken
[-Wsometimes-uninitialized]
        default:
        ^~~~~~~
drivers/mailbox/imx-mailbox.c:288:7: note: uninitialized use occurs here
        if (!val)
             ^~~
drivers/mailbox/imx-mailbox.c:263:9: note: initialize the variable 'val'
to silence this warning
        u32 val, ctrl;
               ^
                = 0
1 warning generated.

Prior to commit 91c8c1fbe498 ("mailbox: imx: add xSR/xCR register
array"), val was always initialized in imx_mu_isr() but now, it is not
initialized in the default case. Return IRQ_NONE like the statement
below does and add a message that there is an unhandled type for this
switch statement so that it can be updated.

Fixes: 91c8c1fbe498 ("mailbox: imx: add xSR/xCR register array")
Link: https://github.com/ClangBuiltLinux/linux/issues/1404
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 12:06:18 -05:00
Shawn Guo 8a7cdb108d mailbox: qcom: Add MSM8939 APCS support
Enable MSM8939 APCS support by adding the compatible.  It reuses
msm8916_apcs_data.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 12:05:28 -05:00
Shawn Guo 96e39e95c0 mailbox: qcom: Use PLATFORM_DEVID_AUTO to register platform device
In adding APCS clock support for MSM8939, the second clock registration
fails due to duplicate device name like below.

[    0.519657] sysfs: cannot create duplicate filename '/bus/platform/devices/qcom-apcs-msm8916-clk'
...
[    0.661158] qcom_apcs_ipc b111000.mailbox: failed to register APCS clk

This is because MSM8939 has 3 APCS instances for Cluster0 (little cores),
Cluster1 (big cores) and CCI (Cache Coherent Interconnect).  Although
only APCS of Cluster0 and Cluster1 have IPC bits, each of 3 APCS has
A53PLL clock control bits.  That said, 3 'qcom-apcs-msm8916-clk' devices
need to be registered to instantiate all 3 clocks.  Use PLATFORM_DEVID_AUTO
rather than PLATFORM_DEVID_NONE for platform_device_register_data() call
to fix the issue above.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 12:05:21 -05:00
Martin Botka 72648436b5 mailbox: qcom-apcs: Add SM6125 compatible
This commit adds compatible for the SM6125 SoC

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 11:55:52 -05:00
Dan Carpenter cc3eb51814 mailbox: mtk-cmdq: Fix uninitialized variable in cmdq_mbox_flush()
The "cb" pointer needs to be initialized before can assign
"data.data = cb->data;".

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 11:41:47 -05:00
Zhihao Cheng c0d580cefa mailbox: bcm-flexrm-mailbox: Remove redundant dev_err call in flexrm_mbox_probe()
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhihao Cheng <chengzhihao1@huawei.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 11:40:34 -05:00
Zhihao Cheng 01c59166b4 mailbox: bcm2835: Remove redundant dev_err call in bcm2835_mbox_probe()
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhihao Cheng <chengzhihao1@huawei.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 11:40:32 -05:00
Sibi Sankar d6fbfdbc12 mailbox: qcom-ipcc: Fix IPCC mbox channel exhaustion
Fix IPCC (Inter-Processor Communication Controller) channel exhaustion by
setting the channel private data to NULL on mbox shutdown.

Err Logs:
remoteproc: MBA booted without debug policy, loading mpss
remoteproc: glink-edge: failed to acquire IPC channel
remoteproc: failed to probe subdevices for remoteproc: -16

Fixes: fa74a0257f ("mailbox: Add support for Qualcomm IPCC")
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Cc: stable@vger.kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 11:40:29 -05:00
Chun-Kuang Hu 8ebc3b5aa4 mailbox: mtk-cmdq: Add struct cmdq_pkt in struct cmdq_cb_data
Current client use 'struct cmdq_pkt' as callback data, so
change 'void *data' to 'struct cmdq_pkt *pkt'. Keep data
until client use pkt instead of data.

Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 11:40:20 -05:00
Chun-Kuang Hu 1b6b0ce224 mailbox: mtk-cmdq: Use mailbox rx_callback
rx_callback is a standard mailbox callback mechanism and could cover the
function of proprietary cmdq_task_cb, so use the standard one instead of
the proprietary one. But the client driver has already used cmdq_task_cb,
so keep cmdq_task_cb until all client driver use rx_callback instead of
cmdq_task_cb.

Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 11:40:07 -05:00
Chun-Kuang Hu b3c0d72b09 mailbox: mtk-cmdq: Remove cmdq_cb_status
cmdq_cb_status is an error status. Use the standard error number
instead of cmdq_cb_status to prevent status duplication.

Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 11:39:54 -05:00
Peng Fan 4f0b776ef5 mailbox: imx-mailbox: support i.MX8ULP MU
i.MX8ULP MU has different register layout and bit layout compared
with i.MX6SX/7ULP/8.

So add enum imx_mu_type to show it is IMX_MU_V2 or IMX_MU_V1.

For IMX_MU_V2 mu hardware, check it when calculating bit offset to get
the correct offset.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 11:39:53 -05:00
Peng Fan f689a7cf75 mailbox: imx: add xSR/xCR register array
We are going to add a new platform which has 4 status registers(SR, TSR,
RSR, GSR) and 4 control registers(CR, TCR, RCR, GCR), so extend xSR
and xCR to register array and adapt code to use it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 11:39:51 -05:00
Peng Fan 32f7443d41 mailbox: imx: replace the xTR/xRR array with single register
The xTR/xRR registers are using 4 bytes stride and continuous.
Considering we will support more TR and RR registers, use base + idx * 4
method to calculate register address, not hardcoding in driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 11:39:48 -05:00
Hao Fang c7701684ee mailbox: hisilicon: Use the correct HiSilicon copyright
s/Hisilicon/HiSilicon/.
It should use capital S, according to
https://www.hisilicon.com/en.

Signed-off-by: Hao Fang <fanghao11@huawei.com>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 11:38:02 -05:00
Zhen Lei ff16cae3a3 mailbox: mediatek: Remove redundant error printing in cmdq_probe()
When devm_ioremap_resource() fails, a clear enough error message will be
printed by its subfunction __devm_ioremap_resource(). The error
information contains the device name, failure cause, and possibly resource
information.

Therefore, remove the error printing here to simplify code and reduce the
binary size.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26 11:37:51 -05:00