Commit Graph
42 Commits
Author SHA1 Message Date
Stephen Warren abf80c276d ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi
No Tegra30 Platform is running PLL_P at another rate than 408MHz, nor is
any using any other PLL as UART source clock. Move attribute into SoC
level dtsi file to slim down board DT files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:09 -07:00
Laxman Dewangan 699ed4b94c ARM: tegra: add DT entry for KBC controller
NVIDIA's Tegra SoCs have the matrix keyboard controller which
supports 16x8 type of matrix. The number of rows and columns
are configurable.

Add DT entry for KBC controller.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: added clocks property]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:08 -07:00
Stephen Warren bb2c1de9ff ARM: tegra: swap cache-/interrupt-ctrlr nodes in DT
This ensures nodes are sorted in order of reg address. This makes it
easier to compare against e.g. the U-Boot device trees, and is simply
consistent and clean.

While we're at it, remove the unit address from the cache-controller
node name, since it's unique without it.

Reported-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:08 -07:00
Laxman Dewangan b6551bb933 ARM: tegra: dts: add aliases and DMA requestor for serial controller
Add APB DMA requestor and serial aliases for serial controller.
There will be two serial driver i.e. 8250 based simple serial driver
and APB DMA based serial driver for higher baudrate and performace.

The simple serial driver get enabled with compatible nvidia,tegra20-uart
and APB DMA based driver will get enabled with compatible
nvidia,tegra20-hsuart.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:06 -07:00
Laxman Dewangan 35f210eca0 ARM: tegra30: tegra30 gpio is not compatible with tegra20 gpio
tegra30 gpio controller is not compatible with the tegra20 due to
their bank stride i.e. Tegra20 bank stride is 0x80 where Tegra30
bank stride is 0x100.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: fixed typo syntax error]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:06 -07:00
Stephen Warren ee05948517 Merge branch 'for-3.9/scu-base-rework' into for-3.9/soc-t114
Conflicts:
	arch/arm/mach-tegra/platsmp.c
2013-01-28 11:22:46 -07:00
Prashant Gaikwad 1cbc733d1e ARM: tegra: add clock properties to Tegra30 DT
Add clock information to device nodes.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: added second clock to 3d node]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:33 -07:00
Prashant Gaikwad 9598566721 ARM: tegra: define Tegra30 CAR binding
The device tree binding models Tegra30 CAR (Clock And Reset)
as a single monolithic clock provider.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: fixed typo in binding doc]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:07 -07:00
Hiroshi Doyu 7d19a34a89 ARM: tegra: Add CPU nodes to Tegra30 device tree
Add CPU node for Tegra30.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:40:49 -07:00
Linus Torvalds b8edf848e9 Merge tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC multiplatform conversion patches from Olof Johansson:
 "Here are more patches in the progression towards multiplatform, sparse
  irq conversions in particular.

  Tegra has a handful of cleanups and general groundwork, but is not
  quite there yet on full enablement.

  Platforms that are enabled through this branch are VT8500 and Zynq.
  Note that i.MX was converted in one of the earlier cleanup branches as
  well (before we started a separate topic for multiplatform).  And both
  new platforms for this merge window, sunxi and bcm, were merged with
  multiplatform support enabled."

Fix up conflicts mostly as per Olof.

* tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits)
  ARM: zynq: Remove all unused mach headers
  ARM: zynq: add support for ARCH_MULTIPLATFORM
  ARM: zynq: make use of debug_ll_io_init()
  ARM: zynq: remove TTC early mapping
  ARM: tegra: move debug-macro.S to include/debug
  ARM: tegra: don't include iomap.h from debug-macro.S
  ARM: tegra: decouple uncompress.h and debug-macro.S
  ARM: tegra: simplify DEBUG_LL UART selection options
  ARM: tegra: select SPARSE_IRQ
  ARM: tegra: enhance timer.c to get IO address from device tree
  ARM: tegra: enhance timer.c to get IRQ info from device tree
  ARM: timer: fix checkpatch warnings
  ARM: tegra: add TWD to device tree
  ARM: tegra: define DT bindings for and instantiate RTC
  ARM: tegra: define DT bindings for and instantiate timer
  clocksource/mtu-nomadik: use apb_pclk
  clk: ux500: Register mtu apb_pclocks
  ARM: plat-nomadik: convert platforms to SPARSE_IRQ
  mfd/db8500-prcmu: use the irq_domain_add_simple()
  mfd/ab8500-core: use irq_domain_add_simple()
  ...
2012-12-13 10:57:16 -08:00
Olof Johansson 0dfeada909 Merge tag 'orion_dt_for_3.8' of git://git.infradead.org/users/jcooper/linux into next/dt
From Jason Cooper:
orion dt for v3.8

 - ehci-orion dt binding
 - gpio-poweroff
 - use dt regulators
 - move mpp to DT/pinctrl

Depends on:

 - orion/boards

    - merge conflicts
       - keep all 'select's in Kconfig
       - remove all #includes in board-*.c

 - pinctrl/devel up to:

    - 06763c7 pinctrl: mvebu: move to its own directory

* tag 'orion_dt_for_3.8' of git://git.infradead.org/users/jcooper/linux: (211 commits)
  ARM: Kirkwood: remove kirkwood_ehci_init() from new boards
  ARM: Kirkwood: Add support LED of OpenBlocks A6
  ARM: Kirkwood: Convert to EHCI via DT for OpenBlocks A6
  ARM: kirkwood: Add NAND partiton map for OpenBlocks A6
  ARM: kirkwood: Add support second I2C bus and RTC on OpenBlocks A6
  ARM: kirkwood: Add support DT of second I2C bus
  ARM: kirkwood: Convert mplcec4 board to pinctrl
  ARM: Kirkwood: Convert km_kirkwood to pinctrl
  ARM: Kirkwood: support 98DX412x kirkwoods with pinctrl
  ARM: Kirkwood: Convert IX2-200 to pinctrl.
  ARM: Kirkwood: Convert lsxl boards to pinctrl.
  ARM: Kirkwood: Convert ib62x0 to pinctrl.
  ARM: Kirkwood: Convert GoFlex Net to pinctrl.
  ARM: Kirkwood: Convert dreamplug to pinctrl.
  ARM: Kirkwood: Convert dockstar to pinctrl.
  ARM: Kirkwood: Convert dnskw to pinctrl
  ARM: Kirkwood: Convert iConnect to pinctrl.
  ARM: Kirkwood: Convert TS219 to pinctrl.
  ARM: Kirkwood: Add DTSI files for pinctrl
  ARM: Kirkwood: Make use of mvebu pincltl and gpio drivers
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-26 01:09:53 -08:00
Stephen Warren 73368ba0e1 ARM: tegra: add TWD to device tree
This will allow timer.c to use twd_local_timer_of_register(), and
hence not need to hard-code the TWD address or IRQ.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16 12:22:16 -07:00
Stephen Warren 380e04ac2c ARM: tegra: define DT bindings for and instantiate RTC
The Tegra RTC maintains seconds and milliseconds counters, and five alarm
registers. The alarms and other interrupts may wake the system from
low-power state.

Define a DT binding for this HW module, and add the module into the Tegra
device tree files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16 12:22:16 -07:00
Stephen Warren 2f2b7fb202 ARM: tegra: define DT bindings for and instantiate timer
The Tegra timer provides a number of 29-bit timer channels, a single
32-bit free running counter, and in the Tegra30 variant, 5 watchdog modules.
The first two channels may also trigger a legacy watchdog reset.

Define a DT binding for this HW module, and add the module into the Tegra
device tree files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16 12:22:16 -07:00
Thierry Reding ed39097c2a ARM: tegra: Add Tegra30 host1x support
Add the host1x node along with its children to the Tegra30 DTSI. Board-
specific DTS files are expected to enable the available outputs and
complement the device tree with data specific to the hardware.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:07:31 -07:00
Laxman Dewangan a86b0db3c0 ARM: tegra: dts: add slink controller dt entry
Add slink controller details in the dts file of
Tegra20 and Tegra30.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:07:29 -07:00
Joseph Lo 5ab134ad09 ARM: tegra: dt: add L2 cache controller
Add L2 cache controller binding into DT for Tegra.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:23 -07:00
Pritesh Raithatha 322337b8fb ARM: dt: tegra: fix length of pad control and mux registers
The reg property contains <base length> not <base last_offset>. Fix
the length values to be length not last_offset.

Cc: stable@vger.kernel.org
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-30 14:37:06 -06:00
Thierry Reding 2b8b15da66 ARM: tegra: dts: Add pwm label
PWM devices can be referenced in the DT by phandle and per-chip index.
In order for this to work properly, the PWM controller needs to have a
label attached to it.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-20 09:33:59 -06:00
Linus Torvalds 9ec97169e7 Merge branch 'for-3.6' of git://gitorious.org/linux-pwm/linux-pwm
Pull PWM subsystem from Thierry Reding:
 "The new PWM subsystem aims at collecting all implementations of the
  legacy PWM API and to eventually replace it completely.

  The subsystem has been in development for over half a year now and
  many drivers have already been converted.  It has been in linux-next
  for a couple of weeks and there have been no major issues so I think
  it is ready for inclusion in your tree."

Arnd Bergmann <arnd@arndb.de>:
 "Very much Ack on the new subsystem.  It uses the interface
  declarations as the previously separate pwm drivers, so nothing
  changes for now in the drivers using it, although it enables us to
  change those more easily in the future if we want to.

  This work is also one of the missing pieces that are required to
  eventually build ARM kernels for multiple platforms, which is
  currently prohibited (amongs other things) by the fact that you cannot
  have more than one driver exporting the pwm functions."

Tested-and-acked-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Philip, Avinash <avinashphilip@ti.com> # TI's AM33xx platforms
Acked-By: Alexandre Pereira da Silva <aletes.xgr@gmail.com> # LPC32XX
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Sachin Kamat <sachin.kamat@linaro.org>

Fix up trivial conflicts with other cleanups and DT updates.

* 'for-3.6' of git://gitorious.org/linux-pwm/linux-pwm: (36 commits)
  pwm: pwm-tiehrpwm: PWM driver support for EHRPWM
  pwm: pwm-tiecap: PWM driver support for ECAP APWM
  pwm: fix used-uninitialized warning in pwm_get()
  pwm: add lpc32xx PWM support
  pwm_backlight: pass correct brightness to callback
  pwm: Use pr_* functions in pwm-samsung.c file
  pwm: Convert pwm-samsung to use devm_* APIs
  pwm: Convert pwm-tegra to use devm_clk_get()
  pwm: pwm-mxs: Return proper error if pwmchip_remove() fails
  pwm: pwm-bfin: Return proper error if pwmchip_remove() fails
  pwm: pxa: Propagate pwmchip_remove() error
  pwm: Convert pwm-pxa to use devm_* APIs
  pwm: Convert pwm-vt8500 to use devm_* APIs
  pwm: Convert pwm-imx to use devm_* APIs
  pwm: Conflict with legacy PWM API
  pwm: pwm-mxs: add pinctrl support
  pwm: pwm-mxs: use devm_* managed functions
  pwm: pwm-mxs: use global reset function stmp_reset_block
  pwm: pwm-mxs: encode soc name in compatible string
  pwm: Take over maintainership of the PWM subsystem
  ...
2012-07-30 09:22:37 -07:00
Thierry Reding 140fd977dc pwm: tegra: Add device tree support
Add auxdata to instantiate the PWFM controller from a device tree,
include the corresponding nodes in the dtsi files for Tegra 20 and
Tegra 30 and add binding documentation.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2012-07-02 21:38:59 +02:00
Roland Stigge 223ef78d04 ARM: tegra: Fix dts files w/ status property: "disable" -> "disabled"
This patches fixes some status = "disable" strings to "disabled", the correct
way of disabling nodes in the devicetree.

Just the tegra part here. Everything else goes via other patches and trees.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-20 12:30:34 -06:00
hdoyu@nvidia.com a9140aa51d ARM: dt: tegra{20,30}.dtsi: Rename "mc" to "memory-controller"
Use a more plain english name.

Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
[swarren: remove redundant unit address from tegra30.dtsi change]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-11 11:48:40 -06:00
Stephen Warren 2a5fdc9add ARM: dt: tegra: invert status=disable vs status=okay
In tegra*.dtsi, set status="disable" for all HW modules that the board
design may choose not to use. Update all boards to specifically enable
any of those modules that are useful by setting status="okay".

This makes board files say which features they do use, rather than which
they don't, which feels more logical. It also makes the .dts files
slightly smaller, at least for existing content.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
2012-05-14 10:55:23 -06:00
Stephen Warren 2eaab06ea6 ARM: dt: tegra: consistent basic property ordering
Put properties in order compatible, reg, interrupts, then anything else
the node has.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
2012-05-14 10:55:19 -06:00