Merge tag 'tegra-for-3.7-dmaengine' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup

ARM: tegra: switch to dmaengine

The Tegra code-base has contained both a legacy DMA and a dmaengine
driver since v3.6-rcX. This series flips Tegra's defconfig to enable
dmaengine rather than the legacy driver, and removes the legacy driver
and all client code.

* tag 'tegra-for-3.7-dmaengine' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  ASoC: tegra: remove support of legacy DMA driver based access
  spi: tegra: remove support of legacy DMA driver based access
  ARM: tegra: apbio: remove support of legacy DMA driver based access
  ARM: tegra: dma: remove legacy APB DMA driver
  ARM: tegra: config: enable dmaengine based APB DMA driver
  + sync to 3.6-rc6
This commit is contained in:
Olof Johansson
2012-09-20 19:57:38 -07:00
385 changed files with 3223 additions and 3024 deletions
+1 -1
View File
@@ -426,7 +426,7 @@ static const int arizona_44k1_bclk_rates[] = {
940800,
1411200,
1881600,
2882400,
2822400,
3763200,
5644800,
7526400,
+4 -4
View File
@@ -659,7 +659,7 @@ static struct snd_soc_dai_driver mc13783_dai_async[] = {
.id = MC13783_ID_STEREO_DAC,
.playback = {
.stream_name = "Playback",
.channels_min = 1,
.channels_min = 2,
.channels_max = 2,
.rates = SNDRV_PCM_RATE_8000_96000,
.formats = MC13783_FORMATS,
@@ -670,7 +670,7 @@ static struct snd_soc_dai_driver mc13783_dai_async[] = {
.id = MC13783_ID_STEREO_CODEC,
.capture = {
.stream_name = "Capture",
.channels_min = 1,
.channels_min = 2,
.channels_max = 2,
.rates = MC13783_RATES_RECORD,
.formats = MC13783_FORMATS,
@@ -692,14 +692,14 @@ static struct snd_soc_dai_driver mc13783_dai_sync[] = {
.id = MC13783_ID_SYNC,
.playback = {
.stream_name = "Playback",
.channels_min = 1,
.channels_min = 2,
.channels_max = 2,
.rates = SNDRV_PCM_RATE_8000_96000,
.formats = MC13783_FORMATS,
},
.capture = {
.stream_name = "Capture",
.channels_min = 1,
.channels_min = 2,
.channels_max = 2,
.rates = MC13783_RATES_RECORD,
.formats = MC13783_FORMATS,
+1 -1
View File
@@ -100,7 +100,7 @@ static const struct reg_default wm8904_reg_defaults[] = {
{ 14, 0x0000 }, /* R14 - Power Management 2 */
{ 15, 0x0000 }, /* R15 - Power Management 3 */
{ 18, 0x0000 }, /* R18 - Power Management 6 */
{ 19, 0x945E }, /* R20 - Clock Rates 0 */
{ 20, 0x945E }, /* R20 - Clock Rates 0 */
{ 21, 0x0C05 }, /* R21 - Clock Rates 1 */
{ 22, 0x0006 }, /* R22 - Clock Rates 2 */
{ 24, 0x0050 }, /* R24 - Audio Interface 0 */
+1 -1
View File
@@ -94,7 +94,7 @@ static int __devinit imx_sgtl5000_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "audmux internal port setup failed\n");
return ret;
}
imx_audmux_v2_configure_port(ext_port,
ret = imx_audmux_v2_configure_port(ext_port,
IMX_AUDMUX_V2_PTCR_SYN,
IMX_AUDMUX_V2_PDCR_RXDSEL(int_port));
if (ret) {
+1 -1
View File
@@ -59,7 +59,7 @@ static int am3517evm_hw_params(struct snd_pcm_substream *substream,
return ret;
}
snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_FSR_SRC_FSX, 0,
ret = snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_FSR_SRC_FSX, 0,
SND_SOC_CLOCK_IN);
if (ret < 0) {
printk(KERN_ERR "can't set CPU system clock OMAP_MCBSP_FSR_SRC_FSX\n");
+1 -7
View File
@@ -34,9 +34,7 @@ static const struct snd_pcm_hardware dma_hardware = {
.info = SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_RESUME,
SNDRV_PCM_INFO_MMAP_VALID,
.formats = SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_U16_LE |
SNDRV_PCM_FMTBIT_U8 |
@@ -248,15 +246,11 @@ static int dma_trigger(struct snd_pcm_substream *substream, int cmd)
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
prtd->state |= ST_RUNNING;
prtd->params->ops->trigger(prtd->params->ch);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
prtd->state &= ~ST_RUNNING;
prtd->params->ops->stop(prtd->params->ch);
break;
+4 -1
View File
@@ -291,8 +291,11 @@ static int snd_soc_dapm_set_bias_level(struct snd_soc_dapm_context *dapm,
if (dapm->codec->driver->set_bias_level)
ret = dapm->codec->driver->set_bias_level(dapm->codec,
level);
} else
else
dapm->bias_level = level;
} else if (!card || dapm != &card->dapm) {
dapm->bias_level = level;
}
if (ret != 0)
goto out;
+1 -1
View File
@@ -138,7 +138,7 @@ static void spear_pcm_free(struct snd_pcm *pcm)
continue;
buf = &substream->dma_buffer;
if (!buf && !buf->area)
if (!buf || !buf->area)
continue;
dma_free_writecombine(pcm->card->dev, buf->bytes,
+1 -1
View File
@@ -1,6 +1,6 @@
config SND_SOC_TEGRA
tristate "SoC Audio for the Tegra System-on-Chip"
depends on ARCH_TEGRA && (TEGRA_SYSTEM_DMA || TEGRA20_APB_DMA)
depends on ARCH_TEGRA && TEGRA20_APB_DMA
select REGMAP_MMIO
select SND_SOC_DMAENGINE_PCM if TEGRA20_APB_DMA
help
-1
View File
@@ -89,7 +89,6 @@ static struct snd_soc_jack_gpio tegra_alc5632_hp_jack_gpio = {
.name = "Headset detection",
.report = SND_JACK_HEADSET,
.debounce_time = 150,
.invert = 1,
};
static const struct snd_soc_dapm_widget tegra_alc5632_dapm_widgets[] = {
+2 -234
View File
@@ -57,237 +57,6 @@ static const struct snd_pcm_hardware tegra_pcm_hardware = {
.fifo_size = 4,
};
#if defined(CONFIG_TEGRA_SYSTEM_DMA)
static void tegra_pcm_queue_dma(struct tegra_runtime_data *prtd)
{
struct snd_pcm_substream *substream = prtd->substream;
struct snd_dma_buffer *buf = &substream->dma_buffer;
struct tegra_dma_req *dma_req;
unsigned long addr;
dma_req = &prtd->dma_req[prtd->dma_req_idx];
prtd->dma_req_idx = 1 - prtd->dma_req_idx;
addr = buf->addr + prtd->dma_pos;
prtd->dma_pos += dma_req->size;
if (prtd->dma_pos >= prtd->dma_pos_end)
prtd->dma_pos = 0;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
dma_req->source_addr = addr;
else
dma_req->dest_addr = addr;
tegra_dma_enqueue_req(prtd->dma_chan, dma_req);
}
static void dma_complete_callback(struct tegra_dma_req *req)
{
struct tegra_runtime_data *prtd = (struct tegra_runtime_data *)req->dev;
struct snd_pcm_substream *substream = prtd->substream;
struct snd_pcm_runtime *runtime = substream->runtime;
spin_lock(&prtd->lock);
if (!prtd->running) {
spin_unlock(&prtd->lock);
return;
}
if (++prtd->period_index >= runtime->periods)
prtd->period_index = 0;
tegra_pcm_queue_dma(prtd);
spin_unlock(&prtd->lock);
snd_pcm_period_elapsed(substream);
}
static void setup_dma_tx_request(struct tegra_dma_req *req,
struct tegra_pcm_dma_params * dmap)
{
req->complete = dma_complete_callback;
req->to_memory = false;
req->dest_addr = dmap->addr;
req->dest_wrap = dmap->wrap;
req->source_bus_width = 32;
req->source_wrap = 0;
req->dest_bus_width = dmap->width;
req->req_sel = dmap->req_sel;
}
static void setup_dma_rx_request(struct tegra_dma_req *req,
struct tegra_pcm_dma_params * dmap)
{
req->complete = dma_complete_callback;
req->to_memory = true;
req->source_addr = dmap->addr;
req->dest_wrap = 0;
req->source_bus_width = dmap->width;
req->source_wrap = dmap->wrap;
req->dest_bus_width = 32;
req->req_sel = dmap->req_sel;
}
static int tegra_pcm_open(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct tegra_runtime_data *prtd;
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct tegra_pcm_dma_params * dmap;
int ret = 0;
prtd = kzalloc(sizeof(struct tegra_runtime_data), GFP_KERNEL);
if (prtd == NULL)
return -ENOMEM;
runtime->private_data = prtd;
prtd->substream = substream;
spin_lock_init(&prtd->lock);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
dmap = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
setup_dma_tx_request(&prtd->dma_req[0], dmap);
setup_dma_tx_request(&prtd->dma_req[1], dmap);
} else {
dmap = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
setup_dma_rx_request(&prtd->dma_req[0], dmap);
setup_dma_rx_request(&prtd->dma_req[1], dmap);
}
prtd->dma_req[0].dev = prtd;
prtd->dma_req[1].dev = prtd;
prtd->dma_chan = tegra_dma_allocate_channel(TEGRA_DMA_MODE_ONESHOT);
if (prtd->dma_chan == NULL) {
ret = -ENOMEM;
goto err;
}
/* Set HW params now that initialization is complete */
snd_soc_set_runtime_hwparams(substream, &tegra_pcm_hardware);
/* Ensure that buffer size is a multiple of period size */
ret = snd_pcm_hw_constraint_integer(runtime,
SNDRV_PCM_HW_PARAM_PERIODS);
if (ret < 0)
goto err;
return 0;
err:
if (prtd->dma_chan) {
tegra_dma_free_channel(prtd->dma_chan);
}
kfree(prtd);
return ret;
}
static int tegra_pcm_close(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct tegra_runtime_data *prtd = runtime->private_data;
tegra_dma_free_channel(prtd->dma_chan);
kfree(prtd);
return 0;
}
static int tegra_pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct tegra_runtime_data *prtd = runtime->private_data;
snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
prtd->dma_req[0].size = params_period_bytes(params);
prtd->dma_req[1].size = prtd->dma_req[0].size;
return 0;
}
static int tegra_pcm_hw_free(struct snd_pcm_substream *substream)
{
snd_pcm_set_runtime_buffer(substream, NULL);
return 0;
}
static int tegra_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct tegra_runtime_data *prtd = runtime->private_data;
unsigned long flags;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
prtd->dma_pos = 0;
prtd->dma_pos_end = frames_to_bytes(runtime, runtime->periods * runtime->period_size);
prtd->period_index = 0;
prtd->dma_req_idx = 0;
/* Fall-through */
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
spin_lock_irqsave(&prtd->lock, flags);
prtd->running = 1;
spin_unlock_irqrestore(&prtd->lock, flags);
tegra_pcm_queue_dma(prtd);
tegra_pcm_queue_dma(prtd);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
spin_lock_irqsave(&prtd->lock, flags);
prtd->running = 0;
spin_unlock_irqrestore(&prtd->lock, flags);
tegra_dma_dequeue_req(prtd->dma_chan, &prtd->dma_req[0]);
tegra_dma_dequeue_req(prtd->dma_chan, &prtd->dma_req[1]);
break;
default:
return -EINVAL;
}
return 0;
}
static snd_pcm_uframes_t tegra_pcm_pointer(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct tegra_runtime_data *prtd = runtime->private_data;
return prtd->period_index * runtime->period_size;
}
static int tegra_pcm_mmap(struct snd_pcm_substream *substream,
struct vm_area_struct *vma)
{
struct snd_pcm_runtime *runtime = substream->runtime;
return dma_mmap_writecombine(substream->pcm->card->dev, vma,
runtime->dma_area,
runtime->dma_addr,
runtime->dma_bytes);
}
static struct snd_pcm_ops tegra_pcm_ops = {
.open = tegra_pcm_open,
.close = tegra_pcm_close,
.ioctl = snd_pcm_lib_ioctl,
.hw_params = tegra_pcm_hw_params,
.hw_free = tegra_pcm_hw_free,
.trigger = tegra_pcm_trigger,
.pointer = tegra_pcm_pointer,
.mmap = tegra_pcm_mmap,
};
#else
static int tegra_pcm_open(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
@@ -334,11 +103,11 @@ static int tegra_pcm_hw_params(struct snd_pcm_substream *substream,
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
slave_config.dst_addr = dmap->addr;
slave_config.src_maxburst = 0;
slave_config.dst_maxburst = 4;
} else {
slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
slave_config.src_addr = dmap->addr;
slave_config.dst_maxburst = 0;
slave_config.src_maxburst = 4;
}
slave_config.slave_id = dmap->req_sel;
@@ -399,7 +168,6 @@ static struct snd_pcm_ops tegra_pcm_ops = {
.pointer = snd_dmaengine_pcm_pointer,
.mmap = tegra_pcm_mmap,
};
#endif
static int tegra_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
{
-14
View File
@@ -40,20 +40,6 @@ struct tegra_pcm_dma_params {
unsigned long req_sel;
};
#if defined(CONFIG_TEGRA_SYSTEM_DMA)
struct tegra_runtime_data {
struct snd_pcm_substream *substream;
spinlock_t lock;
int running;
int dma_pos;
int dma_pos_end;
int period_index;
int dma_req_idx;
struct tegra_dma_req dma_req[2];
struct tegra_dma_channel *dma_chan;
};
#endif
int tegra_pcm_platform_register(struct device *dev);
void tegra_pcm_platform_unregister(struct device *dev);
+5 -20
View File
@@ -663,7 +663,6 @@ int ux500_msp_i2s_init_msp(struct platform_device *pdev,
struct ux500_msp **msp_p,
struct msp_i2s_platform_data *platform_data)
{
int ret = 0;
struct resource *res = NULL;
struct i2s_controller *i2s_cont;
struct ux500_msp *msp;
@@ -685,15 +684,14 @@ int ux500_msp_i2s_init_msp(struct platform_device *pdev,
if (res == NULL) {
dev_err(&pdev->dev, "%s: ERROR: Unable to get resource!\n",
__func__);
ret = -ENOMEM;
goto err_res;
return -ENOMEM;
}
msp->registers = ioremap(res->start, (res->end - res->start + 1));
msp->registers = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
if (msp->registers == NULL) {
dev_err(&pdev->dev, "%s: ERROR: ioremap failed!\n", __func__);
ret = -ENOMEM;
goto err_res;
return -ENOMEM;
}
msp->msp_state = MSP_STATE_IDLE;
@@ -705,7 +703,7 @@ int ux500_msp_i2s_init_msp(struct platform_device *pdev,
dev_err(&pdev->dev,
"%s: ERROR: Failed to allocate I2S-controller!\n",
__func__);
goto err_i2s_cont;
return -ENOMEM;
}
i2s_cont->dev.parent = &pdev->dev;
i2s_cont->data = (void *)msp;
@@ -716,14 +714,6 @@ int ux500_msp_i2s_init_msp(struct platform_device *pdev,
msp->i2s_cont = i2s_cont;
return 0;
err_i2s_cont:
iounmap(msp->registers);
err_res:
devm_kfree(&pdev->dev, msp);
return ret;
}
void ux500_msp_i2s_cleanup_msp(struct platform_device *pdev,
@@ -732,11 +722,6 @@ void ux500_msp_i2s_cleanup_msp(struct platform_device *pdev,
dev_dbg(msp->dev, "%s: Enter (id = %d).\n", __func__, msp->id);
device_unregister(&msp->i2s_cont->dev);
devm_kfree(&pdev->dev, msp->i2s_cont);
iounmap(msp->registers);
devm_kfree(&pdev->dev, msp);
}
MODULE_LICENSE("GPL v2");