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https://github.com/suyu-emu/horinux.git
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Merge tag 'tegra-for-3.7-dmaengine' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup
ARM: tegra: switch to dmaengine The Tegra code-base has contained both a legacy DMA and a dmaengine driver since v3.6-rcX. This series flips Tegra's defconfig to enable dmaengine rather than the legacy driver, and removes the legacy driver and all client code. * tag 'tegra-for-3.7-dmaengine' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: ASoC: tegra: remove support of legacy DMA driver based access spi: tegra: remove support of legacy DMA driver based access ARM: tegra: apbio: remove support of legacy DMA driver based access ARM: tegra: dma: remove legacy APB DMA driver ARM: tegra: config: enable dmaengine based APB DMA driver + sync to 3.6-rc6
This commit is contained in:
@@ -426,7 +426,7 @@ static const int arizona_44k1_bclk_rates[] = {
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940800,
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1411200,
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1881600,
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2882400,
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2822400,
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3763200,
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5644800,
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7526400,
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@@ -659,7 +659,7 @@ static struct snd_soc_dai_driver mc13783_dai_async[] = {
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.id = MC13783_ID_STEREO_DAC,
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.playback = {
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.stream_name = "Playback",
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.channels_min = 1,
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = MC13783_FORMATS,
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@@ -670,7 +670,7 @@ static struct snd_soc_dai_driver mc13783_dai_async[] = {
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.id = MC13783_ID_STEREO_CODEC,
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.capture = {
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.stream_name = "Capture",
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.channels_min = 1,
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.channels_min = 2,
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.channels_max = 2,
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.rates = MC13783_RATES_RECORD,
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.formats = MC13783_FORMATS,
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@@ -692,14 +692,14 @@ static struct snd_soc_dai_driver mc13783_dai_sync[] = {
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.id = MC13783_ID_SYNC,
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.playback = {
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.stream_name = "Playback",
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.channels_min = 1,
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = MC13783_FORMATS,
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},
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.capture = {
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.stream_name = "Capture",
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.channels_min = 1,
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.channels_min = 2,
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.channels_max = 2,
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.rates = MC13783_RATES_RECORD,
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.formats = MC13783_FORMATS,
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@@ -100,7 +100,7 @@ static const struct reg_default wm8904_reg_defaults[] = {
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{ 14, 0x0000 }, /* R14 - Power Management 2 */
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{ 15, 0x0000 }, /* R15 - Power Management 3 */
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{ 18, 0x0000 }, /* R18 - Power Management 6 */
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{ 19, 0x945E }, /* R20 - Clock Rates 0 */
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{ 20, 0x945E }, /* R20 - Clock Rates 0 */
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{ 21, 0x0C05 }, /* R21 - Clock Rates 1 */
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{ 22, 0x0006 }, /* R22 - Clock Rates 2 */
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{ 24, 0x0050 }, /* R24 - Audio Interface 0 */
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@@ -94,7 +94,7 @@ static int __devinit imx_sgtl5000_probe(struct platform_device *pdev)
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dev_err(&pdev->dev, "audmux internal port setup failed\n");
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return ret;
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}
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imx_audmux_v2_configure_port(ext_port,
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ret = imx_audmux_v2_configure_port(ext_port,
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IMX_AUDMUX_V2_PTCR_SYN,
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IMX_AUDMUX_V2_PDCR_RXDSEL(int_port));
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if (ret) {
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@@ -59,7 +59,7 @@ static int am3517evm_hw_params(struct snd_pcm_substream *substream,
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return ret;
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}
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snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_FSR_SRC_FSX, 0,
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ret = snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_FSR_SRC_FSX, 0,
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SND_SOC_CLOCK_IN);
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if (ret < 0) {
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printk(KERN_ERR "can't set CPU system clock OMAP_MCBSP_FSR_SRC_FSX\n");
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@@ -34,9 +34,7 @@ static const struct snd_pcm_hardware dma_hardware = {
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.info = SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BLOCK_TRANSFER |
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SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_PAUSE |
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SNDRV_PCM_INFO_RESUME,
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SNDRV_PCM_INFO_MMAP_VALID,
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.formats = SNDRV_PCM_FMTBIT_S16_LE |
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SNDRV_PCM_FMTBIT_U16_LE |
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SNDRV_PCM_FMTBIT_U8 |
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@@ -248,15 +246,11 @@ static int dma_trigger(struct snd_pcm_substream *substream, int cmd)
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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prtd->state |= ST_RUNNING;
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prtd->params->ops->trigger(prtd->params->ch);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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prtd->state &= ~ST_RUNNING;
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prtd->params->ops->stop(prtd->params->ch);
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break;
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@@ -291,8 +291,11 @@ static int snd_soc_dapm_set_bias_level(struct snd_soc_dapm_context *dapm,
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if (dapm->codec->driver->set_bias_level)
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ret = dapm->codec->driver->set_bias_level(dapm->codec,
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level);
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} else
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else
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dapm->bias_level = level;
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} else if (!card || dapm != &card->dapm) {
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dapm->bias_level = level;
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}
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if (ret != 0)
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goto out;
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@@ -138,7 +138,7 @@ static void spear_pcm_free(struct snd_pcm *pcm)
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continue;
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buf = &substream->dma_buffer;
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if (!buf && !buf->area)
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if (!buf || !buf->area)
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continue;
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dma_free_writecombine(pcm->card->dev, buf->bytes,
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@@ -1,6 +1,6 @@
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config SND_SOC_TEGRA
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tristate "SoC Audio for the Tegra System-on-Chip"
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depends on ARCH_TEGRA && (TEGRA_SYSTEM_DMA || TEGRA20_APB_DMA)
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depends on ARCH_TEGRA && TEGRA20_APB_DMA
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select REGMAP_MMIO
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select SND_SOC_DMAENGINE_PCM if TEGRA20_APB_DMA
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help
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@@ -89,7 +89,6 @@ static struct snd_soc_jack_gpio tegra_alc5632_hp_jack_gpio = {
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.name = "Headset detection",
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.report = SND_JACK_HEADSET,
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.debounce_time = 150,
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.invert = 1,
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};
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static const struct snd_soc_dapm_widget tegra_alc5632_dapm_widgets[] = {
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+2
-234
@@ -57,237 +57,6 @@ static const struct snd_pcm_hardware tegra_pcm_hardware = {
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.fifo_size = 4,
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};
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#if defined(CONFIG_TEGRA_SYSTEM_DMA)
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static void tegra_pcm_queue_dma(struct tegra_runtime_data *prtd)
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{
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struct snd_pcm_substream *substream = prtd->substream;
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struct snd_dma_buffer *buf = &substream->dma_buffer;
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struct tegra_dma_req *dma_req;
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unsigned long addr;
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dma_req = &prtd->dma_req[prtd->dma_req_idx];
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prtd->dma_req_idx = 1 - prtd->dma_req_idx;
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addr = buf->addr + prtd->dma_pos;
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prtd->dma_pos += dma_req->size;
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if (prtd->dma_pos >= prtd->dma_pos_end)
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prtd->dma_pos = 0;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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dma_req->source_addr = addr;
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else
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dma_req->dest_addr = addr;
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tegra_dma_enqueue_req(prtd->dma_chan, dma_req);
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}
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static void dma_complete_callback(struct tegra_dma_req *req)
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{
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struct tegra_runtime_data *prtd = (struct tegra_runtime_data *)req->dev;
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struct snd_pcm_substream *substream = prtd->substream;
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struct snd_pcm_runtime *runtime = substream->runtime;
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spin_lock(&prtd->lock);
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if (!prtd->running) {
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spin_unlock(&prtd->lock);
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return;
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}
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if (++prtd->period_index >= runtime->periods)
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prtd->period_index = 0;
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tegra_pcm_queue_dma(prtd);
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spin_unlock(&prtd->lock);
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snd_pcm_period_elapsed(substream);
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}
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static void setup_dma_tx_request(struct tegra_dma_req *req,
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struct tegra_pcm_dma_params * dmap)
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{
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req->complete = dma_complete_callback;
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req->to_memory = false;
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req->dest_addr = dmap->addr;
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req->dest_wrap = dmap->wrap;
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req->source_bus_width = 32;
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req->source_wrap = 0;
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req->dest_bus_width = dmap->width;
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req->req_sel = dmap->req_sel;
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}
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static void setup_dma_rx_request(struct tegra_dma_req *req,
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struct tegra_pcm_dma_params * dmap)
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{
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req->complete = dma_complete_callback;
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req->to_memory = true;
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req->source_addr = dmap->addr;
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req->dest_wrap = 0;
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req->source_bus_width = dmap->width;
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req->source_wrap = dmap->wrap;
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req->dest_bus_width = 32;
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req->req_sel = dmap->req_sel;
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}
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static int tegra_pcm_open(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct tegra_runtime_data *prtd;
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct tegra_pcm_dma_params * dmap;
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int ret = 0;
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prtd = kzalloc(sizeof(struct tegra_runtime_data), GFP_KERNEL);
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if (prtd == NULL)
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return -ENOMEM;
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runtime->private_data = prtd;
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prtd->substream = substream;
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spin_lock_init(&prtd->lock);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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dmap = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
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setup_dma_tx_request(&prtd->dma_req[0], dmap);
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setup_dma_tx_request(&prtd->dma_req[1], dmap);
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} else {
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dmap = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
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setup_dma_rx_request(&prtd->dma_req[0], dmap);
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setup_dma_rx_request(&prtd->dma_req[1], dmap);
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}
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prtd->dma_req[0].dev = prtd;
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prtd->dma_req[1].dev = prtd;
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prtd->dma_chan = tegra_dma_allocate_channel(TEGRA_DMA_MODE_ONESHOT);
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if (prtd->dma_chan == NULL) {
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ret = -ENOMEM;
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goto err;
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}
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/* Set HW params now that initialization is complete */
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snd_soc_set_runtime_hwparams(substream, &tegra_pcm_hardware);
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/* Ensure that buffer size is a multiple of period size */
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ret = snd_pcm_hw_constraint_integer(runtime,
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SNDRV_PCM_HW_PARAM_PERIODS);
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if (ret < 0)
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goto err;
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return 0;
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err:
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if (prtd->dma_chan) {
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tegra_dma_free_channel(prtd->dma_chan);
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}
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kfree(prtd);
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return ret;
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}
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static int tegra_pcm_close(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct tegra_runtime_data *prtd = runtime->private_data;
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tegra_dma_free_channel(prtd->dma_chan);
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kfree(prtd);
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||||
return 0;
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}
|
||||
|
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static int tegra_pcm_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
|
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{
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||||
struct snd_pcm_runtime *runtime = substream->runtime;
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||||
struct tegra_runtime_data *prtd = runtime->private_data;
|
||||
|
||||
snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
|
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|
||||
prtd->dma_req[0].size = params_period_bytes(params);
|
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prtd->dma_req[1].size = prtd->dma_req[0].size;
|
||||
|
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return 0;
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||||
}
|
||||
|
||||
static int tegra_pcm_hw_free(struct snd_pcm_substream *substream)
|
||||
{
|
||||
snd_pcm_set_runtime_buffer(substream, NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tegra_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
struct tegra_runtime_data *prtd = runtime->private_data;
|
||||
unsigned long flags;
|
||||
|
||||
switch (cmd) {
|
||||
case SNDRV_PCM_TRIGGER_START:
|
||||
prtd->dma_pos = 0;
|
||||
prtd->dma_pos_end = frames_to_bytes(runtime, runtime->periods * runtime->period_size);
|
||||
prtd->period_index = 0;
|
||||
prtd->dma_req_idx = 0;
|
||||
/* Fall-through */
|
||||
case SNDRV_PCM_TRIGGER_RESUME:
|
||||
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
|
||||
spin_lock_irqsave(&prtd->lock, flags);
|
||||
prtd->running = 1;
|
||||
spin_unlock_irqrestore(&prtd->lock, flags);
|
||||
tegra_pcm_queue_dma(prtd);
|
||||
tegra_pcm_queue_dma(prtd);
|
||||
break;
|
||||
case SNDRV_PCM_TRIGGER_STOP:
|
||||
case SNDRV_PCM_TRIGGER_SUSPEND:
|
||||
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
||||
spin_lock_irqsave(&prtd->lock, flags);
|
||||
prtd->running = 0;
|
||||
spin_unlock_irqrestore(&prtd->lock, flags);
|
||||
tegra_dma_dequeue_req(prtd->dma_chan, &prtd->dma_req[0]);
|
||||
tegra_dma_dequeue_req(prtd->dma_chan, &prtd->dma_req[1]);
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static snd_pcm_uframes_t tegra_pcm_pointer(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
struct tegra_runtime_data *prtd = runtime->private_data;
|
||||
|
||||
return prtd->period_index * runtime->period_size;
|
||||
}
|
||||
|
||||
|
||||
static int tegra_pcm_mmap(struct snd_pcm_substream *substream,
|
||||
struct vm_area_struct *vma)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
|
||||
return dma_mmap_writecombine(substream->pcm->card->dev, vma,
|
||||
runtime->dma_area,
|
||||
runtime->dma_addr,
|
||||
runtime->dma_bytes);
|
||||
}
|
||||
|
||||
static struct snd_pcm_ops tegra_pcm_ops = {
|
||||
.open = tegra_pcm_open,
|
||||
.close = tegra_pcm_close,
|
||||
.ioctl = snd_pcm_lib_ioctl,
|
||||
.hw_params = tegra_pcm_hw_params,
|
||||
.hw_free = tegra_pcm_hw_free,
|
||||
.trigger = tegra_pcm_trigger,
|
||||
.pointer = tegra_pcm_pointer,
|
||||
.mmap = tegra_pcm_mmap,
|
||||
};
|
||||
#else
|
||||
static int tegra_pcm_open(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
||||
@@ -334,11 +103,11 @@ static int tegra_pcm_hw_params(struct snd_pcm_substream *substream,
|
||||
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
|
||||
slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
|
||||
slave_config.dst_addr = dmap->addr;
|
||||
slave_config.src_maxburst = 0;
|
||||
slave_config.dst_maxburst = 4;
|
||||
} else {
|
||||
slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
|
||||
slave_config.src_addr = dmap->addr;
|
||||
slave_config.dst_maxburst = 0;
|
||||
slave_config.src_maxburst = 4;
|
||||
}
|
||||
slave_config.slave_id = dmap->req_sel;
|
||||
|
||||
@@ -399,7 +168,6 @@ static struct snd_pcm_ops tegra_pcm_ops = {
|
||||
.pointer = snd_dmaengine_pcm_pointer,
|
||||
.mmap = tegra_pcm_mmap,
|
||||
};
|
||||
#endif
|
||||
|
||||
static int tegra_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
|
||||
{
|
||||
|
||||
@@ -40,20 +40,6 @@ struct tegra_pcm_dma_params {
|
||||
unsigned long req_sel;
|
||||
};
|
||||
|
||||
#if defined(CONFIG_TEGRA_SYSTEM_DMA)
|
||||
struct tegra_runtime_data {
|
||||
struct snd_pcm_substream *substream;
|
||||
spinlock_t lock;
|
||||
int running;
|
||||
int dma_pos;
|
||||
int dma_pos_end;
|
||||
int period_index;
|
||||
int dma_req_idx;
|
||||
struct tegra_dma_req dma_req[2];
|
||||
struct tegra_dma_channel *dma_chan;
|
||||
};
|
||||
#endif
|
||||
|
||||
int tegra_pcm_platform_register(struct device *dev);
|
||||
void tegra_pcm_platform_unregister(struct device *dev);
|
||||
|
||||
|
||||
@@ -663,7 +663,6 @@ int ux500_msp_i2s_init_msp(struct platform_device *pdev,
|
||||
struct ux500_msp **msp_p,
|
||||
struct msp_i2s_platform_data *platform_data)
|
||||
{
|
||||
int ret = 0;
|
||||
struct resource *res = NULL;
|
||||
struct i2s_controller *i2s_cont;
|
||||
struct ux500_msp *msp;
|
||||
@@ -685,15 +684,14 @@ int ux500_msp_i2s_init_msp(struct platform_device *pdev,
|
||||
if (res == NULL) {
|
||||
dev_err(&pdev->dev, "%s: ERROR: Unable to get resource!\n",
|
||||
__func__);
|
||||
ret = -ENOMEM;
|
||||
goto err_res;
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
msp->registers = ioremap(res->start, (res->end - res->start + 1));
|
||||
msp->registers = devm_ioremap(&pdev->dev, res->start,
|
||||
resource_size(res));
|
||||
if (msp->registers == NULL) {
|
||||
dev_err(&pdev->dev, "%s: ERROR: ioremap failed!\n", __func__);
|
||||
ret = -ENOMEM;
|
||||
goto err_res;
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
msp->msp_state = MSP_STATE_IDLE;
|
||||
@@ -705,7 +703,7 @@ int ux500_msp_i2s_init_msp(struct platform_device *pdev,
|
||||
dev_err(&pdev->dev,
|
||||
"%s: ERROR: Failed to allocate I2S-controller!\n",
|
||||
__func__);
|
||||
goto err_i2s_cont;
|
||||
return -ENOMEM;
|
||||
}
|
||||
i2s_cont->dev.parent = &pdev->dev;
|
||||
i2s_cont->data = (void *)msp;
|
||||
@@ -716,14 +714,6 @@ int ux500_msp_i2s_init_msp(struct platform_device *pdev,
|
||||
msp->i2s_cont = i2s_cont;
|
||||
|
||||
return 0;
|
||||
|
||||
err_i2s_cont:
|
||||
iounmap(msp->registers);
|
||||
|
||||
err_res:
|
||||
devm_kfree(&pdev->dev, msp);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void ux500_msp_i2s_cleanup_msp(struct platform_device *pdev,
|
||||
@@ -732,11 +722,6 @@ void ux500_msp_i2s_cleanup_msp(struct platform_device *pdev,
|
||||
dev_dbg(msp->dev, "%s: Enter (id = %d).\n", __func__, msp->id);
|
||||
|
||||
device_unregister(&msp->i2s_cont->dev);
|
||||
devm_kfree(&pdev->dev, msp->i2s_cont);
|
||||
|
||||
iounmap(msp->registers);
|
||||
|
||||
devm_kfree(&pdev->dev, msp);
|
||||
}
|
||||
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
||||
Reference in New Issue
Block a user