mirror of
https://github.com/RfidResearchGroup/ChameleonMini.git
synced 2026-05-12 11:20:37 -07:00
522 lines
16 KiB
C
522 lines
16 KiB
C
/*
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* Flash.c
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*
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* Created on: 20.03.2013
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* Author: skuser
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*/
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#include "Memory.h"
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#include "Configuration.h"
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#include "Common.h"
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#include "Settings.h"
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#include "LEDHook.h"
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#include "System.h"
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#define USE_DMA
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#define RECV_DMA DMA.CH0
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#define SEND_DMA DMA.CH1
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/* Convert defines from Makefile */
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#define FLASH_DATA_START FLASH_DATA_ADDR
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#define FLASH_DATA_END (FLASH_DATA_ADDR + FLASH_DATA_SIZE - 1)
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/* Definitions for FRAM */
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#define FRAM_USART USARTD0
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#define FRAM_PORT PORTD
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#define FRAM_CS PIN4_bm
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#define FRAM_MOSI PIN3_bm
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#define FRAM_MISO PIN2_bm
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#define FRAM_SCK PIN1_bm
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/* Declarations from assembler file */
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uint16_t FlashReadWord(uint32_t Address);
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void FlashEraseApplicationPage(uint32_t Address);
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void FlashLoadFlashWord(uint16_t Address, uint16_t Data);
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void FlashEraseWriteApplicationPage(uint32_t Address);
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void FlashEraseFlashBuffer(void);
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void FlashWaitForSPM(void);
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static uint8_t ScrapBuffer[] = {0};
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INLINE uint8_t SPITransferByte(uint8_t Data) {
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FRAM_USART.DATA = Data;
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while (!(FRAM_USART.STATUS & USART_RXCIF_bm));
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return FRAM_USART.DATA;
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}
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#ifdef USE_DMA
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INLINE void SPIReadBlock(void *Buffer, uint16_t ByteCount) {
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/* Set up read and write transfers */
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RECV_DMA.ADDRCTRL = DMA_CH_SRCRELOAD_NONE_gc | DMA_CH_SRCDIR_FIXED_gc | DMA_CH_DESTRELOAD_NONE_gc | DMA_CH_DESTDIR_INC_gc;
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RECV_DMA.DESTADDR0 = ((uintptr_t) Buffer >> 0) & 0xFF;
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RECV_DMA.DESTADDR1 = ((uintptr_t) Buffer >> 8) & 0xFF;
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RECV_DMA.TRFCNT = ByteCount;
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SEND_DMA.ADDRCTRL = DMA_CH_SRCRELOAD_NONE_gc | DMA_CH_SRCDIR_FIXED_gc | DMA_CH_DESTRELOAD_NONE_gc | DMA_CH_DESTDIR_FIXED_gc;
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SEND_DMA.SRCADDR0 = ((uintptr_t) ScrapBuffer >> 0) & 0xFF;
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SEND_DMA.SRCADDR1 = ((uintptr_t) ScrapBuffer >> 8) & 0xFF;
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SEND_DMA.TRFCNT = ByteCount;
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/* Enable read and write transfers */
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RECV_DMA.CTRLA |= DMA_CH_ENABLE_bm;
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SEND_DMA.CTRLA |= DMA_CH_ENABLE_bm;
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/* Wait for DMA to finish */
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while (RECV_DMA.CTRLA & DMA_CH_ENABLE_bm)
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;
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/* Clear Interrupt flag */
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RECV_DMA.CTRLB = DMA_CH_TRNIF_bm | DMA_CH_ERRIF_bm;
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SEND_DMA.CTRLB = DMA_CH_TRNIF_bm | DMA_CH_ERRIF_bm;
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}
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#else
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INLINE void SPIReadBlock(void *Buffer, uint16_t ByteCount) {
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uint8_t *ByteBuffer = (uint8_t *) Buffer;
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while (ByteCount-- > 0) {
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FRAM_USART.DATA = 0;
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while (!(FRAM_USART.STATUS & USART_RXCIF_bm));
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*ByteBuffer++ = FRAM_USART.DATA;
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}
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}
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#endif
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#ifdef USE_DMA
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INLINE void SPIWriteBlock(const void *Buffer, uint16_t ByteCount) {
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/* Set up read and write transfers */
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RECV_DMA.ADDRCTRL = DMA_CH_SRCRELOAD_NONE_gc | DMA_CH_SRCDIR_FIXED_gc | DMA_CH_DESTRELOAD_NONE_gc | DMA_CH_DESTDIR_FIXED_gc;
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RECV_DMA.DESTADDR0 = ((uintptr_t) ScrapBuffer >> 0) & 0xFF;
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RECV_DMA.DESTADDR1 = ((uintptr_t) ScrapBuffer >> 8) & 0xFF;
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RECV_DMA.TRFCNT = ByteCount;
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SEND_DMA.ADDRCTRL = DMA_CH_SRCRELOAD_NONE_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTRELOAD_NONE_gc | DMA_CH_DESTDIR_FIXED_gc;
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SEND_DMA.SRCADDR0 = ((uintptr_t) Buffer >> 0) & 0xFF;
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SEND_DMA.SRCADDR1 = ((uintptr_t) Buffer >> 8) & 0xFF;
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SEND_DMA.TRFCNT = ByteCount;
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/* Enable read and write transfers */
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RECV_DMA.CTRLA |= DMA_CH_ENABLE_bm;
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SEND_DMA.CTRLA |= DMA_CH_ENABLE_bm;
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/* Wait for DMA to finish */
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while (RECV_DMA.CTRLA & DMA_CH_ENABLE_bm)
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;
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/* Clear Interrupt flag */
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RECV_DMA.CTRLB = DMA_CH_TRNIF_bm | DMA_CH_ERRIF_bm;
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SEND_DMA.CTRLB = DMA_CH_TRNIF_bm | DMA_CH_ERRIF_bm;
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}
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#else
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INLINE void SPIWriteBlock(const void *Buffer, uint16_t ByteCount) {
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uint8_t *ByteBuffer = (uint8_t *) Buffer;
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while (ByteCount-- > 0) {
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FRAM_USART.DATA = *ByteBuffer++;
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while (!(FRAM_USART.STATUS & USART_RXCIF_bm));
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FRAM_USART.DATA; /* Flush Buffer */
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}
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}
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#endif
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INLINE void FRAMRead(void *Buffer, uint16_t Address, uint16_t ByteCount) {
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FRAM_PORT.OUTCLR = FRAM_CS;
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SPITransferByte(0x03); /* Read command */
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SPITransferByte((Address >> 8) & 0xFF); /* Address hi and lo byte */
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SPITransferByte((Address >> 0) & 0xFF);
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SPIReadBlock(Buffer, ByteCount);
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FRAM_PORT.OUTSET = FRAM_CS;
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}
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INLINE void FRAMWrite(const void *Buffer, uint16_t Address, uint16_t ByteCount) {
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FRAM_PORT.OUTCLR = FRAM_CS;
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SPITransferByte(0x06); /* Write Enable */
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FRAM_PORT.OUTSET = FRAM_CS;
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asm volatile("nop");
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asm volatile("nop");
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FRAM_PORT.OUTCLR = FRAM_CS;
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SPITransferByte(0x02); /* Write command */
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SPITransferByte((Address >> 8) & 0xFF); /* Address hi and lo byte */
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SPITransferByte((Address >> 0) & 0xFF);
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SPIWriteBlock(Buffer, ByteCount);
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FRAM_PORT.OUTSET = FRAM_CS;
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}
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INLINE void FlashRead(void *Buffer, uint32_t Address, uint16_t ByteCount) {
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uint8_t *BufPtr = (uint8_t *) Buffer;
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/* We assume that ByteCount is a multiple of 2 */
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uint32_t PhysicalAddress = Address + FLASH_DATA_ADDR;
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if ((PhysicalAddress >= FLASH_DATA_START) && (PhysicalAddress <= FLASH_DATA_END)) {
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/* Sanity check to limit access to the allocated area */
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while (ByteCount > 1) {
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uint16_t Word = FlashReadWord(PhysicalAddress);
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*BufPtr++ = (Word >> 0) & 0xFF;
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*BufPtr++ = (Word >> 8) & 0xFF;
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PhysicalAddress += 2;
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ByteCount -= 2;
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}
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}
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}
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INLINE void FlashWrite(const void *Buffer, uint32_t Address, uint16_t ByteCount) {
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const uint8_t *BufPtr = (uint8_t *) Buffer;
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/* We assume that FlashWrite is always called for write actions that are
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* aligned to APP_SECTION_PAGE_SIZE and a multiple of APP_SECTION_PAGE_SIZE.
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* Thus only full pages are written into the flash. */
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uint16_t PageCount = ByteCount / APP_SECTION_PAGE_SIZE;
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uint32_t PhysicalAddress = Address + FLASH_DATA_ADDR;
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if ((PhysicalAddress >= FLASH_DATA_START) && (PhysicalAddress <= FLASH_DATA_END)) {
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/* Sanity check to limit access to the allocated area */
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while (PageCount-- > 0) {
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/* For each page to program, wait for NVM to get ready,
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* erase the flash page buffer, program all data to the
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* flash page buffer and write buffer to flash using
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* the atomic erase and write operation. */
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FlashWaitForSPM();
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FlashEraseFlashBuffer();
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FlashWaitForSPM();
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for (uint16_t i = 0; i < APP_SECTION_PAGE_SIZE; i += 2) {
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uint16_t Word = 0;
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Word |= ((uint16_t) * BufPtr++ << 0);
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Word |= ((uint16_t) * BufPtr++ << 8);
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FlashLoadFlashWord(i, Word);
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FlashWaitForSPM();
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}
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FlashEraseWriteApplicationPage(PhysicalAddress);
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FlashWaitForSPM();
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PhysicalAddress += APP_SECTION_PAGE_SIZE;
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}
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}
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}
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INLINE void FlashErase(uint32_t Address, uint16_t ByteCount) {
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uint16_t PageCount = ByteCount / APP_SECTION_PAGE_SIZE;
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uint32_t PhysicalAddress = Address + FLASH_DATA_ADDR;
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if ((PhysicalAddress >= FLASH_DATA_START) && (PhysicalAddress <= FLASH_DATA_END)) {
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/* Sanity check to limit access to the allocated area */
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while (PageCount-- > 0) {
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FlashWaitForSPM();
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FlashEraseApplicationPage(PhysicalAddress);
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FlashWaitForSPM();
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PhysicalAddress += APP_SECTION_PAGE_SIZE;
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}
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}
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}
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INLINE void FlashToFRAM(uint32_t Address, uint16_t ByteCount) {
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/* We assume that ByteCount is a multiple of 2 */
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uint32_t PhysicalAddress = Address + FLASH_DATA_ADDR;
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if ((PhysicalAddress >= FLASH_DATA_START) && (PhysicalAddress <= FLASH_DATA_END)) {
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/* Sanity check to limit access to the allocated area.
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* Set up FRAM memory for writing. */
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FRAM_PORT.OUTCLR = FRAM_CS;
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SPITransferByte(0x06); /* Write Enable */
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FRAM_PORT.OUTSET = FRAM_CS;
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asm volatile("nop");
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asm volatile("nop");
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FRAM_PORT.OUTCLR = FRAM_CS;
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SPITransferByte(0x02); /* Write command */
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SPITransferByte(0); /* Address hi and lo byte */
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SPITransferByte(0);
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/* Loop through bytes, read words from flash and write
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* double byte into FRAM. */
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while (ByteCount > 1) {
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uint16_t Word = FlashReadWord(PhysicalAddress);
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SPITransferByte((Word >> 0) & 0xFF);
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SPITransferByte((Word >> 8) & 0xFF);
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PhysicalAddress += 2;
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ByteCount -= 2;
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}
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/* End write procedure of FRAM */
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FRAM_PORT.OUTSET = FRAM_CS;
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}
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}
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INLINE void FRAMToFlash(uint32_t Address, uint16_t ByteCount) {
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/* We assume that FlashWrite is always called for write actions that are
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* aligned to APP_SECTION_PAGE_SIZE and a multiple of APP_SECTION_PAGE_SIZE.
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* Thus only full pages are written into the flash. */
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uint16_t PageCount = ByteCount / APP_SECTION_PAGE_SIZE;
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uint32_t PhysicalAddress = Address + FLASH_DATA_ADDR;
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if ((PhysicalAddress >= FLASH_DATA_START) && (PhysicalAddress <= FLASH_DATA_END)) {
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/* Sanity check to limit access to the allocated area and setup FRAM
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* read. */
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FRAM_PORT.OUTCLR = FRAM_CS;
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SPITransferByte(0x03); /* Read command */
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SPITransferByte(0); /* Address hi and lo byte */
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SPITransferByte(0);
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while (PageCount-- > 0) {
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/* For each page to program, wait for NVM to get ready,
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* erase the flash page buffer, program all data to the
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* flash page buffer and write buffer to flash using
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* the atomic erase and write operation. */
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FlashWaitForSPM();
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FlashEraseFlashBuffer();
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FlashWaitForSPM();
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/* Write one page worth of data into flash buffer */
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for (uint16_t i = 0; i < APP_SECTION_PAGE_SIZE; i += 2) {
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uint16_t Word = 0;
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Word |= ((uint16_t) SPITransferByte(0) << 0);
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Word |= ((uint16_t) SPITransferByte(0) << 8);
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FlashLoadFlashWord(i, Word);
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FlashWaitForSPM();
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}
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/* Program flash buffer into flash */
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FlashEraseWriteApplicationPage(PhysicalAddress);
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FlashWaitForSPM();
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PhysicalAddress += APP_SECTION_PAGE_SIZE;
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}
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/* End read procedure of FRAM */
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FRAM_PORT.OUTSET = FRAM_CS;
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}
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}
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void MemoryInit(void) {
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/* Configure FRAM_USART for SPI master mode 0 with maximum clock frequency */
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FRAM_PORT.OUTSET = FRAM_CS;
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FRAM_PORT.OUTCLR = FRAM_SCK;
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FRAM_PORT.OUTSET = FRAM_MOSI;
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FRAM_PORT.DIRSET = FRAM_SCK | FRAM_MOSI | FRAM_CS;
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FRAM_USART.BAUDCTRLA = 0;
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FRAM_USART.BAUDCTRLB = 0;
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FRAM_USART.CTRLC = USART_CMODE_MSPI_gc;
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FRAM_USART.CTRLB = USART_RXEN_bm | USART_TXEN_bm;
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/* Init DMAs for reading and writing */
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RECV_DMA.ADDRCTRL = DMA_CH_SRCRELOAD_NONE_gc | DMA_CH_SRCDIR_FIXED_gc | DMA_CH_DESTRELOAD_NONE_gc | DMA_CH_DESTDIR_FIXED_gc;
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RECV_DMA.TRIGSRC = DMA_CH_TRIGSRC_USARTD0_RXC_gc;
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RECV_DMA.TRFCNT = 0;
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RECV_DMA.SRCADDR0 = ((uintptr_t) &FRAM_USART.DATA >> 0) & 0xFF;
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RECV_DMA.SRCADDR1 = ((uintptr_t) &FRAM_USART.DATA >> 8) & 0xFF;
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RECV_DMA.SRCADDR2 = 0;
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RECV_DMA.DESTADDR0 = 0;
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RECV_DMA.DESTADDR1 = 0;
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RECV_DMA.DESTADDR2 = 0;
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RECV_DMA.CTRLA = DMA_CH_SINGLE_bm | DMA_CH_BURSTLEN_1BYTE_gc;
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SEND_DMA.ADDRCTRL = DMA_CH_SRCRELOAD_NONE_gc | DMA_CH_SRCDIR_FIXED_gc | DMA_CH_DESTRELOAD_NONE_gc | DMA_CH_DESTDIR_FIXED_gc;
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SEND_DMA.TRIGSRC = DMA_CH_TRIGSRC_USARTD0_DRE_gc;
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SEND_DMA.TRFCNT = 0;
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SEND_DMA.SRCADDR0 = 0;
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SEND_DMA.SRCADDR1 = 0;
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SEND_DMA.SRCADDR2 = 0;
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SEND_DMA.DESTADDR0 = ((uintptr_t) &FRAM_USART.DATA >> 0) & 0xFF;
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SEND_DMA.DESTADDR1 = ((uintptr_t) &FRAM_USART.DATA >> 8) & 0xFF;
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SEND_DMA.DESTADDR2 = 0;
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SEND_DMA.CTRLA = DMA_CH_SINGLE_bm | DMA_CH_BURSTLEN_1BYTE_gc;
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}
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void MemoryReadBlock(void *Buffer, uint16_t Address, uint16_t ByteCount) {
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if (ByteCount == 0)
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return;
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FRAMRead(Buffer, Address, ByteCount);
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}
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void MemoryWriteBlock(const void *Buffer, uint16_t Address, uint16_t ByteCount) {
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if (ByteCount == 0)
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return;
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FRAMWrite(Buffer, Address, ByteCount);
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LEDHook(LED_MEMORY_CHANGED, LED_ON);
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}
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void MemoryClear(void) {
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FlashErase((uint32_t) GlobalSettings.ActiveSettingIdx * MEMORY_SIZE_PER_SETTING, MEMORY_SIZE_PER_SETTING);
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MemoryRecall();
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}
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void MemoryRecall(void) {
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/* Recall memory from permanent flash */
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FlashToFRAM((uint32_t) GlobalSettings.ActiveSettingIdx * MEMORY_SIZE_PER_SETTING, MEMORY_SIZE_PER_SETTING);
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SystemTickClearFlag();
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}
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void MemoryStore(void) {
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/* Store current memory into permanent flash */
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FRAMToFlash((uint32_t) GlobalSettings.ActiveSettingIdx * MEMORY_SIZE_PER_SETTING, MEMORY_SIZE_PER_SETTING);
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LEDHook(LED_MEMORY_CHANGED, LED_OFF);
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LEDHook(LED_MEMORY_STORED, LED_PULSE);
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SystemTickClearFlag();
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}
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bool MemoryUploadBlock(void *Buffer, uint32_t BlockAddress, uint16_t ByteCount) {
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if (BlockAddress >= MEMORY_SIZE_PER_SETTING) {
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/* Prevent writing out of bounds by silently ignoring it */
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return true;
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} else {
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/* Calculate bytes left in memory and start writing */
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uint32_t BytesLeft = MEMORY_SIZE_PER_SETTING - BlockAddress;
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ByteCount = MIN(ByteCount, BytesLeft);
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/* Store to local memory */
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FRAMWrite(Buffer, BlockAddress, ByteCount);
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return true;
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}
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}
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bool MemoryDownloadBlock(void *Buffer, uint32_t BlockAddress, uint16_t ByteCount) {
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if (BlockAddress >= MEMORY_SIZE_PER_SETTING) {
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/* There are bytes out of bounds to be read. Notify that we are done. */
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return false;
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} else {
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/* Calculate bytes left in memory and issue reading */
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uint32_t BytesLeft = MEMORY_SIZE_PER_SETTING - BlockAddress;
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ByteCount = MIN(ByteCount, BytesLeft);
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/* Output local memory contents */
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FRAMRead(Buffer, BlockAddress, ByteCount);
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return true;
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}
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}
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// EEPROM functions
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static inline void NVM_EXEC(void) {
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void *z = (void *)&NVM_CTRLA;
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__asm__ volatile("out %[ccp], %[ioreg]" "\n\t"
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"st z, %[cmdex]"
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:
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: [ccp] "I"(_SFR_IO_ADDR(CCP)),
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[ioreg] "d"(CCP_IOREG_gc),
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[cmdex] "r"(NVM_CMDEX_bm),
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[z] "z"(z)
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);
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}
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void WaitForNVM(void) {
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while (NVM.STATUS & NVM_NVMBUSY_bm) { };
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}
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void FlushNVMBuffer(void) {
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WaitForNVM();
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if ((NVM.STATUS & NVM_EELOAD_bm) != 0) {
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NVM.CMD = NVM_CMD_ERASE_EEPROM_BUFFER_gc;
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NVM_EXEC();
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}
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}
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uint16_t ReadEEPBlock(uint16_t Address, void *DestPtr, uint16_t ByteCount) {
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uint16_t BytesRead = 0;
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uint8_t *BytePtr = (uint8_t *) DestPtr;
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NVM.ADDR2 = 0;
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WaitForNVM();
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while (ByteCount > 0) {
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NVM.ADDR0 = Address & 0xFF;
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NVM.ADDR1 = (Address >> 8) & 0x1F;
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NVM.CMD = NVM_CMD_READ_EEPROM_gc;
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NVM_EXEC();
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*BytePtr++ = NVM.DATA0;
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Address++;
|
|
|
|
ByteCount--;
|
|
BytesRead++;
|
|
}
|
|
|
|
return BytesRead;
|
|
}
|
|
|
|
|
|
uint16_t WriteEEPBlock(uint16_t Address, const void *SrcPtr, uint16_t ByteCount) {
|
|
const uint8_t *BytePtr = (const uint8_t *) SrcPtr;
|
|
uint8_t ByteAddress = Address % EEPROM_PAGE_SIZE;
|
|
uint16_t PageAddress = Address - ByteAddress;
|
|
uint16_t BytesWritten = 0;
|
|
|
|
FlushNVMBuffer();
|
|
WaitForNVM();
|
|
NVM.CMD = NVM_CMD_LOAD_EEPROM_BUFFER_gc;
|
|
|
|
NVM.ADDR1 = 0;
|
|
NVM.ADDR2 = 0;
|
|
|
|
while (ByteCount > 0) {
|
|
NVM.ADDR0 = ByteAddress;
|
|
|
|
NVM.DATA0 = *BytePtr++;
|
|
|
|
ByteAddress++;
|
|
ByteCount--;
|
|
|
|
if (ByteCount == 0 || ByteAddress >= EEPROM_PAGE_SIZE) {
|
|
NVM.ADDR0 = PageAddress & 0xFF;
|
|
NVM.ADDR1 = (PageAddress >> 8) & 0x1F;
|
|
|
|
NVM.CMD = NVM_CMD_ERASE_WRITE_EEPROM_PAGE_gc;
|
|
NVM_EXEC();
|
|
|
|
PageAddress += EEPROM_PAGE_SIZE;
|
|
ByteAddress = 0;
|
|
|
|
WaitForNVM();
|
|
|
|
NVM.CMD = NVM_CMD_LOAD_EEPROM_BUFFER_gc;
|
|
}
|
|
|
|
BytesWritten++;
|
|
}
|
|
|
|
return BytesWritten;
|
|
}
|