From 68e6c3ae9020d201e15739b36d5750024989cf50 Mon Sep 17 00:00:00 2001 From: Shalx Date: Wed, 19 Feb 2025 23:10:35 -0600 Subject: [PATCH] Reset (#38) * Adding reset function by module; Changed LPC_FRAME drive as Open Drain * No bank reset when receiving lpc_reset * Updated: refactor some init/reset code * Removing config_nvm_reset from when lpc_reset falls * Fixed: flush CDC buffers after lpc47m152 init sequence * Disable low power mode when usb connected, flush each superio sp's write * Fixed: reset bank on modxo_reset * Fixed: moved flashrom_reset to correct location * Fixed: frag after reboot with usb connected * Fixed: lpc47m152 usb connection detection * Adds superio connection check by a global variable * Fixed: LED not working (cpu freq adjustment) * Small refactor for prev commit * Fixed: extra uart reset for LPC_ON * Updated: LPC reset tweaks * Updated: revert last commit * reimplementing lpc_interface_reset * Updated: some reset adjustments for windbg * Updated: some windbg reset refactoring --------- Co-authored-by: Alejandro Lopez Co-authored-by: hotfuzz13 <159473513+hotfuzz13@users.noreply.github.com> --- .gitignore | 1 + src/main.c | 22 ++++---- src/modxo/config/config_lpc.c | 7 ++- src/modxo/config/config_lpc.h | 2 +- src/modxo/config/config_nvm.c | 2 +- src/modxo/data_store/data_store.c | 8 ++- src/modxo/data_store/data_store.h | 3 +- src/modxo/flashrom/flashrom.c | 7 ++- src/modxo/flashrom/flashrom.h | 1 + src/modxo/lpc/lpc_comm.in | 6 +- src/modxo/lpc/lpc_interface.c | 34 ++++++----- src/modxo/lpc/lpc_interface.h | 3 +- src/modxo/modxo.c | 49 ++++++++-------- src/modxo/modxo.h | 13 ++++- src/modxo/modxo_ports.c | 9 ++- src/modxo/modxo_ports.h | 3 +- src/modxo/superio/LPC47M152.c | 94 ++++++++++++++++--------------- src/modxo/superio/LPC47M152.h | 1 + src/modxo/superio/uart_16550.c | 23 ++++++-- src/modxo/superio/uart_16550.h | 1 + src/modxo/ws2812/ws2812.c | 2 +- src/modxo/ws2812/ws2812.h | 2 +- 22 files changed, 171 insertions(+), 122 deletions(-) diff --git a/.gitignore b/.gitignore index a7b6814..0e379c8 100644 --- a/.gitignore +++ b/.gitignore @@ -57,3 +57,4 @@ build build_docker out bios +.vscode/settings.json diff --git a/src/main.c b/src/main.c index 72df501..89a92e8 100644 --- a/src/main.c +++ b/src/main.c @@ -35,11 +35,10 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "hardware/gpio.h" #include "tusb.h" +#include "modxo/flashrom/flashrom.h" #include "modxo/modxo.h" #include "modxo_pinout.h" -#define SYS_FREQ_IN_KHZ (266 * 1000) - bool reset_pin = false; bool modxo_active = false; @@ -83,15 +82,18 @@ void reset_pin_rising() void pin_3_3v_falling() { + modxo_active = false; modxo_low_power_mode(); + gpio_set_irq_enabled(LPC_ON, GPIO_IRQ_LEVEL_HIGH, true); } void pin_3_3v_high() { - gpio_set_irq_enabled(LPC_ON, GPIO_IRQ_LEVEL_HIGH, false); set_sys_clock_khz(SYS_FREQ_IN_KHZ, true); + gpio_set_irq_enabled(LPC_ON, GPIO_IRQ_LEVEL_HIGH, false); init_status_led(); - modxo_init(); + flashrom_reset(); + modxo_reset(); modxo_active = true; } @@ -112,17 +114,13 @@ void core0_irq_handler(uint gpio, uint32_t event) pin_3_3v_falling(); } + // Use LEVEL_HIGH because rising edge triggers too early after power-up (~500us) if (gpio == LPC_ON && (event & GPIO_IRQ_LEVEL_HIGH) != 0) { pin_3_3v_high(); } } -void xbox_shutdown() -{ - multicore_reset_core1(); -} - void modxo_init_pin_irq(uint pin, uint32_t event) { gpio_init(pin); @@ -142,16 +140,18 @@ void modxo_init_interrupts() int main(void) { + set_sys_clock_khz(SYS_FREQ_IN_KHZ, true); stdio_init_all(); #ifdef START_DELAY sleep_ms(2000); #endif - modxo_init_interrupts(); - multicore_reset_core1(); multicore_launch_core1(core1_main); + modxo_init(); + set_sys_clock_khz(SYS_FREQ_DEFAULT, true); + modxo_init_interrupts(); core0_main(); // Infinite loop } diff --git a/src/modxo/config/config_lpc.c b/src/modxo/config/config_lpc.c index 4339660..4e44055 100644 --- a/src/modxo/config/config_lpc.c +++ b/src/modxo/config/config_lpc.c @@ -163,8 +163,13 @@ static void config_write_hdlr(uint16_t address, uint8_t *data) } } -void config_nvm_init(void) +void config_nvm_reset(void) { config_retrieve_parameters(); +} + +void config_nvm_init(void) +{ + config_nvm_reset(); lpc_interface_add_io_handler(MODXO_REGISTER_NVM_CONFIG_SEL, 0xFFFE, config_read_hdlr, config_write_hdlr); } \ No newline at end of file diff --git a/src/modxo/config/config_lpc.h b/src/modxo/config/config_lpc.h index 946ba11..2878301 100644 --- a/src/modxo/config/config_lpc.h +++ b/src/modxo/config/config_lpc.h @@ -12,5 +12,5 @@ void config_set_reg_sel( NVM_REGISTER_SEL reg); NVM_REGISTER_SEL config_get_reg_sel(void); void config_set_value(uint8_t value); uint8_t config_get_value(void); - +void config_nvm_reset(void); void config_nvm_init(void); \ No newline at end of file diff --git a/src/modxo/config/config_nvm.c b/src/modxo/config/config_nvm.c index 2add2a3..5570d5e 100644 --- a/src/modxo/config/config_nvm.c +++ b/src/modxo/config/config_nvm.c @@ -176,7 +176,7 @@ static int look_next_empty_page(int page_no){ static int look_last_config(){ int page = -1; for(page = NVM_TOTAL_PAGES-1; page >= 0; page--){ - if(is_page_valid(page)){ + if(is_page_valid(page)){ break; } } diff --git a/src/modxo/data_store/data_store.c b/src/modxo/data_store/data_store.c index 01eb75d..6590096 100644 --- a/src/modxo/data_store/data_store.c +++ b/src/modxo/data_store/data_store.c @@ -39,7 +39,7 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "math.h" #define DATA_STORE_PORT_BASE MODXO_REGISTER_VOLATILE_CONFIG_SEL -#define DATA_STORE_ADDRESS_MASK 0xFE +#define DATA_STORE_ADDRESS_MASK 0xFFFE #define DATA_STORE_COMMAND_PORT DATA_STORE_PORT_BASE #define DATA_STORE_DATA_PORT DATA_STORE_PORT_BASE + 1 @@ -67,10 +67,14 @@ static void lpc_port_write(uint16_t address, uint8_t *data) } } -void data_store_init() +void data_store_reset(void) { data_store_cmd = 0; memset(data_store_buffer, 0, sizeof(data_store_buffer)); +} +void data_store_init() +{ + data_store_reset(); lpc_interface_add_io_handler(DATA_STORE_PORT_BASE, DATA_STORE_ADDRESS_MASK, lpc_port_read, lpc_port_write); } \ No newline at end of file diff --git a/src/modxo/data_store/data_store.h b/src/modxo/data_store/data_store.h index 0b49f6a..25deb8a 100644 --- a/src/modxo/data_store/data_store.h +++ b/src/modxo/data_store/data_store.h @@ -7,4 +7,5 @@ Copyright (c) 2024, Shalx #pragma once -void data_store_init(); +void data_store_init(void); +void data_store_reset(void); diff --git a/src/modxo/flashrom/flashrom.c b/src/modxo/flashrom/flashrom.c index c1c4094..a06e217 100644 --- a/src/modxo/flashrom/flashrom.c +++ b/src/modxo/flashrom/flashrom.c @@ -101,9 +101,14 @@ uint8_t flashrom_get_mmc(void) return mmc_register; } -bool flashrom_init(void) +void flashrom_reset(void) { flashrom_set_mmc(MODXO_BANK_BOOTLOADER); +} + +bool flashrom_init(void) +{ + flashrom_reset(); lpc_interface_set_callback(LPC_OP_MEM_READ, flashrom_memread_handler); lpc_interface_set_callback(LPC_OP_MEM_WRITE, flashrom_memwrite_handler); diff --git a/src/modxo/flashrom/flashrom.h b/src/modxo/flashrom/flashrom.h index 2828cc8..4c938c5 100644 --- a/src/modxo/flashrom/flashrom.h +++ b/src/modxo/flashrom/flashrom.h @@ -11,6 +11,7 @@ Copyright (c) 2024, Shalx #define MODXO_BANK_BOOTLOADER 0x01 +void flashrom_reset(void); bool flashrom_init(void); void flashrom_set_mmc(uint8_t); uint8_t flashrom_get_mmc(void); diff --git a/src/modxo/lpc/lpc_comm.in b/src/modxo/lpc/lpc_comm.in index 53310b8..cd2341f 100644 --- a/src/modxo/lpc/lpc_comm.in +++ b/src/modxo/lpc/lpc_comm.in @@ -26,7 +26,7 @@ .program lpc_read_request .define public LCLK_PIN @LPC_CLK@ -.side_set 1 opt pindirs +.side_set 1 opt .wrap_target pull wait_start: @@ -46,7 +46,7 @@ wait_cmd: jmp X!=Y check_start_again irq set 7 - mov X, OSR side 1 + mov X, OSR side 0 mov ISR, null read_nibbles: @@ -69,7 +69,7 @@ repeat: jmp X-- repeat ;wait 1 gpio LCLK_PIN set pindirs, 0b00000 [7] - irq clear 7 side 0 + irq clear 7 side 1 .wrap % c-sdk { diff --git a/src/modxo/lpc/lpc_interface.c b/src/modxo/lpc/lpc_interface.c index 310b3b2..dcb0cc1 100644 --- a/src/modxo/lpc/lpc_interface.c +++ b/src/modxo/lpc/lpc_interface.c @@ -60,6 +60,7 @@ typedef struct static void io_write_hdlr(uint32_t address, uint8_t *data); static void io_read_hdlr(uint32_t address, uint8_t *data); +static void gpio_set_max_drivestrength(io_rw_32 gpio, uint32_t strength); LPC_SM_HANDLER lpc_handlers[LPC_OP_TOTAL] = { [LPC_OP_IO_READ] = {.nibbles_read = 4, .cyctype_dir = 0, .handler = io_read_hdlr, .address_len = 16}, @@ -118,8 +119,10 @@ static void lpc_gpio_init(PIO pio) pio_gpio_init(pio, LPC_CLK); gpio_disable_pulls(LPC_CLK); - pio_gpio_init(pio, LPC_LFRAME); gpio_disable_pulls(LPC_LFRAME); + gpio_set_oeover(LPC_LFRAME, 1); + gpio_set_outover(LPC_LFRAME, 2); + pio_gpio_init(pio, LPC_LFRAME); } static void gpio_set_max_drivestrength(io_rw_32 gpio, uint32_t strength) @@ -258,6 +261,7 @@ void lpc_interface_set_callback(LPC_OP_TYPE op, lpc_handler_cback cback) void lpc_interface_start_sm() { + pio_set_sm_mask_enabled(_pio, 15, false); // Disable All State Machines pio_custom_init(_pio, LPC_OP_MEM_READ, offset, _disable_internal_flash); pio_custom_init(_pio, LPC_OP_MEM_WRITE, offset, _disable_internal_flash); @@ -273,28 +277,22 @@ void lpc_interface_start_sm() enable_pio_interrupts(); } -void lpc_interface_init() +void lpc_interface_reset(void) +{ + lpc_interface_start_sm(); +} + +void lpc_interface_init(void) { _pio = pio0; pio_claim_sm_mask(_pio, 15); - if (pio_can_add_program(_pio, &lpc_read_request_program)) - { - offset = pio_add_program(_pio, &lpc_read_request_program); - } - else - { - while (true) - { - gpio_put(PICO_DEFAULT_LED_PIN, 1); - sleep_ms(250); - printf("Error: pio program can not be loaded\n"); - gpio_put(PICO_DEFAULT_LED_PIN, 0); - sleep_ms(250); - } - } + if(!pio_can_add_program(_pio, &lpc_read_request_program)) + pio_remove_program(_pio, &lpc_read_request_program, offset); + + offset = pio_add_program(_pio, &lpc_read_request_program); lpc_gpio_init(_pio); @@ -316,7 +314,7 @@ void lpc_interface_init() gpio_set_max_drivestrength(LPC_LFRAME, PADS_BANK0_GPIO0_DRIVE_VALUE_12MA); gpio_set_max_drivestrength(GPIO_D0, PADS_BANK0_GPIO0_DRIVE_VALUE_12MA); - lpc_interface_start_sm(); + lpc_interface_reset(); } bool lpc_interface_add_io_handler(uint16_t port_base, uint16_t mask, SUPERIO_PORT_CALLBACK_T read_cback, SUPERIO_PORT_CALLBACK_T write_cback) diff --git a/src/modxo/lpc/lpc_interface.h b/src/modxo/lpc/lpc_interface.h index 92d8758..13d013f 100644 --- a/src/modxo/lpc/lpc_interface.h +++ b/src/modxo/lpc/lpc_interface.h @@ -22,7 +22,8 @@ typedef void (*lpc_handler_cback)(uint32_t address, uint8_t *data); typedef void (*SUPERIO_PORT_CALLBACK_T)(uint16_t address, uint8_t *data); void lpc_interface_set_callback(LPC_OP_TYPE op, lpc_handler_cback cback); -void lpc_interface_init(); +void lpc_interface_reset(void); +void lpc_interface_init(void); void lpc_interface_disable_onboard_flash(bool disable); void lpc_interface_start_sm(void); bool lpc_interface_add_io_handler(uint16_t port_base, uint16_t mask, SUPERIO_PORT_CALLBACK_T read_cback, SUPERIO_PORT_CALLBACK_T write_cback); diff --git a/src/modxo/modxo.c b/src/modxo/modxo.c index 6b407ca..8ea7216 100644 --- a/src/modxo/modxo.c +++ b/src/modxo/modxo.c @@ -44,27 +44,11 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "ws2812/ws2812.h" #include "legacy_display/legacy_display.h" #include "hardware/watchdog.h" +#include "hardware/clocks.h" +#include "tusb.h" extern uint8_t current_led_color; -static void modxo_lpcmem_init() -{ - flashrom_init(); -} - -static void modxo_lpcio_init() -{ -#ifndef DEBUG_SUPERIO_DISABLED - lpc47m152_init(); - uart_16550_init(); -#endif - - data_store_init(); - ws2812_init(); - legacy_display_init(); - modxo_ports_init(); -} - void modxo_poll_core1() { modxo_ports_poll(); @@ -86,8 +70,7 @@ void modxo_lpc_reset_off() ws2812_set_color(LedColorOff); current_led_color = color; - // Reset State Machines - lpc_interface_start_sm(); + modxo_reset(); } void modxo_lpc_reset_on() @@ -107,15 +90,33 @@ void software_reset() void modxo_low_power_mode() { // Modxo sleep + set_sys_clock_khz(SYS_FREQ_DEFAULT, true); // Modxo reset - software_reset(); + if(!tud_cdc_connected()) + software_reset(); } -void modxo_init() +void modxo_reset() +{ + //lpc_interface_reset(); +#ifndef DEBUG_SUPERIO_DISABLED + lpc47m152_reset(); +#endif + modxo_ports_reset(); +} + +void modxo_init(void) { config_nvm_init(); + flashrom_init(); lpc_interface_init(); - modxo_lpcmem_init(); - modxo_lpcio_init(); +#ifndef DEBUG_SUPERIO_DISABLED + lpc47m152_init(); + uart_16550_init(); +#endif + data_store_init(); + ws2812_init(); + legacy_display_init(); + modxo_ports_init(); } \ No newline at end of file diff --git a/src/modxo/modxo.h b/src/modxo/modxo.h index c337b1b..3314153 100644 --- a/src/modxo/modxo.h +++ b/src/modxo/modxo.h @@ -8,10 +8,21 @@ Copyright (c) 2024, Shalx #include "hardware/pio.h" -void modxo_init(); +#if PICO_RP2350 + #define SYS_FREQ_DEFAULT (150 * 1000) + #define SYS_FREQ_IN_KHZ (266 * 1000) +#else + #define SYS_FREQ_DEFAULT (133 * 1000) + #define SYS_FREQ_IN_KHZ (266 * 1000) +#endif + + +void modxo_reset(void); +void modxo_init(void); void modxo_poll_core1(void); void modxo_poll_core0(void); void modxo_lpc_reset_off(void); void modxo_lpc_reset_on(void); void modxo_low_power_mode(void); +void modxo_enable_lpm(bool enable); diff --git a/src/modxo/modxo_ports.c b/src/modxo/modxo_ports.c index 7cc1d5a..4994d39 100644 --- a/src/modxo/modxo_ports.c +++ b/src/modxo/modxo_ports.c @@ -209,10 +209,15 @@ void modxo_ports_poll(void) } } -void modxo_ports_init() +void modxo_ports_reset(void) { - lpc_interface_add_io_handler(MODXO_REGISTER_LCD_COMMAND, 0xFFF8, read_handler, write_handler); _program_sector_number = -1; _erase_sector_number = -1; cmd_byte_idx = 0; } + +void modxo_ports_init(void) +{ + lpc_interface_add_io_handler(MODXO_REGISTER_LCD_COMMAND, 0xFFF8, read_handler, write_handler); + modxo_ports_reset(); +} diff --git a/src/modxo/modxo_ports.h b/src/modxo/modxo_ports.h index e003595..0160ab0 100644 --- a/src/modxo/modxo_ports.h +++ b/src/modxo/modxo_ports.h @@ -71,4 +71,5 @@ int modxo_ports_get_program_sector(); void modxo_ports_erase_done(void); void modxo_ports_program_done(void); void modxo_ports_poll(void); -void modxo_ports_init(); +void modxo_ports_reset(void); +void modxo_ports_init(void); diff --git a/src/modxo/superio/LPC47M152.c b/src/modxo/superio/LPC47M152.c index 6281acf..686aa0b 100644 --- a/src/modxo/superio/LPC47M152.c +++ b/src/modxo/superio/LPC47M152.c @@ -31,8 +31,10 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "hardware/irq.h" #include "pico/multicore.h" #include "hardware/structs/bus_ctrl.h" +#include "../modxo_debug.h" #include "../lpc/lpc_interface.h" +#include "uart_16550.h" #include "tusb.h" #define ENTER_CONFIGURATION_MODE_VALUE 0x55 @@ -49,77 +51,77 @@ static struct static void lpc47m152_write_handler(uint16_t address, uint8_t *data) { - if (tud_cdc_connected()) + switch (address) { - switch (address) + case 0x002E: + if (lpc47m152_regs.config_mode == false) { - case 0x002E: - if (lpc47m152_regs.config_mode == false) + if (*data == ENTER_CONFIGURATION_MODE_VALUE) { - if (*data == ENTER_CONFIGURATION_MODE_VALUE) - { - lpc47m152_regs.config_mode = true; - } + lpc47m152_regs.config_mode = true; + } + } + else + { + if (*data == EXIT_CONFIGURATION_MODE_VALUE) + { + lpc47m152_regs.config_mode = false; + uart_16550_reset(); } else { - if (*data == EXIT_CONFIGURATION_MODE_VALUE) - { - lpc47m152_regs.config_mode = false; - } - else - { - lpc47m152_regs.index_port = *data; - } + lpc47m152_regs.index_port = *data; } - break; - - case 0x002F: - // Not used - /* if(lpc47m152_regs.config_mode == true) - { - switch(lpc47m152_regs.index_port) - { - - } - } - */ - break; } + break; + + case 0x002F: + // Not used + /* if(lpc47m152_regs.config_mode == true) + { + switch(lpc47m152_regs.index_port) + { + + } + } + */ + break; } } static void lpc47m152_read_handler(uint16_t address, uint8_t *data) { - if (tud_cdc_connected()) + if (lpc47m152_regs.config_mode) { - if (lpc47m152_regs.config_mode) + switch (address) { - switch (address) + case 0x2E: + *data = lpc47m152_regs.index_port; + break; + case 0x2F: + switch (lpc47m152_regs.index_port) { - case 0x2E: - *data = lpc47m152_regs.index_port; + case 0x26: + *data = tud_cdc_connected() ? CONFIG_ADDRESS_L : 0xff; break; - case 0x2F: - switch (lpc47m152_regs.index_port) - { - case 0x26: - *data = CONFIG_ADDRESS_L; - break; - case 0x27: - *data = CONFIG_ADDRESS_H; - break; - } + case 0x27: + *data = tud_cdc_connected() ? CONFIG_ADDRESS_H : 0xff; break; } + break; } } } -void lpc47m152_init(void) -{ +void lpc47m152_reset(void) { lpc47m152_regs.config_mode = false; lpc47m152_regs.index_port = 0; lpc47m152_regs.device_id = 0; + uart_16550_reset(); +} + +void lpc47m152_init(void) +{ + lpc47m152_reset(); lpc_interface_add_io_handler(0x002E, 0xFFFE, lpc47m152_read_handler, lpc47m152_write_handler); // LPC47M152(superio) port emulation } diff --git a/src/modxo/superio/LPC47M152.h b/src/modxo/superio/LPC47M152.h index 7f32638..c2f8d16 100644 --- a/src/modxo/superio/LPC47M152.h +++ b/src/modxo/superio/LPC47M152.h @@ -6,4 +6,5 @@ Copyright (c) 2024, Shalx */ #pragma once +void lpc47m152_reset(void); void lpc47m152_init(void); diff --git a/src/modxo/superio/uart_16550.c b/src/modxo/superio/uart_16550.c index 8349dcb..3015344 100644 --- a/src/modxo/superio/uart_16550.c +++ b/src/modxo/superio/uart_16550.c @@ -35,17 +35,19 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "../lpc/lpc_interface.h" #include "tusb.h" -void uart_16550_port_write(uint16_t address, uint8_t *data) +static void uart_16550_port_write(uint16_t address, uint8_t *data) { - // UART Ports - if ((address == 0x3F8)) - { - if (tud_cdc_connected()) + if(tud_cdc_connected()) { + // UART Ports + if ((address == 0x3F8)) + { tud_cdc_write(data, 1); + tud_cdc_write_flush(); + } } } -void uart_16550_port_read(uint16_t address, uint8_t *data) +static void uart_16550_port_read(uint16_t address, uint8_t *data) { // UART Ports if (tud_cdc_connected()) @@ -73,6 +75,15 @@ void uart_16550_port_read(uint16_t address, uint8_t *data) } } +void uart_16550_reset(void) +{ + if(tud_cdc_connected()) + { + tud_cdc_write_clear(); + tud_cdc_read_flush(); + } +} + void uart_16550_init(void) { lpc_interface_add_io_handler(0x03F8, 0xFFF8, uart_16550_port_read, uart_16550_port_write); // 16550 Uart port emulation diff --git a/src/modxo/superio/uart_16550.h b/src/modxo/superio/uart_16550.h index a436be4..867c283 100644 --- a/src/modxo/superio/uart_16550.h +++ b/src/modxo/superio/uart_16550.h @@ -7,4 +7,5 @@ Copyright (c) 2024, Shalx #pragma once void uart_16550_init(void); +void uart_16550_reset(void); diff --git a/src/modxo/ws2812/ws2812.c b/src/modxo/ws2812/ws2812.c index 094834e..e546062 100644 --- a/src/modxo/ws2812/ws2812.c +++ b/src/modxo/ws2812/ws2812.c @@ -44,7 +44,7 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include #define WS2812_PORT_BASE MODXO_REGISTER_LED_COMMAND -#define WS2812_ADDRESS_MASK 0xFE +#define WS2812_ADDRESS_MASK 0xFFFE #define WS2812_COMMAND_PORT WS2812_PORT_BASE #define WS2812_DATA_PORT WS2812_PORT_BASE + 1 diff --git a/src/modxo/ws2812/ws2812.h b/src/modxo/ws2812/ws2812.h index 746ac87..88838e3 100644 --- a/src/modxo/ws2812/ws2812.h +++ b/src/modxo/ws2812/ws2812.h @@ -10,7 +10,7 @@ typedef enum { LedColorOff = 0, LedColorRed = 1, - LedColorGgreen = 2, + LedColorGreen = 2, LedColorAmber = 3, LedColorBlue = 4, LedColorPurple = 5,