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cf2acc1001
This fixes the build.
35 lines
545 B
NASM
35 lines
545 B
NASM
GetSRAMBank:: ; 2fcb
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; load sram bank a
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; if invalid bank, sram is disabled
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cp NUM_SRAM_BANKS
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jr c, OpenSRAM
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jr CloseSRAM
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; 2fd1
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OpenSRAM:: ; 2fd1
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; switch to sram bank a
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push af
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; latch clock data
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ld a, 1
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ld [MBC3LatchClock], a
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; enable sram/clock write
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ld a, SRAM_ENABLE
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ld [MBC3SRamEnable], a
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; select sram bank
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pop af
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ld [MBC3SRamBank], a
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ret
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; 2fe1
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CloseSRAM:: ; 2fe1
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push af
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ld a, SRAM_DISABLE
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; reset clock latch for next time
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ld [MBC3LatchClock], a
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; disable sram/clock write
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ld [MBC3SRamEnable], a
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pop af
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ret
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; 2fec
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