2013-09-08 00:14:24 -07:00
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; The CGB hardware introduces Double Speed Mode.
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; While active, the clock speed is doubled.
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; The hardware can switch between normal speed
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; and double speed at any time, but LCD output
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; collapses during the switch.
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2018-06-24 07:09:41 -07:00
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DoubleSpeed::
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2013-09-08 00:14:24 -07:00
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ld hl, rKEY1
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bit 7, [hl]
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jr z, SwitchSpeed
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ret
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2018-06-24 07:09:41 -07:00
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NormalSpeed::
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2013-09-08 00:14:24 -07:00
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ld hl, rKEY1
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bit 7, [hl]
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ret z
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2018-06-24 07:09:41 -07:00
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SwitchSpeed::
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2013-09-08 00:14:24 -07:00
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set 0, [hl]
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xor a
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2018-08-25 11:28:22 -07:00
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ldh [rIF], a
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ldh [rIE], a
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2013-09-08 00:14:24 -07:00
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ld a, $30
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2018-08-25 11:28:22 -07:00
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ldh [rJOYP], a
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2013-09-08 00:14:24 -07:00
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stop ; rgbasm adds a nop after this instruction by default
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ret
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