diff --git a/nogo.yaml b/nogo.yaml index 867a0782f..b2572adce 100644 --- a/nogo.yaml +++ b/nogo.yaml @@ -89,17 +89,26 @@ global: analyzers: asmdecl: generated: - exclude: [".*"] # Disabled. + suppress: + # Non-conventional functions. + - "\\[amd64\\].*sysret: RET without writing to 8-byte" + - "\\[amd64\\].*iret: RET without writing to 8-byte" + - "\\[amd64\\].*exception: use of .* points beyond argument frame" + - "\\[arm64\\].*HaltEl1ExceptionAndResume: unknown variable" + - "\\[arm64\\].*HaltEl1ExceptionAndResume: use of .* points beyond argument frame" external: exclude: [".*"] # Disabled. internal: suppress: - # Suppress for now, will be fixed separately. - - ".*unknown variable.*" - - ".*RET without writing.*" - - ".*wrong argument size.*" - - ".*missing Go declaration.*" - - ".*invalid.*" + # Valid reasons to break the rules. + - "xsetbv: invalid MOVL of value" + - "xsetbv: invalid offset value" + - "xgetbv: invalid MOVL of ret" + - "xgetbv: invalid offset ret" + - "wrmsr: invalid MOVL of value" + - "wrmsr: invalid offset value" + - "rdmsr: invalid MOVL of ret" + - "rdmsr: invalid offset ret" assign: external: exclude: diff --git a/pkg/atomicbitops/atomicbitops_arm64.s b/pkg/atomicbitops/atomicbitops_arm64.s index b2b950c74..cf922117d 100644 --- a/pkg/atomicbitops/atomicbitops_arm64.s +++ b/pkg/atomicbitops/atomicbitops_arm64.s @@ -17,7 +17,7 @@ #include "textflag.h" TEXT ·andUint32(SB),NOSPLIT,$0-12 - MOVD ptr+0(FP), R0 + MOVD addr+0(FP), R0 MOVW val+8(FP), R1 MOVBU ·arm64HasATOMICS(SB), R4 CBZ R4, load_store_loop @@ -32,7 +32,7 @@ load_store_loop: RET TEXT ·orUint32(SB),NOSPLIT,$0-12 - MOVD ptr+0(FP), R0 + MOVD addr+0(FP), R0 MOVW val+8(FP), R1 MOVBU ·arm64HasATOMICS(SB), R4 CBZ R4, load_store_loop @@ -46,7 +46,7 @@ load_store_loop: RET TEXT ·xorUint32(SB),NOSPLIT,$0-12 - MOVD ptr+0(FP), R0 + MOVD addr+0(FP), R0 MOVW val+8(FP), R1 MOVBU ·arm64HasATOMICS(SB), R4 CBZ R4, load_store_loop @@ -66,7 +66,7 @@ TEXT ·compareAndSwapUint32(SB),NOSPLIT,$0-20 MOVBU ·arm64HasATOMICS(SB), R4 CBZ R4, load_store_loop CASALW R1, (R0), R2 - MOVW R1, prev+16(FP) + MOVW R1, ret+16(FP) RET load_store_loop: LDAXRW (R0), R3 @@ -75,11 +75,11 @@ load_store_loop: STLXRW R2, (R0), R4 CBNZ R4, load_store_loop ok: - MOVW R3, prev+16(FP) + MOVW R3, ret+16(FP) RET TEXT ·andUint64(SB),NOSPLIT,$0-16 - MOVD ptr+0(FP), R0 + MOVD addr+0(FP), R0 MOVD val+8(FP), R1 MOVBU ·arm64HasATOMICS(SB), R4 CBZ R4, load_store_loop @@ -94,7 +94,7 @@ load_store_loop: RET TEXT ·orUint64(SB),NOSPLIT,$0-16 - MOVD ptr+0(FP), R0 + MOVD addr+0(FP), R0 MOVD val+8(FP), R1 MOVBU ·arm64HasATOMICS(SB), R4 CBZ R4, load_store_loop @@ -108,7 +108,7 @@ load_store_loop: RET TEXT ·xorUint64(SB),NOSPLIT,$0-16 - MOVD ptr+0(FP), R0 + MOVD addr+0(FP), R0 MOVD val+8(FP), R1 MOVBU ·arm64HasATOMICS(SB), R4 CBZ R4, load_store_loop @@ -128,7 +128,7 @@ TEXT ·compareAndSwapUint64(SB),NOSPLIT,$0-32 MOVBU ·arm64HasATOMICS(SB), R4 CBZ R4, load_store_loop CASALD R1, (R0), R2 - MOVD R1, prev+24(FP) + MOVD R1, ret+24(FP) RET load_store_loop: LDAXR (R0), R3 @@ -137,5 +137,5 @@ load_store_loop: STLXR R2, (R0), R4 CBNZ R4, load_store_loop ok: - MOVD R3, prev+24(FP) + MOVD R3, ret+24(FP) RET diff --git a/pkg/cpuid/native_amd64.s b/pkg/cpuid/native_amd64.s index b771937b9..d7a28abf1 100644 --- a/pkg/cpuid/native_amd64.s +++ b/pkg/cpuid/native_amd64.s @@ -15,11 +15,11 @@ #include "textflag.h" TEXT ·native(SB),NOSPLIT,$0-24 - MOVL ax+0(FP), AX - MOVL cx+4(FP), CX + MOVL arg_Eax+0(FP), AX + MOVL arg_Ecx+4(FP), CX CPUID - MOVL AX, ret0+8(FP) - MOVL BX, ret1+12(FP) - MOVL CX, ret2+16(FP) - MOVL DX, ret3+20(FP) + MOVL AX, ret_Eax+8(FP) + MOVL BX, ret_Ebx+12(FP) + MOVL CX, ret_Ecx+16(FP) + MOVL DX, ret_Edx+20(FP) RET diff --git a/pkg/ring0/entry_amd64.s b/pkg/ring0/entry_amd64.s index f30f48de6..bf3f18053 100644 --- a/pkg/ring0/entry_amd64.s +++ b/pkg/ring0/entry_amd64.s @@ -185,11 +185,6 @@ TEXT ·HaltAndWriteFSBase(SB),NOSPLIT,$8-8 RET -// See entry_amd64.go. -TEXT ·swapgs(SB),NOSPLIT,$0 - SWAP_GS() - RET - // jumpToKernel changes execution to the kernel address space. // // This works by changing the return value to the kernel version. @@ -268,7 +263,7 @@ do_iret: done_sysret_or_iret: MOVQ 24(SP), AX // vector ADDQ $32, SP - MOVQ AX, vector+40(FP) + MOVQ AX, ret+40(FP) // Save application floating point state. MOVQ fpState+16(FP), DI diff --git a/pkg/ring0/entry_arm64.s b/pkg/ring0/entry_arm64.s index 7373badaa..3e8526fdc 100644 --- a/pkg/ring0/entry_arm64.s +++ b/pkg/ring0/entry_arm64.s @@ -498,7 +498,7 @@ TEXT ·HaltEl1SvcAndResume(SB),NOSPLIT,$0 B ·kernelExitToEl1(SB) // Resume. // HaltEl1ExceptionAndResume calls Hooks.KernelException and resume. -TEXT ·HaltEl1ExceptionAndResume(SB),NOSPLIT,$0-8 +TEXT ·HaltEl1ExceptionAndResume(SB),NOSPLIT,$0 WORD $0xd538d092 // MRS TPIDR_EL1, R18 MOVD CPU_SELF(RSV_REG), R3 // Load vCPU. MOVD R3, 8(RSP) // First argument (vCPU). @@ -513,12 +513,6 @@ TEXT ·Shutdown(SB),NOSPLIT,$0 MOVD $0x84000009, R0 HVC $0 -// See kernel.go. -TEXT ·Current(SB),NOSPLIT,$0-8 - MOVD CPU_SELF(RSV_REG), R8 - MOVD R8, ret+0(FP) - RET - #define STACK_FRAME_SIZE 32 // kernelExitToEl0 is the entrypoint for application in guest_el0. diff --git a/pkg/ring0/lib_amd64.go b/pkg/ring0/lib_amd64.go index c134fcb7f..ccd183346 100644 --- a/pkg/ring0/lib_amd64.go +++ b/pkg/ring0/lib_amd64.go @@ -22,6 +22,21 @@ import ( "gvisor.dev/gvisor/pkg/hostarch" ) +// fxrstor restores floating point state. +func fxrstor(addr uintptr) + +// xrstor restores floating point state. +func xrstor(addr uintptr) + +// fxsave saves floating point state. +func fxsave(addr uintptr) + +// xsave saves floating point state. +func xsave(addr uintptr) + +// xsaveopt saves floating point state. +func xsaveopt(addr uintptr) + // writeFS sets the FS base address (selects one of wrfsbase or wrfsmsr). func writeFS(addr uintptr) diff --git a/pkg/ring0/lib_amd64.s b/pkg/ring0/lib_amd64.s index 0f283aaae..4dc79d0cc 100644 --- a/pkg/ring0/lib_amd64.s +++ b/pkg/ring0/lib_amd64.s @@ -200,7 +200,7 @@ TEXT ·fninit(SB),NOSPLIT,$0 // xsetbv // TEXT ·xsetbv(SB),NOSPLIT,$0-16 - MOVL reg+0(FP), CX + MOVQ reg+0(FP), CX MOVL value+8(FP), AX MOVL value+12(FP), DX BYTE $0x0f; BYTE $0x01; BYTE $0xd1; @@ -213,7 +213,7 @@ TEXT ·xsetbv(SB),NOSPLIT,$0-16 // xgetbv // TEXT ·xgetbv(SB),NOSPLIT,$0-16 - MOVL reg+0(FP), CX + MOVQ reg+0(FP), CX BYTE $0x0f; BYTE $0x01; BYTE $0xd0; MOVL AX, ret+8(FP) MOVL DX, ret+12(FP) @@ -226,7 +226,7 @@ TEXT ·xgetbv(SB),NOSPLIT,$0-16 // wrmsr // TEXT ·wrmsr(SB),NOSPLIT,$0-16 - MOVL reg+0(FP), CX + MOVQ reg+0(FP), CX MOVL value+8(FP), AX MOVL value+12(FP), DX BYTE $0x0f; BYTE $0x30; @@ -239,7 +239,7 @@ TEXT ·wrmsr(SB),NOSPLIT,$0-16 // rdmsr // TEXT ·rdmsr(SB),NOSPLIT,$0-16 - MOVL reg+0(FP), CX + MOVQ reg+0(FP), CX BYTE $0x0f; BYTE $0x32; MOVL AX, ret+8(FP) MOVL DX, ret+12(FP) diff --git a/pkg/ring0/lib_arm64.s b/pkg/ring0/lib_arm64.s index 69ebaf519..fd499debf 100644 --- a/pkg/ring0/lib_arm64.s +++ b/pkg/ring0/lib_arm64.s @@ -56,31 +56,31 @@ TEXT ·FlushTlbAll(SB),NOSPLIT,$0 TEXT ·CPACREL1(SB),NOSPLIT,$0-8 WORD $0xd5381041 // MRS CPACR_EL1, R1 - MOVD R1, ret+0(FP) + MOVD R1, value+0(FP) RET TEXT ·GetFPCR(SB),NOSPLIT,$0-8 MOVD FPCR, R1 - MOVD R1, ret+0(FP) + MOVD R1, value+0(FP) RET TEXT ·GetFPSR(SB),NOSPLIT,$0-8 MOVD FPSR, R1 - MOVD R1, ret+0(FP) + MOVD R1, value+0(FP) RET TEXT ·SetFPCR(SB),NOSPLIT,$0-8 - MOVD addr+0(FP), R1 + MOVD value+0(FP), R1 MOVD R1, FPCR RET TEXT ·SetFPSR(SB),NOSPLIT,$0-8 - MOVD addr+0(FP), R1 + MOVD value+0(FP), R1 MOVD R1, FPSR RET TEXT ·SaveVRegs(SB),NOSPLIT,$0-8 - MOVD addr+0(FP), R0 + MOVD arg+0(FP), R0 // Skip aarch64_ctx, fpsr, fpcr. ADD $16, R0, R0 @@ -105,7 +105,7 @@ TEXT ·SaveVRegs(SB),NOSPLIT,$0-8 RET TEXT ·LoadVRegs(SB),NOSPLIT,$0-8 - MOVD addr+0(FP), R0 + MOVD arg+0(FP), R0 // Skip aarch64_ctx, fpsr, fpcr. ADD $16, R0, R0 @@ -130,7 +130,7 @@ TEXT ·LoadVRegs(SB),NOSPLIT,$0-8 RET TEXT ·LoadFloatingPoint(SB),NOSPLIT,$0-8 - MOVD addr+0(FP), R0 + MOVD arg+0(FP), R0 MOVD 0(R0), R1 MOVD R1, FPSR @@ -159,7 +159,7 @@ TEXT ·LoadFloatingPoint(SB),NOSPLIT,$0-8 RET TEXT ·SaveFloatingPoint(SB),NOSPLIT,$0-8 - MOVD addr+0(FP), R0 + MOVD arg+0(FP), R0 MOVD FPSR, R1 MOVD R1, 0(R0) diff --git a/pkg/sentry/arch/fpu/fpu_amd64.s b/pkg/sentry/arch/fpu/fpu_amd64.s index 6c10336e7..7ce63092c 100644 --- a/pkg/sentry/arch/fpu/fpu_amd64.s +++ b/pkg/sentry/arch/fpu/fpu_amd64.s @@ -31,14 +31,14 @@ // point registers. // // Preconditions: data is zeroed. -TEXT ·initX86FPState(SB), $24-16 +TEXT ·initX86FPState(SB), $24-9 // Save MXCSR (callee-save) STMXCSR mxcsr-8(SP) // Save x87 CW (callee-save) FSTCW cw-16(SP) - MOVQ fpState+0(FP), DI + MOVQ data+0(FP), DI // Do we use xsave? MOVBQZX useXsave+8(FP), AX diff --git a/pkg/sentry/hostcpu/getcpu_amd64.s b/pkg/sentry/hostcpu/getcpu_amd64.s index aa00316da..1f0609d75 100644 --- a/pkg/sentry/hostcpu/getcpu_amd64.s +++ b/pkg/sentry/hostcpu/getcpu_amd64.s @@ -14,11 +14,11 @@ #include "textflag.h" -// func GetCPU() (cpu uint32) +// func GetCPU() uint32 TEXT ·GetCPU(SB), NOSPLIT, $0-4 BYTE $0x0f; BYTE $0x01; BYTE $0xf9; // RDTSCP // On Linux, the bottom 12 bits of IA32_TSC_AUX are CPU and the upper 20 // are node. See arch/x86/entry/vdso/vma.c:vgetcpu_cpu_init(). ANDL $0xfff, CX - MOVL CX, cpu+0(FP) + MOVL CX, ret+0(FP) RET diff --git a/pkg/sentry/hostcpu/getcpu_arm64.s b/pkg/sentry/hostcpu/getcpu_arm64.s index caf9abb89..bdbcc5d8d 100644 --- a/pkg/sentry/hostcpu/getcpu_arm64.s +++ b/pkg/sentry/hostcpu/getcpu_arm64.s @@ -17,10 +17,10 @@ // GetCPU makes the getcpu(unsigned *cpu, unsigned *node, NULL) syscall for // the lack of an optimazed way of getting the current CPU number on arm64. -// func GetCPU() (cpu uint32) +// func GetCPU() uint32 TEXT ·GetCPU(SB), NOSPLIT, $0-4 - MOVW ZR, cpu+0(FP) - MOVD $cpu+0(FP), R0 + MOVW ZR, ret+0(FP) + MOVD $ret+0(FP), R0 MOVD $0x0, R1 // unused MOVD $0x0, R2 // unused MOVD $0xA8, R8 // SYS_GETCPU diff --git a/pkg/sentry/platform/kvm/bluepill_amd64.s b/pkg/sentry/platform/kvm/bluepill_amd64.s index 71a3ca560..450ccf5de 100644 --- a/pkg/sentry/platform/kvm/bluepill_amd64.s +++ b/pkg/sentry/platform/kvm/bluepill_amd64.s @@ -43,7 +43,7 @@ // See bluepill.go. TEXT ·bluepill(SB),NOSPLIT,$0 begin: - MOVQ vcpu+0(FP), AX + MOVQ arg+0(FP), AX LEAQ VCPU_CPU(AX), BX // The gorountine stack will be changed in guest which renders diff --git a/pkg/sentry/platform/kvm/bluepill_arm64.s b/pkg/sentry/platform/kvm/bluepill_arm64.s index 9690e3772..901cb5526 100644 --- a/pkg/sentry/platform/kvm/bluepill_arm64.s +++ b/pkg/sentry/platform/kvm/bluepill_arm64.s @@ -38,19 +38,19 @@ // getTLS returns the value of TPIDR_EL0 register. TEXT ·getTLS(SB),NOSPLIT,$0-8 MRS TPIDR_EL0, R1 - MOVD R1, ret+0(FP) + MOVD R1, value+0(FP) RET // setTLS writes the TPIDR_EL0 value. TEXT ·setTLS(SB),NOSPLIT,$0-8 - MOVD addr+0(FP), R1 + MOVD value+0(FP), R1 MSR R1, TPIDR_EL0 RET // See bluepill.go. TEXT ·bluepill(SB),NOSPLIT,$0 begin: - MOVD vcpu+0(FP), R8 + MOVD arg+0(FP), R8 MOVD $VCPU_CPU(R8), R9 ORR $0xffff000000000000, R9, R9 // Trigger sigill. diff --git a/pkg/sentry/platform/kvm/testutil/testutil_amd64.s b/pkg/sentry/platform/kvm/testutil/testutil_amd64.s index 65e7c05ea..d3e218a16 100644 --- a/pkg/sentry/platform/kvm/testutil/testutil_amd64.s +++ b/pkg/sentry/platform/kvm/testutil/testutil_amd64.s @@ -65,7 +65,7 @@ TEXT ·AddrOfSpinLoop(SB), $0-8 MOVQ AX, ret+0(FP) RET -TEXT ·FloatingPointWorks(SB),NOSPLIT,$0-8 +TEXT ·FloatingPointWorks(SB),NOSPLIT,$0 NO_LOCAL_POINTERS MOVQ $1, AX MOVQ AX, X0 diff --git a/pkg/sentry/platform/kvm/testutil/testutil_arm64.s b/pkg/sentry/platform/kvm/testutil/testutil_arm64.s index 1d7c4d02f..a4c50cc3d 100644 --- a/pkg/sentry/platform/kvm/testutil/testutil_arm64.s +++ b/pkg/sentry/platform/kvm/testutil/testutil_arm64.s @@ -50,7 +50,7 @@ start: HLT B start -TEXT ·AddOfHaltLoop(SB),NOSPLIT,$0-8 +TEXT ·AddrOfHaltLoop(SB),NOSPLIT,$0-8 MOVD $·haltLoop(SB), R0 MOVD R0, ret+0(FP) RET @@ -75,7 +75,7 @@ TEXT ·AddrOfSpinLoop(SB),NOSPLIT,$0-8 MOVD R0, ret+0(FP) RET -TEXT ·TLSWorks(SB),NOSPLIT,$0-8 +TEXT ·TLSWorks(SB),NOSPLIT,$0 NO_LOCAL_POINTERS MOVD $0x6789, R5 MSR R5, TPIDR_EL0 @@ -91,7 +91,7 @@ isNaN: MOVD $0, ret+0(FP) RET -TEXT ·FloatingPointWorks(SB),NOSPLIT,$0-8 +TEXT ·FloatingPointWorks(SB),NOSPLIT,$0 NO_LOCAL_POINTERS // gc will touch fpsimd, so we should test it. // such as in . diff --git a/pkg/sentry/time/muldiv_amd64.s b/pkg/sentry/time/muldiv_amd64.s index 028c6684e..001009f1b 100644 --- a/pkg/sentry/time/muldiv_amd64.s +++ b/pkg/sentry/time/muldiv_amd64.s @@ -34,11 +34,11 @@ TEXT ·muldiv64(SB),NOSPLIT,$0-33 // Divide DX:AX by CX. DIVQ CX - MOVQ AX, result+24(FP) - MOVB $1, ok+32(FP) + MOVQ AX, ret+24(FP) + MOVB $1, ret1+32(FP) RET overflow: - MOVQ $0, result+24(FP) - MOVB $0, ok+32(FP) + MOVQ $0, ret+24(FP) + MOVB $0, ret1+32(FP) RET diff --git a/pkg/sentry/time/muldiv_arm64.s b/pkg/sentry/time/muldiv_arm64.s index 8afc62d53..bb559f50a 100644 --- a/pkg/sentry/time/muldiv_arm64.s +++ b/pkg/sentry/time/muldiv_arm64.s @@ -36,12 +36,12 @@ TEXT ·muldiv64(SB),NOSPLIT,$40-33 MOVD R2, 24(RSP) CALL ·divWW(SB) MOVD 32(RSP), R0 - MOVD R0, result+24(FP) + MOVD R0, ret+24(FP) MOVD $1, R0 - MOVB R0, ok+32(FP) + MOVB R0, ret1+32(FP) RET overflow: - MOVD ZR, result+24(FP) - MOVB ZR, ok+32(FP) + MOVD ZR, ret+24(FP) + MOVB ZR, ret1+32(FP) RET diff --git a/pkg/tcpip/link/rawfile/blockingpoll_amd64.s b/pkg/tcpip/link/rawfile/blockingpoll_amd64.s index f2c230720..11e8d1970 100644 --- a/pkg/tcpip/link/rawfile/blockingpoll_amd64.s +++ b/pkg/tcpip/link/rawfile/blockingpoll_amd64.s @@ -29,13 +29,13 @@ TEXT ·BlockingPoll(SB),NOSPLIT,$0-40 SYSCALL CMPQ AX, $0xfffffffffffff002 JLS ok - MOVQ $-1, n+24(FP) + MOVQ $-1, ret+24(FP) NEGQ AX - MOVQ AX, err+32(FP) + MOVQ AX, ret1+32(FP) CALL ·callExitsyscall(SB) RET ok: - MOVQ AX, n+24(FP) - MOVQ $0, err+32(FP) + MOVQ AX, ret+24(FP) + MOVQ $0, ret1+32(FP) CALL ·callExitsyscall(SB) RET diff --git a/pkg/tcpip/link/rawfile/blockingpoll_arm64.s b/pkg/tcpip/link/rawfile/blockingpoll_arm64.s index 8807586c7..99c65f895 100644 --- a/pkg/tcpip/link/rawfile/blockingpoll_arm64.s +++ b/pkg/tcpip/link/rawfile/blockingpoll_arm64.s @@ -30,13 +30,13 @@ TEXT ·BlockingPoll(SB),NOSPLIT,$0-40 CMP $0xfffffffffffff002, R0 BLS ok MOVD $-1, R1 - MOVD R1, n+24(FP) + MOVD R1, ret+24(FP) NEG R0, R0 - MOVD R0, err+32(FP) + MOVD R0, ret1+32(FP) BL ·callExitsyscall(SB) RET ok: - MOVD R0, n+24(FP) - MOVD $0, err+32(FP) + MOVD R0, ret+24(FP) + MOVD $0, ret1+32(FP) BL ·callExitsyscall(SB) RET