diff --git a/pkg/abi/nvgpu/classes.go b/pkg/abi/nvgpu/classes.go index 6af3d2930..99c30b4ad 100644 --- a/pkg/abi/nvgpu/classes.go +++ b/pkg/abi/nvgpu/classes.go @@ -26,6 +26,7 @@ const ( NV01_DEVICE_0 = 0x00000080 NV_MEMORY_FABRIC = 0x000000f8 NV20_SUBDEVICE_0 = 0x00002080 + NV2081_BINAPI = 0x00002081 NV50_MEMORY_VIRTUAL = 0x000050a0 NV50_P2P = 0x0000503b NV50_THIRD_PARTY_P2P = 0x0000503c @@ -50,6 +51,14 @@ const ( HOPPER_COMPUTE_A = 0x0000cbc0 ) +// NV2081_ALLOC_PARAMETERS is the alloc params type for NV2081_BINAPI, from +// src/common/sdk/nvidia/inc/class/cl2081.h. +// +// +marshal +type NV2081_ALLOC_PARAMETERS struct { + Reserved uint32 +} + // NV0005_ALLOC_PARAMETERS is the alloc params type for NV01_EVENT_OS_EVENT, // from src/common/sdk/nvidia/inc/class/cl0005.h. // @@ -118,6 +127,16 @@ type NV_MEMORY_ALLOCATION_PARAMS struct { Tag uint32 } +// NV_MEMORY_ALLOCATION_PARAMS_V545 is the updated version of +// NV_MEMORY_ALLOCATION_PARAMS since 545.23.06. +// +// +marshal +type NV_MEMORY_ALLOCATION_PARAMS_V545 struct { + NV_MEMORY_ALLOCATION_PARAMS + NumaNode int32 + _ uint32 +} + // NV503B_BAR1_P2P_DMA_INFO from src/common/sdk/nvidia/inc/class/cl503b.h. // // +marshal diff --git a/pkg/abi/nvgpu/ctrl.go b/pkg/abi/nvgpu/ctrl.go index c3b4a5ec8..52530f5e3 100644 --- a/pkg/abi/nvgpu/ctrl.go +++ b/pkg/abi/nvgpu/ctrl.go @@ -52,6 +52,8 @@ const ( NV0000_CTRL_CMD_GPU_GET_PCI_INFO = 0x21b NV0000_CTRL_CMD_GPU_QUERY_DRAIN_STATE = 0x279 NV0000_CTRL_CMD_GPU_GET_MEMOP_ENABLE = 0x27b + NV0000_CTRL_CMD_GPU_ASYNC_ATTACH_ID = 0x289 + NV0000_CTRL_CMD_GPU_WAIT_ATTACH_ID = 0x290 ) // From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000syncgpuboost.h: @@ -65,6 +67,7 @@ const ( NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS = 0x127 NV0000_CTRL_CMD_SYSTEM_GET_FABRIC_STATUS = 0x136 NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS_MATRIX = 0x13a + NV0000_CTRL_CMD_SYSTEM_GET_FEATURES = 0x1f0 ) // +marshal @@ -126,6 +129,11 @@ const ( NV0080_CTRL_CMD_HOST_GET_CAPS_V2 = 0x801402 ) +// From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080perf.h: +const ( + NV0080_CTRL_CMD_PERF_CUDA_LIMIT_SET_CONTROL = 0x801909 +) + // From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bus.h: const ( NV2080_CTRL_CMD_BUS_GET_PCI_INFO = 0x20801801 diff --git a/pkg/abi/nvgpu/frontend.go b/pkg/abi/nvgpu/frontend.go index 891ad4c47..c14812966 100644 --- a/pkg/abi/nvgpu/frontend.go +++ b/pkg/abi/nvgpu/frontend.go @@ -26,13 +26,14 @@ const NV_IOCTL_MAGIC = uint32('F') // Note that these are only the IOC_NR part of the ioctl command. const ( // From kernel-open/common/inc/nv-ioctl-numbers.h: - NV_IOCTL_BASE = 200 - NV_ESC_CARD_INFO = NV_IOCTL_BASE + 0 - NV_ESC_REGISTER_FD = NV_IOCTL_BASE + 1 - NV_ESC_ALLOC_OS_EVENT = NV_IOCTL_BASE + 6 - NV_ESC_FREE_OS_EVENT = NV_IOCTL_BASE + 7 - NV_ESC_CHECK_VERSION_STR = NV_IOCTL_BASE + 10 - NV_ESC_SYS_PARAMS = NV_IOCTL_BASE + 14 + NV_IOCTL_BASE = 200 + NV_ESC_CARD_INFO = NV_IOCTL_BASE + 0 + NV_ESC_REGISTER_FD = NV_IOCTL_BASE + 1 + NV_ESC_ALLOC_OS_EVENT = NV_IOCTL_BASE + 6 + NV_ESC_FREE_OS_EVENT = NV_IOCTL_BASE + 7 + NV_ESC_CHECK_VERSION_STR = NV_IOCTL_BASE + 10 + NV_ESC_SYS_PARAMS = NV_IOCTL_BASE + 14 + NV_ESC_WAIT_OPEN_COMPLETE = NV_IOCTL_BASE + 18 // From kernel-open/common/inc/nv-ioctl-numa.h: NV_ESC_NUMA_INFO = NV_IOCTL_BASE + 15 @@ -101,6 +102,15 @@ type IoctlSysParams struct { MemblockSize uint64 } +// IoctlWaitOpenComplete is nv_ioctl_wait_open_complete_t, the parameter type +// for NV_ESC_WAIT_OPEN_COMPLETE. +// +// +marshal +type IoctlWaitOpenComplete struct { + Rc int32 + AdapterStatus uint32 +} + // IoctlNVOS02ParametersWithFD is nv_ioctl_nvos2_parameters_with_fd, the // parameter type for NV_ESC_RM_ALLOC_MEMORY. // @@ -400,6 +410,7 @@ var ( SizeofIoctlFreeOSEvent = uint32((*IoctlFreeOSEvent)(nil).SizeBytes()) SizeofRMAPIVersion = uint32((*RMAPIVersion)(nil).SizeBytes()) SizeofIoctlSysParams = uint32((*IoctlSysParams)(nil).SizeBytes()) + SizeofIoctlWaitOpenComplete = uint32((*IoctlWaitOpenComplete)(nil).SizeBytes()) SizeofIoctlNVOS02ParametersWithFD = uint32((*IoctlNVOS02ParametersWithFD)(nil).SizeBytes()) SizeofNVOS00Parameters = uint32((*NVOS00Parameters)(nil).SizeBytes()) SizeofNVOS21Parameters = uint32((*NVOS21Parameters)(nil).SizeBytes()) diff --git a/pkg/abi/nvgpu/uvm.go b/pkg/abi/nvgpu/uvm.go index 626a322f1..42ec1b670 100644 --- a/pkg/abi/nvgpu/uvm.go +++ b/pkg/abi/nvgpu/uvm.go @@ -147,6 +147,27 @@ func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS) SetRMCtrlFD(fd int32) { p.RMCtrlFD = fd } +// +marshal +type UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550 struct { + Base uint64 + Length uint64 + Offset uint64 + PerGPUAttributes [UVM_MAX_GPUS_V2]UvmGpuMappingAttributes + GPUAttributesCount uint64 + RMCtrlFD int32 + HClient Handle + HMemory Handle + RMStatus uint32 +} + +func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550) GetRMCtrlFD() int32 { + return p.RMCtrlFD +} + +func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550) SetRMCtrlFD(fd int32) { + p.RMCtrlFD = fd +} + // +marshal type UVM_FREE_PARAMS struct { Base uint64 @@ -215,6 +236,16 @@ type UVM_ALLOC_SEMAPHORE_POOL_PARAMS struct { Pad0 [4]byte } +// +marshal +type UVM_ALLOC_SEMAPHORE_POOL_PARAMS_V550 struct { + Base uint64 + Length uint64 + PerGPUAttributes [UVM_MAX_GPUS_V2]UvmGpuMappingAttributes + GPUAttributesCount uint64 + RMStatus uint32 + Pad0 [4]byte +} + // +marshal type UVM_VALIDATE_VA_RANGE_PARAMS struct { Base uint64 @@ -239,7 +270,10 @@ type UVM_MM_INITIALIZE_PARAMS struct { // From kernel-open/nvidia-uvm/uvm_types.h: -const UVM_MAX_GPUS = NV_MAX_DEVICES +const ( + UVM_MAX_GPUS = NV_MAX_DEVICES + UVM_MAX_GPUS_V2 = NV_MAX_DEVICES * NV_MAX_SUBDEVICES +) // +marshal type UvmGpuMappingAttributes struct { diff --git a/pkg/sentry/devices/nvproxy/seccomp_filters.go b/pkg/sentry/devices/nvproxy/seccomp_filters.go index c316b4a8e..d0ae550e6 100644 --- a/pkg/sentry/devices/nvproxy/seccomp_filters.go +++ b/pkg/sentry/devices/nvproxy/seccomp_filters.go @@ -50,6 +50,10 @@ func Filters() seccomp.SyscallRules { seccomp.NonNegativeFD{}, seccomp.EqualTo(frontendIoctlCmd(nvgpu.NV_ESC_SYS_PARAMS, nvgpu.SizeofIoctlSysParams)), }, + seccomp.PerArg{ + seccomp.NonNegativeFD{}, + seccomp.EqualTo(frontendIoctlCmd(nvgpu.NV_ESC_WAIT_OPEN_COMPLETE, nvgpu.SizeofIoctlWaitOpenComplete)), + }, seccomp.PerArg{ seccomp.NonNegativeFD{}, seccomp.EqualTo(frontendIoctlCmd(nvgpu.NV_ESC_RM_ALLOC_MEMORY, nvgpu.SizeofIoctlNVOS02ParametersWithFD)), diff --git a/pkg/sentry/devices/nvproxy/version.go b/pkg/sentry/devices/nvproxy/version.go index be3ed500a..4c896b9a9 100644 --- a/pkg/sentry/devices/nvproxy/version.go +++ b/pkg/sentry/devices/nvproxy/version.go @@ -210,6 +210,7 @@ func Init() { nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS: rmControlSimple, nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_FABRIC_STATUS: rmControlSimple, nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS_MATRIX: rmControlSimple, + nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_FEATURES: rmControlSimple, nvgpu.NV0080_CTRL_CMD_FB_GET_CAPS_V2: rmControlSimple, nvgpu.NV0080_CTRL_CMD_GPU_GET_NUM_SUBDEVICES: rmControlSimple, nvgpu.NV0080_CTRL_CMD_GPU_QUERY_SW_STATE_PERSISTENCE: rmControlSimple, @@ -284,6 +285,7 @@ func Init() { nvgpu.NV01_MEMORY_LOCAL_USER: rmAllocSimple[nvgpu.NV_MEMORY_ALLOCATION_PARAMS], nvgpu.NV01_ROOT_CLIENT: rmAllocSimple[nvgpu.Handle], nvgpu.NV01_EVENT_OS_EVENT: rmAllocEventOSEvent, + nvgpu.NV2081_BINAPI: rmAllocSimple[nvgpu.NV2081_ALLOC_PARAMETERS], nvgpu.NV01_DEVICE_0: rmAllocSimple[nvgpu.NV0080_ALLOC_PARAMETERS], nvgpu.NV_MEMORY_FABRIC: rmAllocSimple[nvgpu.NV00F8_ALLOCATION_PARAMETERS], nvgpu.NV20_SUBDEVICE_0: rmAllocSimple[nvgpu.NV2080_ALLOC_PARAMETERS], @@ -325,7 +327,34 @@ func Init() { v535_129_03 := addDriverABI(535, 129, 03, "e6dca5626a2608c6bb2a046cfcb7c1af338b9e961a7dd90ac09bb8a126ff002e", v535_113_01) _ = addDriverABI(535, 154, 05, "7e95065caa6b82de926110f14827a61972eb12c200e863a29e9fb47866eaa898", v535_129_03) - // TODO: Update NV_MEMORY_ALLOCATION_PARAMS when adding >=545.23.06. + // 545.23.06 is an intermediate unqualified version from the main branch. + v545_23_06 := func() *driverABI { + abi := v535_113_01() + abi.allocationClass[nvgpu.NV01_MEMORY_SYSTEM] = rmAllocSimple[nvgpu.NV_MEMORY_ALLOCATION_PARAMS_V545] + abi.allocationClass[nvgpu.NV01_MEMORY_LOCAL_USER] = rmAllocSimple[nvgpu.NV_MEMORY_ALLOCATION_PARAMS_V545] + abi.allocationClass[nvgpu.NV50_MEMORY_VIRTUAL] = rmAllocSimple[nvgpu.NV_MEMORY_ALLOCATION_PARAMS_V545] + return abi + } + + // 550.40.07 is an intermediate unqualified version from the main branch. + v550_40_07 := func() *driverABI { + abi := v545_23_06() + abi.frontendIoctl[nvgpu.NV_ESC_WAIT_OPEN_COMPLETE] = frontendIoctlSimple // nv_ioctl_wait_open_complete_t + abi.controlCmd[nvgpu.NV0000_CTRL_CMD_GPU_ASYNC_ATTACH_ID] = rmControlSimple + abi.controlCmd[nvgpu.NV0000_CTRL_CMD_GPU_WAIT_ATTACH_ID] = rmControlSimple + abi.controlCmd[nvgpu.NV0080_CTRL_CMD_PERF_CUDA_LIMIT_SET_CONTROL] = rmControlSimple // NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS + // NV2081_BINAPI forwards all control commands to the GSP in + // src/nvidia/src/kernel/rmapi/binary_api.c:binapiControl_IMPL(). + abi.controlCmd[(nvgpu.NV2081_BINAPI<<16)|0x0108] = rmControlSimple + return abi + } + + _ = addDriverABI(550, 54, 14, "8c497ff1cfc7c310fb875149bc30faa4fd26d2237b2cba6cd2e8b0780157cfe3", func() *driverABI { + abi := v550_40_07() + abi.uvmIoctl[nvgpu.UVM_ALLOC_SEMAPHORE_POOL] = uvmIoctlSimple[nvgpu.UVM_ALLOC_SEMAPHORE_POOL_PARAMS_V550] + abi.uvmIoctl[nvgpu.UVM_MAP_EXTERNAL_ALLOCATION] = uvmIoctlHasRMCtrlFD[nvgpu.UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550] + return abi + }) }) }