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52 lines
2.1 KiB
LLVM
52 lines
2.1 KiB
LLVM
; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-unknown"
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; Stack reload folding tests.
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;
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; By including a nop call with sideeffects we can force a partial register spill of the
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; relevant registers and check that the reload is correctly folded into the instruction.
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;TODO stack_fold_bsf_i16
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declare i16 @llvm.cttz.i16(i16, i1)
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define i32 @stack_fold_bsf_i32(i32 %a0) {
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;CHECK-LABEL: stack_fold_bsf_i32
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;CHECK: bsfl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = call i32 @llvm.cttz.i32(i32 %a0, i1 -1)
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ret i32 %2
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}
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declare i32 @llvm.cttz.i32(i32, i1)
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define i64 @stack_fold_bsf_i64(i64 %a0) {
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;CHECK-LABEL: stack_fold_bsf_i64
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;CHECK: bsfq {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = call i64 @llvm.cttz.i64(i64 %a0, i1 -1)
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ret i64 %2
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}
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declare i64 @llvm.cttz.i64(i64, i1)
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;TODO stack_fold_bsr_i16
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declare i16 @llvm.ctlz.i16(i16, i1)
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define i32 @stack_fold_bsr_i32(i32 %a0) {
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;CHECK-LABEL: stack_fold_bsr_i32
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;CHECK: bsrl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = call i32 @llvm.ctlz.i32(i32 %a0, i1 -1)
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ret i32 %2
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}
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declare i32 @llvm.ctlz.i32(i32, i1)
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define i64 @stack_fold_bsr_i64(i64 %a0) {
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;CHECK-LABEL: stack_fold_bsr_i64
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;CHECK: bsrq {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = call i64 @llvm.ctlz.i64(i64 %a0, i1 -1)
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ret i64 %2
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}
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declare i64 @llvm.ctlz.i64(i64, i1)
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