linux-packaging-mono/external/llvm/test/CodeGen/Hexagon/regalloc-liveout-undef.mir
Xamarin Public Jenkins (auto-signing) e19d552987 Imported Upstream version 5.18.0.161
Former-commit-id: 4db48158d3a35497b8f118ab21b5f08ac3d86d98
2018-10-19 08:34:24 +00:00

35 lines
978 B
YAML

# RUN: llc -march=hexagon -run-pass liveintervals -run-pass machineverifier -run-pass simple-register-coalescing %s -o - | FileCheck %s
#
# If there is no consumer of the live intervals, the live intervals pass
# will be freed immediately after it runs, before the verifier. Add a
# user (register coalescer in this case), so that the verification will
# cover live intervals as well.
#
# Make sure that this compiles successfully.
# CHECK: undef %1.isub_lo:doubleregs = A2_addi %1.isub_lo, 1
---
name: fred
tracksRegLiveness: true
registers:
- { id: 0, class: intregs }
- { id: 1, class: doubleregs }
- { id: 2, class: predregs }
- { id: 3, class: doubleregs }
body: |
bb.0:
liveins: %d0
successors: %bb.1
%0 = IMPLICIT_DEF
%1 = COPY %d0
bb.1:
successors: %bb.1
%2 = C2_cmpgt %0, %1.isub_lo
%3 = COPY %1
%1 = COPY %3
undef %1.isub_lo = A2_addi %1.isub_lo, 1
J2_jump %bb.1, implicit-def %pc
...