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			54 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
			
		
		
	
	
			54 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
| ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
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| ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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| 
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| declare half @llvm.exp2.f16(half %a)
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| declare <2 x half> @llvm.exp2.v2f16(<2 x half> %a)
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| 
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| ; GCN-LABEL: {{^}}exp2_f16
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| ; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
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| ; SI:  v_cvt_f32_f16_e32 v[[A_F32:[0-9]+]], v[[A_F16]]
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| ; SI:  v_exp_f32_e32 v[[R_F32:[0-9]+]], v[[A_F32]]
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| ; SI:  v_cvt_f16_f32_e32 v[[R_F16:[0-9]+]], v[[R_F32]]
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| ; VI:  v_exp_f16_e32 v[[R_F16:[0-9]+]], v[[A_F16]]
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| ; GCN: buffer_store_short v[[R_F16]]
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| ; GCN: s_endpgm
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| define amdgpu_kernel void @exp2_f16(
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|     half addrspace(1)* %r,
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|     half addrspace(1)* %a) {
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| entry:
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|   %a.val = load half, half addrspace(1)* %a
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|   %r.val = call half @llvm.exp2.f16(half %a.val)
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|   store half %r.val, half addrspace(1)* %r
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|   ret void
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| }
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| 
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| ; GCN-LABEL: {{^}}exp2_v2f16
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| ; GCN: buffer_load_dword v[[A_V2_F16:[0-9]+]]
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| ; SI:  v_cvt_f32_f16_e32 v[[A_F32_0:[0-9]+]], v[[A_V2_F16]]
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| ; SI:  v_lshrrev_b32_e32 v[[A_F16_1:[0-9]+]], 16, v[[A_V2_F16]]
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| ; SI:  v_cvt_f32_f16_e32 v[[A_F32_1:[0-9]+]], v[[A_F16_1]]
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| ; SI:  v_exp_f32_e32 v[[R_F32_0:[0-9]+]], v[[A_F32_0]]
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| ; SI:  v_cvt_f16_f32_e32 v[[R_F16_0:[0-9]+]], v[[R_F32_0]]
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| ; SI:  v_exp_f32_e32 v[[R_F32_1:[0-9]+]], v[[A_F32_1]]
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| ; SI:  v_cvt_f16_f32_e32 v[[R_F16_1:[0-9]+]], v[[R_F32_1]]
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| ; SI-DAG: v_lshlrev_b32_e32 v[[R_F16_HI:[0-9]+]], 16, v[[R_F16_1]]
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| ; SI-NOT: and
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| ; SI:  v_or_b32_e32 v[[R_V2_F16:[0-9]+]], v[[R_F16_0]], v[[R_F16_HI]]
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| 
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| ; VI-DAG: v_exp_f16_e32 v[[R_F16_0:[0-9]+]], v[[A_V2_F16]]
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| ; VI-DAG: v_exp_f16_sdwa v[[R_F16_1:[0-9]+]], v[[A_V2_F16]] dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1
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| ; VI-NOT: and
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| ; VI:     v_or_b32_e32 v[[R_V2_F16:[0-9]+]], v[[R_F16_0]], v[[R_F16_1]]
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| 
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| ; GCN: buffer_store_dword v[[R_V2_F16]]
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| ; GCN: s_endpgm
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| define amdgpu_kernel void @exp2_v2f16(
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|     <2 x half> addrspace(1)* %r,
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|     <2 x half> addrspace(1)* %a) {
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| entry:
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|   %a.val = load <2 x half>, <2 x half> addrspace(1)* %a
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|   %r.val = call <2 x half> @llvm.exp2.v2f16(<2 x half> %a.val)
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|   store <2 x half> %r.val, <2 x half> addrspace(1)* %r
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|   ret void
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| }
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