64ac736ec5
Former-commit-id: f3cc9b82f3e5bd8f0fd3ebc098f789556b44e9cd
71 lines
1.9 KiB
LLVM
71 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefix=RV32I
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define void @jt(i32 %in, i32* %out) {
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; RV32I-LABEL: jt:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: addi a2, zero, 2
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; RV32I-NEXT: blt a2, a0, .LBB0_3
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; RV32I-NEXT: j .LBB0_1
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; RV32I-NEXT: .LBB0_1: # %entry
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; RV32I-NEXT: addi a3, zero, 1
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; RV32I-NEXT: beq a0, a3, .LBB0_5
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; RV32I-NEXT: j .LBB0_2
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; RV32I-NEXT: .LBB0_2: # %entry
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; RV32I-NEXT: beq a0, a2, .LBB0_6
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; RV32I-NEXT: j .LBB0_9
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; RV32I-NEXT: .LBB0_6: # %bb2
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; RV32I-NEXT: addi a0, zero, 3
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; RV32I-NEXT: sw a0, 0(a1)
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; RV32I-NEXT: j .LBB0_9
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; RV32I-NEXT: .LBB0_3: # %entry
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; RV32I-NEXT: addi a3, zero, 3
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; RV32I-NEXT: beq a0, a3, .LBB0_7
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; RV32I-NEXT: j .LBB0_4
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; RV32I-NEXT: .LBB0_4: # %entry
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; RV32I-NEXT: addi a2, zero, 4
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; RV32I-NEXT: beq a0, a2, .LBB0_8
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; RV32I-NEXT: j .LBB0_9
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; RV32I-NEXT: .LBB0_8: # %bb4
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; RV32I-NEXT: addi a0, zero, 1
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; RV32I-NEXT: sw a0, 0(a1)
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; RV32I-NEXT: .LBB0_9: # %exit
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB0_5: # %bb1
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; RV32I-NEXT: addi a0, zero, 4
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; RV32I-NEXT: sw a0, 0(a1)
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; RV32I-NEXT: j .LBB0_9
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; RV32I-NEXT: .LBB0_7: # %bb3
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; RV32I-NEXT: sw a2, 0(a1)
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; RV32I-NEXT: j .LBB0_9
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entry:
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switch i32 %in, label %exit [
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i32 1, label %bb1
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i32 2, label %bb2
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i32 3, label %bb3
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i32 4, label %bb4
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]
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bb1:
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store i32 4, i32* %out
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br label %exit
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bb2:
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store i32 3, i32* %out
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br label %exit
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bb3:
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store i32 2, i32* %out
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br label %exit
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bb4:
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store i32 1, i32* %out
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br label %exit
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exit:
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ret void
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}
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