22 lines
829 B
TableGen
22 lines
829 B
TableGen
//=- ARMScheduleM3.td - ARM Cortex-M3 Scheduling Definitions -*- tablegen -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the machine model for the ARM Cortex-M3 processor.
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//
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//===----------------------------------------------------------------------===//
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def CortexM3Model : SchedMachineModel {
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let IssueWidth = 1; // Only IT can be dual-issued, so assume single-issue
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let MicroOpBufferSize = 0; // In-order
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let LoadLatency = 2; // Latency when not pipelined, not pc-relative
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let MispredictPenalty = 2; // Best case branch taken cost
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let CompleteModel = 0;
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}
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