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			117 lines
		
	
	
		
			3.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
			
		
		
	
	
			117 lines
		
	
	
		
			3.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
| ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
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| ; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
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| ; RUN:   --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
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| ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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| ; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
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| ; RUN:   --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
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| 
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| @glob = common local_unnamed_addr global i8 0, align 1
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| 
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| ; Function Attrs: norecurse nounwind readnone
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| define signext i32 @test_igtsc(i8 signext %a, i8 signext %b) {
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| ; CHECK-LABEL: test_igtsc:
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| ; CHECK:       # %bb.0: # %entry
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| ; CHECK-NEXT:    sub [[REG:r[0-9]+]], r4, r3
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| ; CHECK-NEXT:    rldicl r3, [[REG]], 1, 63
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| ; CHECK-NEXT:    blr
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| entry:
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|   %cmp = icmp sgt i8 %a, %b
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|   %conv2 = zext i1 %cmp to i32
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|   ret i32 %conv2
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| }
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| 
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| ; Function Attrs: norecurse nounwind readnone
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| define signext i32 @test_igtsc_sext(i8 signext %a, i8 signext %b) {
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| ; CHECK-LABEL: test_igtsc_sext:
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| ; CHECK:       # %bb.0: # %entry
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| ; CHECK-NEXT:    sub [[REG:r[0-9]+]], r4, r3
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| ; CHECK-NEXT:    sradi r3, [[REG]], 63
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| ; CHECK-NEXT:    blr
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| entry:
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|   %cmp = icmp sgt i8 %a, %b
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|   %sub = sext i1 %cmp to i32
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|   ret i32 %sub
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| }
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| 
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| ; FIXME
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| ; Function Attrs: norecurse nounwind readnone
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| define signext i32 @test_igtsc_z(i8 signext %a) {
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| ; CHECK-LABEL: test_igtsc_z:
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| ; CHECK:       # %bb.0: # %entry
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| ; CHECK-NEXT:    neg r3, r3
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| ; CHECK-NEXT:    rldicl r3, r3, 1, 63
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| ; CHECK-NEXT:    blr
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| entry:
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|   %cmp = icmp sgt i8 %a, 0
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|   %conv1 = zext i1 %cmp to i32
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|   ret i32 %conv1
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| }
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| 
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| ; Function Attrs: norecurse nounwind readnone
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| define signext i32 @test_igtsc_sext_z(i8 signext %a) {
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| ; CHECK-LABEL: test_igtsc_sext_z:
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| ; CHECK: neg [[REG2:r[0-9]+]], r3
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| ; CHECK-NEXT: sradi r3, [[REG2]], 63
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| ; CHECK-NEXT: blr
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| entry:
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|   %cmp = icmp sgt i8 %a, 0
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|   %sub = sext i1 %cmp to i32
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|   ret i32 %sub
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| }
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| 
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| ; Function Attrs: norecurse nounwind
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| define void @test_igtsc_store(i8 signext %a, i8 signext %b) {
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| ; CHECK-LABEL: test_igtsc_store:
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| ; CHECK:       # %bb.0: # %entry
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| ; CHECK:         sub [[REG:r[0-9]+]], r4, r3
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| ; CHECK:         rldicl {{r[0-9]+}}, [[REG]], 1, 63
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| entry:
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|   %cmp = icmp sgt i8 %a, %b
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|   %conv3 = zext i1 %cmp to i8
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|   store i8 %conv3, i8* @glob, align 1
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|   ret void
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| }
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| 
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| ; Function Attrs: norecurse nounwind
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| define void @test_igtsc_sext_store(i8 signext %a, i8 signext %b) {
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| ; CHECK-LABEL: test_igtsc_sext_store:
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| ; CHECK:       # %bb.0: # %entry
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| ; CHECK:         sub [[REG:r[0-9]+]], r4, r3
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| ; CHECK:         sradi {{r[0-9]+}}, [[REG]], 63
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| entry:
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|   %cmp = icmp sgt i8 %a, %b
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|   %conv3 = sext i1 %cmp to i8
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|   store i8 %conv3, i8* @glob, align 1
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|   ret void
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| }
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| 
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| ; FIXME
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| ; Function Attrs: norecurse nounwind
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| define void @test_igtsc_z_store(i8 signext %a) {
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| ; CHECK-LABEL: test_igtsc_z_store:
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| ; CHECK:       # %bb.0: # %entry
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| ; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
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| ; CHECK-NEXT:    neg r3, r3
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| ; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
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| ; CHECK-NEXT:    rldicl r3, r3, 1, 63
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| ; CHECK-NEXT:    stb r3, 0(r4)
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| ; CHECK-NEXT:    blr
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| entry:
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|   %cmp = icmp sgt i8 %a, 0
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|   %conv2 = zext i1 %cmp to i8
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|   store i8 %conv2, i8* @glob, align 1
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|   ret void
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| }
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| 
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| ; Function Attrs: norecurse nounwind
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| define void @test_igtsc_sext_z_store(i8 signext %a) {
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| ; CHECK-LABEL: test_igtsc_sext_z_store:
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| ; CHECK:       neg [[REG2:r[0-9]+]], r3
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| ; CHECK:       sradi {{r[0-9]+}}, [[REG2]], 63
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| entry:
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|   %cmp = icmp sgt i8 %a, 0
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|   %conv2 = sext i1 %cmp to i8
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|   store i8 %conv2, i8* @glob, align 1
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|   ret void
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| }
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