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410 lines
8.6 KiB
ArmAsm
410 lines
8.6 KiB
ArmAsm
@ RUN: llvm-mc -triple thumbv7a--none-eabi -arm-implicit-it=always < %s -show-encoding | FileCheck %s
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@ Single instruction
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.section test1
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@ CHECK-LABEL: test1
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addeq r0, #1
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@ CHECK: it eq
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@ CHECK: addeq
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@ Multiple instructions, same condition
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.section test2
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@ CHECK-LABEL: test2
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addeq r0, #1
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addeq r0, #1
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addeq r0, #1
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addeq r0, #1
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@ CHECK: itttt eq
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@ CHECK: addeq
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@ CHECK: addeq
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@ CHECK: addeq
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@ CHECK: addeq
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@ Multiple instructions, equal but opposite conditions
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.section test3
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@ CHECK-LABEL: test3
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addeq r0, #1
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addne r0, #1
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addeq r0, #1
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addne r0, #1
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@ CHECK: itete eq
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@ CHECK: addeq
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@ CHECK: addne
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@ CHECK: addeq
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@ CHECK: addne
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@ Multiple instructions, unrelated conditions
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.section test4
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@ CHECK-LABEL: test4
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addeq r0, #1
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addlt r0, #1
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addeq r0, #1
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addge r0, #1
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it lt
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@ CHECK: addlt
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it ge
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@ CHECK: addge
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@ More than 4 instructions eligible for a block
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.section test5
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@ CHECK-LABEL: test5
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addeq r0, #1
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addeq r0, #1
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addeq r0, #1
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addeq r0, #1
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addeq r0, #1
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addeq r0, #1
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@ CHECK: itttt eq
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@ CHECK: addeq
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@ CHECK: addeq
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@ CHECK: addeq
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@ CHECK: addeq
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@ CHECK: itt eq
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@ CHECK: addeq
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@ CHECK: addeq
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@ Flush on a label
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.section test6
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@ CHECK-LABEL: test6
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addeq r0, #1
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label:
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addeq r0, #1
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5:
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addeq r0, #1
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ Flush on a section-change directive
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.section test7a
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@ CHECK-LABEL: test7a
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addeq r0, #1
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.section test7b
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addeq r0, #1
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.previous
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addeq r0, #1
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.pushsection test7c
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addeq r0, #1
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.popsection
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addeq r0, #1
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ Flush on an ISA change (even to the same ISA)
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.section test8
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@ CHECK-LABEL: test8
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addeq r0, #1
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.thumb
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addeq r0, #1
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.arm
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addeq r0, #1
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.thumb
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addeq r0, #1
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ Flush on an arch, cpu or fpu change
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.section test9
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@ CHECK-LABEL: test9
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addeq r0, #1
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.arch armv7-a
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addeq r0, #1
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.cpu cortex-a15
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addeq r0, #1
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.fpu vfpv3
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addeq r0, #1
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ Flush on an unpredicable instruction
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.section test10
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@ CHECK-LABEL: test10
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addeq r0, #1
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setend le
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addeq r0, #1
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hvc #0
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addeq r0, #1
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: setend le
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: hvc.w #0
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@ CHECK: it eq
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@ CHECK: addeq
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@ Flush when reaching an explicit IT instruction
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.section test11
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@ CHECK-LABEL: test11
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addeq r0, #1
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it eq
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addeq r0, #1
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ Don't extend an explicit IT instruction
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.section test12
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@ CHECK-LABEL: test12
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it eq
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addeq r0, #1
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addeq r0, #1
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ Branch-like instructions can only be used at the end of an IT block, so
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@ terminate it.
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.section test13
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@ CHECK-LABEL: test13
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.cpu cortex-a15
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addeq pc, r0
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addeq pc, sp, pc
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ldreq pc, [r0, #4]
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ldreq pc, [r0, #-4]
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ldreq pc, [r0, r1]
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ldreq pc, [pc, #-0]
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moveq pc, r0
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bleq #4
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blxeq #4
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blxeq r0
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bxeq r0
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bxjeq r0
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tbbeq [r0, r1]
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tbheq [r0, r1, lsl #1]
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ereteq
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rfeiaeq r0
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rfeiaeq r0!
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rfedbeq r0
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rfedbeq r0!
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smceq #0
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ldmiaeq r0, {pc}
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ldmiaeq r0!, {r1, pc}
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ldmdbeq r0, {pc}
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ldmdbeq r0!, {r1, pc}
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popeq {pc}
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.arch armv8-m.main
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bxnseq r0
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blxnseq r0
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@ CHECK: it eq
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@ CHECK: addeq pc, r0
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@ CHECK: it eq
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@ CHECK: addeq pc, sp, pc
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@ CHECK: it eq
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@ CHECK: ldreq.w pc, [r0, #4]
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@ CHECK: it eq
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@ CHECK: ldreq pc, [r0, #-4]
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@ CHECK: it eq
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@ CHECK: ldreq.w pc, [r0, r1]
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@ CHECK: it eq
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@ CHECK: ldreq.w pc, [pc, #-0]
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@ CHECK: it eq
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@ CHECK: moveq pc, r0
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@ CHECK: it eq
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@ CHECK: bleq #4
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@ CHECK: it eq
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@ CHECK: blxeq #4
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@ CHECK: it eq
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@ CHECK: blxeq r0
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@ CHECK: it eq
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@ CHECK: bxeq r0
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@ CHECK: it eq
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@ CHECK: bxjeq r0
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@ CHECK: it eq
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@ CHECK: tbbeq [r0, r1]
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@ CHECK: it eq
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@ CHECK: tbheq [r0, r1, lsl #1]
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@ CHECK: it eq
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@ CHECK: ereteq
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@ CHECK: it eq
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@ CHECK: rfeiaeq r0
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@ CHECK: it eq
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@ CHECK: rfeiaeq r0!
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@ CHECK: it eq
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@ CHECK: rfedbeq r0
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@ CHECK: it eq
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@ CHECK: rfedbeq r0!
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@ CHECK: it eq
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@ CHECK: smceq #0
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@ CHECK: it eq
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@ CHECK: ldmeq.w r0, {pc}
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@ CHECK: it eq
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@ CHECK: ldmeq.w r0!, {r1, pc}
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@ CHECK: it eq
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@ CHECK: ldmdbeq r0, {pc}
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@ CHECK: it eq
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@ CHECK: ldmdbeq r0!, {r1, pc}
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@ CHECK: it eq
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@ CHECK: popeq {pc}
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@ CHECK: it eq
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@ CHECK: bxnseq r0
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@ CHECK: it eq
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@ CHECK: blxnseq r0
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@ Thumb 16-bit ALU instructions set the flags iff they are not in an IT block,
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@ so instruction matching must change when generating an implicit IT block.
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.section test14
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@ CHECK-LABEL: test14
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@ Outside an IT block, the 16-bit encoding must set flags
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add r0, #1
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@ CHECK:add.w r0, r0, #1 @ encoding: [0x00,0xf1,0x01,0x00]
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adds r0, #1
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@ CHECK: adds r0, #1 @ encoding: [0x01,0x30]
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@ Inside an IT block, the 16-bit encoding can not set flags
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addeq r0, #1
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@ CHECK: itt eq
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@ CHECK: addeq r0, #1 @ encoding: [0x01,0x30]
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addseq r0, #1
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@ CHECK: addseq.w r0, r0, #1 @ encoding: [0x10,0xf1,0x01,0x00]
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@ Some variants of the B instruction have their own condition code field, and
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@ are not valid in IT blocks.
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.section test15
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@ CHECK-LABEL: test15
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@ Outside of an IT block, the 4 variants (narrow/wide,
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@ predicated/non-predicated) are selected as normal, and the predicated
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@ encodings are used instead of opening a new IT block:
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b #0x100
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@ CHECK: b #256 @ encoding: [0x80,0xe0]
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b #0x800
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@ CHECK: b.w #2048 @ encoding: [0x00,0xf0,0x00,0xbc]
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beq #0x4
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@ CHECK-NOT: it
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@ CHECK: beq #4 @ encoding: [0x02,0xd0]
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beq #0x100
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@ CHECK-NOT: it
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@ CHECK: beq.w #256 @ encoding: [0x00,0xf0,0x80,0x80]
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@ We could support "beq #0x100000" to "beq #0x1fffffc" by using t2Bcc in
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@ an IT block (these currently fail as the target is out of range). However, long
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@ ranges like this are rarely assembly-time constants, so this probably isn't
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@ worth doing.
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@ If we already have an open IT block, we can use the non-predicated encodings,
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@ which have a greater range:
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addeq r0, r1
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beq #0x4
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@ CHECK: itt eq
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@ CHECK: addeq r0, r1
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@ CHECK: beq #4 @ encoding: [0x02,0xe0]
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addeq r0, r1
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beq #0x100
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@ CHECK: itt eq
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@ CHECK: addeq r0, r1
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@ CHECK: beq #256 @ encoding: [0x80,0xe0]
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addeq r0, r1
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beq #0x800
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@ CHECK: itt eq
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@ CHECK: addeq r0, r1
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@ CHECK: beq.w #2048 @ encoding: [0x00,0xf0,0x00,0xbc]
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@ If we have an open but incompatible IT block, we close it and use the
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@ self-predicated encodings, without an IT block:
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addeq r0, r1
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bgt #0x4
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@ CHECK: it eq
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@ CHECK: addeq r0, r1
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@ CHECK: bgt #4 @ encoding: [0x02,0xdc]
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addeq r0, r1
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bgt #0x100
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@ CHECK: it eq
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@ CHECK: addeq r0, r1
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@ CHECK: bgt.w #256 @ encoding: [0x00,0xf3,0x80,0x80]
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@ Breakpoint instructions are allowed in IT blocks, but are always executed
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@ regardless of the condition flags. We could continue an IT block through
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@ them, but currently do not.
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.section test16
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@ CHECK-LABEL: test16
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addeq r0, r1
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bkpt #0
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addeq r0, r1
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@ CHECK: it eq
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@ CHECK: addeq r0, r1
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@ CHECK: bkpt #0
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@ CHECK: it eq
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@ CHECK: addeq r0, r1
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@ The .if directive causes entire assembly statments to be dropped before they
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@ reach the IT block generation code. This happens to be exactly what we want,
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@ and allows IT blocks to extend into and out of .if blocks. Only one arm of the
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@ .if will be seen by the IT state tracking code, so the subeq shouldn't have
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@ any effect here.
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.section test17
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@ CHECK-LABEL: test17
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addeq r0, r1
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.if 1
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addeq r0, r1
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.else
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subeq r0, r1
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.endif
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addeq r0, r1
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@ CHECK: ittt eq
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@ CHECK: addeq
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@ CHECK: addeq
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@ CHECK: addeq
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@ TODO: There are some other directives which we could continue through, such
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@ as .set and .global, but we currently conservatively flush the IT block before
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@ every directive (except for .if and friends, which are handled separately).
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.section test18
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@ CHECK-LABEL: test18
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addeq r0, r1
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.set s, 1
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addeq r0, r1
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@ CHECK: it eq
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@ CHECK: addeq
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@ CHECK: it eq
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@ CHECK: addeq
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@ The .rept directive can be used to create long IT blocks.
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.section test19
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@ CHECK-LABEL: test19
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.rept 3
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addeq r0, r1
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subne r0, r1
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.endr
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@ CHECK: itete eq
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@ CHECK: addeq r0, r1
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@ CHECK: subne r0, r0, r1
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@ CHECK: addeq r0, r1
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@ CHECK: subne r0, r0, r1
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@ CHECK: ite eq
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@ CHECK: addeq r0, r1
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@ CHECK: subne r0, r0, r1
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@ Flush at end of file
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.section test99
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@ CHECK-LABEL: test99
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addeq r0, #1
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@ CHECK: it eq
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@ CHECK: addeq
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