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142 lines
5.2 KiB
YAML
142 lines
5.2 KiB
YAML
# RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -run-pass si-optimize-exec-masking -verify-machineinstrs -o - %s | FileCheck %s
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--- |
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define amdgpu_kernel void @undefined_physreg_sgpr_spill() #0 {
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unreachable
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}
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define amdgpu_kernel void @undefined_physreg_sgpr_spill_reorder() #0 {
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unreachable
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}
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attributes #0 = { nounwind "amdgpu-num-sgpr"="16" }
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...
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---
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# copy + s_and_b64 was turned into saveexec, deleting the copy,
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# leaving a spill of the undefined register.
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# CHECK-LABEL: name: undefined_physreg_sgpr_spill
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# CHECK: %sgpr0_sgpr1 = COPY %exec, implicit-def %exec
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# CHECK-NEXT: SI_SPILL_S64_SAVE %sgpr0_sgpr1,
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# CHECK-NEXT: %sgpr2_sgpr3 = S_AND_B64 killed %sgpr0_sgpr1, killed %vcc, implicit-def dead %scc
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# CHECK: %exec = COPY killed %sgpr2_sgpr3
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name: undefined_physreg_sgpr_spill
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alignment: 0
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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liveins:
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- { reg: '%vgpr0', virtual-reg: '' }
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- { reg: '%sgpr4_sgpr5', virtual-reg: '' }
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
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stack-id: 1, callee-saved-register: '', callee-saved-restored: true,
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di-variable: '', di-expression: '', di-location: '' }
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constants:
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body: |
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bb.0:
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successors: %bb.1, %bb.2
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liveins: %vgpr0, %sgpr4_sgpr5
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%vgpr1_vgpr2 = COPY killed %sgpr4_sgpr5, implicit %exec
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%vgpr1 = GLOBAL_LOAD_UBYTE killed %vgpr1_vgpr2, 0, 0, 0, implicit %exec :: (non-temporal dereferenceable invariant load 1 from `i1 addrspace(2)* undef`)
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%vcc = V_CMP_NE_U32_e64 0, %vgpr0, implicit %exec
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%sgpr0_sgpr1 = V_CMP_EQ_U32_e64 1, killed %vgpr1, implicit %exec
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%vgpr1 = V_CNDMASK_B32_e64 0, -1, killed %sgpr0_sgpr1, implicit %exec
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%sgpr0_sgpr1 = COPY %exec, implicit-def %exec
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SI_SPILL_S64_SAVE %sgpr0_sgpr1, %stack.0, implicit %exec, implicit %sgpr8_sgpr9_sgpr10_sgpr11, implicit %sgpr13, implicit-def dead %m0 :: (store 8 into %stack.0, align 4)
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%sgpr2_sgpr3 = S_AND_B64 killed %sgpr0_sgpr1, killed %vcc, implicit-def dead %scc
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%exec = S_MOV_B64_term killed %sgpr2_sgpr3
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SI_MASK_BRANCH %bb.2, implicit %exec
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S_BRANCH %bb.1
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bb.1:
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successors: %bb.3(0x80000000)
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liveins: %vgpr0, %vgpr1
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%sgpr2_sgpr3 = S_MOV_B64 0
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%vgpr2 = V_MOV_B32_e32 0, implicit %exec
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%sgpr4_sgpr5 = IMPLICIT_DEF
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S_BRANCH %bb.3
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bb.2:
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successors:
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%sgpr0_sgpr1 = SI_SPILL_S64_RESTORE %stack.0, implicit %exec, implicit %sgpr8_sgpr9_sgpr10_sgpr11, implicit %sgpr13, implicit-def dead %m0 :: (load 8 from %stack.0, align 4)
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%exec = S_OR_B64 %exec, killed %sgpr0_sgpr1, implicit-def %scc
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bb.3:
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liveins: %vgpr0, %vgpr1, %vgpr2, %sgpr2_sgpr3, %sgpr4_sgpr5
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%vcc = COPY %vgpr1
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S_ENDPGM
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...
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---
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# Move spill to after future save instruction
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# CHECK-LABEL: {{^}}name: undefined_physreg_sgpr_spill_reorder
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# CHECK: %sgpr0_sgpr1 = COPY %exec, implicit-def %exec
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# CHECK: %sgpr2_sgpr3 = S_AND_B64 %sgpr0_sgpr1, killed %vcc, implicit-def dead %scc
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# CHECK: SI_SPILL_S64_SAVE killed %sgpr0_sgpr1, %stack.0, implicit %exec, implicit %sgpr8_sgpr9_sgpr10_sgpr11, implicit %sgpr13, implicit-def dead %m0 :: (store 8 into %stack.0, align 4)
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# CHECK: %exec = COPY killed %sgpr2_sgpr3
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name: undefined_physreg_sgpr_spill_reorder
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alignment: 0
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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liveins:
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- { reg: '%vgpr0', virtual-reg: '' }
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- { reg: '%sgpr4_sgpr5', virtual-reg: '' }
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
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stack-id: 1, callee-saved-register: '', callee-saved-restored: true,
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di-variable: '', di-expression: '', di-location: '' }
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constants:
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body: |
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bb.0:
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successors: %bb.1, %bb.2
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liveins: %vgpr0, %sgpr4_sgpr5
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%vgpr1_vgpr2 = COPY killed %sgpr4_sgpr5, implicit %exec
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%vgpr1 = GLOBAL_LOAD_UBYTE killed %vgpr1_vgpr2, 0, 0, 0, implicit %exec :: (non-temporal dereferenceable invariant load 1 from `i1 addrspace(2)* undef`)
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%vcc = V_CMP_NE_U32_e64 0, %vgpr0, implicit %exec
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%sgpr0_sgpr1 = V_CMP_EQ_U32_e64 1, killed %vgpr1, implicit %exec
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%vgpr1 = V_CNDMASK_B32_e64 0, -1, killed %sgpr0_sgpr1, implicit %exec
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%sgpr0_sgpr1 = COPY %exec, implicit-def %exec
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%sgpr2_sgpr3 = S_AND_B64 %sgpr0_sgpr1, killed %vcc, implicit-def dead %scc
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SI_SPILL_S64_SAVE killed %sgpr0_sgpr1, %stack.0, implicit %exec, implicit %sgpr8_sgpr9_sgpr10_sgpr11, implicit %sgpr13, implicit-def dead %m0 :: (store 8 into %stack.0, align 4)
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%exec = S_MOV_B64_term killed %sgpr2_sgpr3
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SI_MASK_BRANCH %bb.2, implicit %exec
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S_BRANCH %bb.1
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bb.1:
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successors: %bb.3(0x80000000)
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liveins: %vgpr0, %vgpr1
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%sgpr2_sgpr3 = S_MOV_B64 0
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%vgpr2 = V_MOV_B32_e32 0, implicit %exec
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%sgpr4_sgpr5 = IMPLICIT_DEF
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S_BRANCH %bb.3
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bb.2:
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successors:
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%sgpr0_sgpr1 = SI_SPILL_S64_RESTORE %stack.0, implicit %exec, implicit %sgpr8_sgpr9_sgpr10_sgpr11, implicit %sgpr13, implicit-def dead %m0 :: (load 8 from %stack.0, align 4)
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%exec = S_OR_B64 %exec, killed %sgpr0_sgpr1, implicit-def %scc
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bb.3:
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liveins: %vgpr0, %vgpr1, %vgpr2, %sgpr2_sgpr3, %sgpr4_sgpr5
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%vcc = COPY %vgpr1
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S_ENDPGM
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...
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