29 lines
1.3 KiB
LLVM
29 lines
1.3 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}test_fmed3:
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; GCN: v_med3_f32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @test_fmed3(float addrspace(1)* %out, float %src0, float %src1, float %src2) #1 {
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%mad = call float @llvm.amdgcn.fmed3.f32(float %src0, float %src1, float %src2)
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store float %mad, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}test_fmed3_srcmods:
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; GCN: v_med3_f32 v{{[0-9]+}}, -s{{[0-9]+}}, |v{{[0-9]+}}|, -|v{{[0-9]+}}|
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define amdgpu_kernel void @test_fmed3_srcmods(float addrspace(1)* %out, float %src0, float %src1, float %src2) #1 {
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%src0.fneg = fsub float -0.0, %src0
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%src1.fabs = call float @llvm.fabs.f32(float %src1)
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%src2.fabs = call float @llvm.fabs.f32(float %src2)
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%src2.fneg.fabs = fsub float -0.0, %src2.fabs
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%mad = call float @llvm.amdgcn.fmed3.f32(float %src0.fneg, float %src1.fabs, float %src2.fneg.fabs)
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store float %mad, float addrspace(1)* %out
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ret void
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}
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declare float @llvm.amdgcn.fmed3.f32(float, float, float) #0
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declare float @llvm.fabs.f32(float) #0
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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