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124 lines
3.8 KiB
LLVM
124 lines
3.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; rdar://11748024
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define i32 @a(i1 zeroext %x, i1 zeroext %y) {
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; CHECK-LABEL: @a(
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; CHECK-NEXT: [[CONV3_NEG:%.*]] = sext i1 %y to i32
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; CHECK-NEXT: [[SUB:%.*]] = select i1 %x, i32 2, i32 1
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], [[CONV3_NEG]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%conv = zext i1 %x to i32
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%conv3 = zext i1 %y to i32
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%conv3.neg = sub i32 0, %conv3
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%sub = add i32 %conv, 1
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%add = add i32 %sub, %conv3.neg
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ret i32 %add
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}
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define i32 @zextsub(i1 %x) {
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; CHECK-LABEL: @zextsub(
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; CHECK-NEXT: [[SUB:%.*]] = select i1 %x, i32 10, i32 11
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; CHECK-NEXT: ret i32 [[SUB]]
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;
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%zext = zext i1 %x to i32
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%sub = sub i32 11, %zext
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ret i32 %sub
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}
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define <2 x i32> @zextsub_splat(<2 x i1> %x) {
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; CHECK-LABEL: @zextsub_splat(
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; CHECK-NEXT: [[SUB:%.*]] = select <2 x i1> %x, <2 x i32> <i32 41, i32 41>, <2 x i32> <i32 42, i32 42>
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; CHECK-NEXT: ret <2 x i32> [[SUB]]
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;
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%zext = zext <2 x i1> %x to <2 x i32>
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%sub = sub <2 x i32> <i32 42, i32 42>, %zext
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ret <2 x i32> %sub
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}
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define <2 x i32> @zextsub_vec(<2 x i1> %x) {
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; CHECK-LABEL: @zextsub_vec(
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; CHECK-NEXT: [[SUB:%.*]] = select <2 x i1> %x, <2 x i32> <i32 10, i32 41>, <2 x i32> <i32 11, i32 42>
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; CHECK-NEXT: ret <2 x i32> [[SUB]]
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;
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%zext = zext <2 x i1> %x to <2 x i32>
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%sub = sub <2 x i32> <i32 11, i32 42>, %zext
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ret <2 x i32> %sub
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}
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define i32 @PR30273_select(i1 %a, i1 %b) {
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; CHECK-LABEL: @PR30273_select(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 %a to i32
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; CHECK-NEXT: [[SEL1:%.*]] = select i1 %a, i32 2, i32 1
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; CHECK-NEXT: [[SEL2:%.*]] = select i1 %b, i32 [[SEL1]], i32 [[ZEXT]]
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; CHECK-NEXT: ret i32 [[SEL2]]
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;
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%zext = zext i1 %a to i32
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%sel1 = select i1 %a, i32 2, i32 1
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%sel2 = select i1 %b, i32 %sel1, i32 %zext
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ret i32 %sel2
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}
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define i32 @PR30273_zext_add(i1 %a, i1 %b) {
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; CHECK-LABEL: @PR30273_zext_add(
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 %a to i32
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; CHECK-NEXT: [[CONV3:%.*]] = zext i1 %b to i32
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[CONV3]], [[CONV]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%conv = zext i1 %a to i32
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%conv3 = zext i1 %b to i32
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%add = add nuw nsw i32 %conv3, %conv
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ret i32 %add
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}
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define i32 @PR30273_three_bools(i1 %x, i1 %y, i1 %z) {
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; CHECK-LABEL: @PR30273_three_bools(
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; CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 %x to i32
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; CHECK-NEXT: [[ADD1:%.*]] = select i1 %x, i32 2, i32 1
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; CHECK-NEXT: [[SEL1:%.*]] = select i1 %y, i32 [[ADD1]], i32 [[FROMBOOL]]
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; CHECK-NEXT: [[ADD2:%.*]] = zext i1 %z to i32
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; CHECK-NEXT: [[SEL2:%.*]] = add nuw nsw i32 [[SEL1]], [[ADD2]]
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; CHECK-NEXT: ret i32 [[SEL2]]
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;
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%frombool = zext i1 %x to i32
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%add1 = add nsw i32 %frombool, 1
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%sel1 = select i1 %y, i32 %add1, i32 %frombool
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%add2 = add nsw i32 %sel1, 1
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%sel2 = select i1 %z, i32 %add2, i32 %sel1
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ret i32 %sel2
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}
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define i32 @zext_add_scalar(i1 %x) {
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; CHECK-LABEL: @zext_add_scalar(
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; CHECK-NEXT: [[ADD:%.*]] = select i1 %x, i32 43, i32 42
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%zext = zext i1 %x to i32
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%add = add i32 %zext, 42
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ret i32 %add
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}
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define <2 x i32> @zext_add_vec_splat(<2 x i1> %x) {
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; CHECK-LABEL: @zext_add_vec_splat(
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; CHECK-NEXT: [[ADD:%.*]] = select <2 x i1> %x, <2 x i32> <i32 43, i32 43>, <2 x i32> <i32 42, i32 42>
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; CHECK-NEXT: ret <2 x i32> [[ADD]]
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;
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%zext = zext <2 x i1> %x to <2 x i32>
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%add = add <2 x i32> %zext, <i32 42, i32 42>
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ret <2 x i32> %add
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}
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define <2 x i32> @zext_add_vec(<2 x i1> %x) {
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; CHECK-LABEL: @zext_add_vec(
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; CHECK-NEXT: [[ADD:%.*]] = select <2 x i1> %x, <2 x i32> <i32 43, i32 24>, <2 x i32> <i32 42, i32 23>
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; CHECK-NEXT: ret <2 x i32> [[ADD]]
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;
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%zext = zext <2 x i1> %x to <2 x i32>
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%add = add <2 x i32> %zext, <i32 42, i32 23>
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ret <2 x i32> %add
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}
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