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54 lines
1.3 KiB
LLVM
54 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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; rdar://12081007
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define i32 @and_1(i8 zeroext %a, i8 zeroext %b, i32 %x) {
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; CHECK-LABEL: and_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: andb %dil, %sil
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; CHECK-NEXT: cmovnel %edx, %eax
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; CHECK-NEXT: retq
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%1 = and i8 %b, %a
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%2 = icmp ne i8 %1, 0
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%3 = select i1 %2, i32 %x, i32 0
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ret i32 %3
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}
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define zeroext i1 @and_2(i8 zeroext %a, i8 zeroext %b) {
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; CHECK-LABEL: and_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andb %dil, %sil
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; CHECK-NEXT: setne %al
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; CHECK-NEXT: retq
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%1 = and i8 %b, %a
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%2 = icmp ne i8 %1, 0
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ret i1 %2
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}
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define i32 @xor_1(i8 zeroext %a, i8 zeroext %b, i32 %x) {
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; CHECK-LABEL: xor_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: xorb %dil, %sil
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; CHECK-NEXT: cmovnel %edx, %eax
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; CHECK-NEXT: retq
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%1 = xor i8 %b, %a
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%2 = icmp ne i8 %1, 0
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%3 = select i1 %2, i32 %x, i32 0
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ret i32 %3
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}
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define zeroext i1 @xor_2(i8 zeroext %a, i8 zeroext %b) {
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; CHECK-LABEL: xor_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorb %dil, %sil
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; CHECK-NEXT: setne %al
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; CHECK-NEXT: retq
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%1 = xor i8 %b, %a
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%2 = icmp ne i8 %1, 0
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ret i1 %2
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}
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