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96 lines
3.2 KiB
LLVM
96 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+sse4.2 < %s | FileCheck %s
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; RUN: llc -mtriple=i686-unknown-unknown -mcpu=atom < %s | FileCheck -check-prefix=ATOM %s
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; Scheduler causes produce a different instruction order
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; bitcast a v4i16 to v2i32
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define void @convert(<2 x i32>* %dst, <4 x i16>* %src) nounwind {
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; CHECK-LABEL: convert:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %eax
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; CHECK-NEXT: movl $0, (%esp)
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; CHECK-NEXT: movdqa {{.*#+}} xmm0 = [1,1,1,1]
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; CHECK-NEXT: cmpl $3, (%esp)
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; CHECK-NEXT: jg .LBB0_3
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: .LBB0_2: # %forbody
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movl (%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: pmovzxwd {{.*#+}} xmm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
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; CHECK-NEXT: paddw %xmm0, %xmm2
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; CHECK-NEXT: pshufb %xmm1, %xmm2
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; CHECK-NEXT: movq %xmm2, (%ecx,%eax,8)
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; CHECK-NEXT: incl (%esp)
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; CHECK-NEXT: cmpl $3, (%esp)
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; CHECK-NEXT: jle .LBB0_2
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; CHECK-NEXT: .LBB0_3: # %afterfor
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; CHECK-NEXT: popl %eax
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; CHECK-NEXT: retl
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;
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; ATOM-LABEL: convert:
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; ATOM: # %bb.0: # %entry
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; ATOM-NEXT: pushl %eax
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; ATOM-NEXT: movdqa {{.*#+}} xmm0 = [1,1,1,1]
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; ATOM-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; ATOM-NEXT: movl $0, (%esp)
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; ATOM-NEXT: cmpl $3, (%esp)
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; ATOM-NEXT: jg .LBB0_3
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; ATOM-NEXT: .p2align 4, 0x90
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; ATOM-NEXT: .LBB0_2: # %forbody
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; ATOM-NEXT: # =>This Inner Loop Header: Depth=1
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; ATOM-NEXT: movl (%esp), %eax
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; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; ATOM-NEXT: movq {{.*#+}} xmm2 = mem[0],zero
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; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; ATOM-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
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; ATOM-NEXT: paddw %xmm0, %xmm2
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; ATOM-NEXT: pshufb %xmm1, %xmm2
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; ATOM-NEXT: movq %xmm2, (%ecx,%eax,8)
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; ATOM-NEXT: incl (%esp)
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; ATOM-NEXT: cmpl $3, (%esp)
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; ATOM-NEXT: jle .LBB0_2
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; ATOM-NEXT: .LBB0_3: # %afterfor
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; ATOM-NEXT: popl %eax
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; ATOM-NEXT: retl
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entry:
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%dst.addr = alloca <2 x i32>*
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%src.addr = alloca <4 x i16>*
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%i = alloca i32, align 4
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store <2 x i32>* %dst, <2 x i32>** %dst.addr
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store <4 x i16>* %src, <4 x i16>** %src.addr
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store i32 0, i32* %i
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br label %forcond
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forcond:
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%tmp = load i32, i32* %i
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%cmp = icmp slt i32 %tmp, 4
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br i1 %cmp, label %forbody, label %afterfor
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forbody:
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%tmp1 = load i32, i32* %i
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%tmp2 = load <2 x i32>*, <2 x i32>** %dst.addr
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%arrayidx = getelementptr <2 x i32>, <2 x i32>* %tmp2, i32 %tmp1
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%tmp3 = load i32, i32* %i
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%tmp4 = load <4 x i16>*, <4 x i16>** %src.addr
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%arrayidx5 = getelementptr <4 x i16>, <4 x i16>* %tmp4, i32 %tmp3
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%tmp6 = load <4 x i16>, <4 x i16>* %arrayidx5
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%add = add <4 x i16> %tmp6, < i16 1, i16 1, i16 1, i16 1 >
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%conv = bitcast <4 x i16> %add to <2 x i32>
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store <2 x i32> %conv, <2 x i32>* %arrayidx
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br label %forinc
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forinc:
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%tmp7 = load i32, i32* %i
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%inc = add i32 %tmp7, 1
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store i32 %inc, i32* %i
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br label %forcond
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afterfor:
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ret void
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}
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