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99 lines
2.8 KiB
LLVM
99 lines
2.8 KiB
LLVM
; RUN: llc -mtriple arm-linux-gnueabihf -mattr=+vfp2 -float-abi=hard -global-isel %s -o - | FileCheck %s -check-prefix CHECK -check-prefix HARD
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; RUN: llc -mtriple arm-linux-gnueabi -mattr=+vfp2,+soft-float -float-abi=soft -global-isel %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT-AEABI
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; RUN: llc -mtriple arm-linux-gnu- -mattr=+vfp2,+soft-float -float-abi=soft -global-isel %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT-DEFAULT
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define arm_aapcscc float @test_frem_float(float %x, float %y) {
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; CHECK-LABEL: test_frem_float:
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; CHECK: bl fmodf
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%r = frem float %x, %y
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ret float %r
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}
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define arm_aapcscc double @test_frem_double(double %x, double %y) {
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; CHECK-LABEL: test_frem_double:
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; CHECK: bl fmod
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%r = frem double %x, %y
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ret double %r
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}
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declare float @llvm.pow.f32(float %x, float %y)
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define arm_aapcscc float @test_fpow_float(float %x, float %y) {
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; CHECK-LABEL: test_fpow_float:
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; CHECK: bl powf
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%r = call float @llvm.pow.f32(float %x, float %y)
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ret float %r
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}
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declare double @llvm.pow.f64(double %x, double %y)
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define arm_aapcscc double @test_fpow_double(double %x, double %y) {
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; CHECK-LABEL: test_fpow_double:
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; CHECK: bl pow
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%r = call double @llvm.pow.f64(double %x, double %y)
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ret double %r
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}
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define arm_aapcscc float @test_add_float(float %x, float %y) {
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; CHECK-LABEL: test_add_float:
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; HARD: vadd.f32
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; SOFT-AEABI: bl __aeabi_fadd
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; SOFT-DEFAULT: bl __addsf3
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%r = fadd float %x, %y
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ret float %r
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}
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define arm_aapcscc double @test_add_double(double %x, double %y) {
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; CHECK-LABEL: test_add_double:
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; HARD: vadd.f64
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; SOFT-AEABI: bl __aeabi_dadd
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; SOFT-DEFAULT: bl __adddf3
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%r = fadd double %x, %y
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ret double %r
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}
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define arm_aapcscc float @test_sub_float(float %x, float %y) {
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; CHECK-LABEL: test_sub_float:
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; HARD: vsub.f32
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; SOFT-AEABI: bl __aeabi_fsub
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; SOFT-DEFAULT: bl __subsf3
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%r = fsub float %x, %y
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ret float %r
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}
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define arm_aapcscc double @test_sub_double(double %x, double %y) {
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; CHECK-LABEL: test_sub_double:
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; HARD: vsub.f64
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; SOFT-AEABI: bl __aeabi_dsub
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; SOFT-DEFAULT: bl __subdf3
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%r = fsub double %x, %y
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ret double %r
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}
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define arm_aapcs_vfpcc i32 @test_cmp_float_ogt(float %x, float %y) {
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; CHECK-LABEL: test_cmp_float_ogt
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; HARD: vcmp.f32
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; HARD: vmrs APSR_nzcv, fpscr
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; HARD-NEXT: movgt
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; SOFT-AEABI: bl __aeabi_fcmpgt
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; SOFT-DEFAULT: bl __gtsf2
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entry:
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%v = fcmp ogt float %x, %y
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%r = zext i1 %v to i32
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ret i32 %r
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}
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define arm_aapcs_vfpcc i32 @test_cmp_float_one(float %x, float %y) {
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; CHECK-LABEL: test_cmp_float_one
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; HARD: vcmp.f32
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; HARD: vmrs APSR_nzcv, fpscr
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; HARD: movgt
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; HARD-NOT: vcmp
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; HARD: movmi
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; SOFT-AEABI-DAG: bl __aeabi_fcmpgt
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; SOFT-AEABI-DAG: bl __aeabi_fcmplt
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; SOFT-DEFAULT-DAG: bl __gtsf2
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; SOFT-DEFAULT-DAG: bl __ltsf2
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entry:
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%v = fcmp one float %x, %y
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%r = zext i1 %v to i32
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ret i32 %r
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}
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