468663ddbb
Former-commit-id: 1d6753294b2993e1fbf92de9366bb9544db4189b
117 lines
3.3 KiB
YAML
117 lines
3.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s
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---
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name: insert_gprx
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: %x0
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; CHECK-LABEL: name: insert_gprx
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY %w0
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; CHECK: [[DEF:%[0-9]+]]:gpr64 = IMPLICIT_DEF
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; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY]], %subreg.sub_32
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; CHECK: [[BFMXri:%[0-9]+]]:gpr64 = BFMXri [[DEF]], [[SUBREG_TO_REG]], 0, 31
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; CHECK: [[SUBREG_TO_REG1:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY]], %subreg.sub_32
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; CHECK: [[BFMXri1:%[0-9]+]]:gpr64 = BFMXri [[DEF]], [[SUBREG_TO_REG1]], 51, 31
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; CHECK: %x0 = COPY [[BFMXri]]
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; CHECK: %x1 = COPY [[BFMXri1]]
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%0:gpr(s32) = COPY %w0
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%1:gpr(s64) = G_IMPLICIT_DEF
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%2:gpr(s64) = G_INSERT %1, %0, 0
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%3:gpr(s64) = G_INSERT %1, %0, 13
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%x0 = COPY %2
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%x1 = COPY %3
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...
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---
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name: insert_gprw
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: %w0, %w1
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; CHECK-LABEL: name: insert_gprw
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY %w0
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
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; CHECK: [[COPY2:%[0-9]+]]:gpr32 = COPY [[COPY]]
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; CHECK: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
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; CHECK: [[BFMWri:%[0-9]+]]:gpr32 = BFMWri [[DEF]], [[COPY1]], 0, 15
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; CHECK: [[BFMWri1:%[0-9]+]]:gpr32 = BFMWri [[BFMWri]], [[COPY2]], 16, 15
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; CHECK: [[COPY3:%[0-9]+]]:gpr32all = COPY [[BFMWri1]]
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; CHECK: %w0 = COPY [[COPY3]]
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%1:gpr(s32) = COPY %w0
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%2:gpr(s32) = COPY %w1
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%3:gpr(s16) = G_TRUNC %1(s32)
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%4:gpr(s16) = G_TRUNC %1(s32)
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%5:gpr(s32) = G_IMPLICIT_DEF
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%6:gpr(s32) = G_INSERT %5, %3(s16), 0
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%7:gpr(s32) = G_INSERT %6, %4(s16), 16
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%0:gpr(s32) = COPY %7(s32)
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%w0 = COPY %0
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...
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---
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name: extract_gprs
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: %x0
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; CHECK-LABEL: name: extract_gprs
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY %x0
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; CHECK: [[UBFMXri:%[0-9]+]]:gpr64 = UBFMXri [[COPY]], 0, 31
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[UBFMXri]].sub_32
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; CHECK: [[UBFMXri1:%[0-9]+]]:gpr64 = UBFMXri [[COPY]], 13, 44
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; CHECK: [[COPY2:%[0-9]+]]:gpr32 = COPY [[UBFMXri1]].sub_32
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; CHECK: %w0 = COPY [[COPY1]]
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; CHECK: %w1 = COPY [[COPY2]]
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%0:gpr(s64) = COPY %x0
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%1:gpr(s32) = G_EXTRACT %0, 0
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%2:gpr(s32) = G_EXTRACT %0, 13
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%w0 = COPY %1
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%w1 = COPY %2
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...
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---
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name: extract_gprw
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: %w0
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; CHECK-LABEL: name: extract_gprw
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY %w0
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; CHECK: [[UBFMWri:%[0-9]+]]:gpr32 = UBFMWri [[COPY]], 0, 15
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; CHECK: [[UBFMWri1:%[0-9]+]]:gpr32 = UBFMWri [[COPY]], 15, 30
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; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY [[UBFMWri]]
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; CHECK: [[COPY2:%[0-9]+]]:fpr16 = COPY [[COPY1]].hsub
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; CHECK: %h0 = COPY [[COPY2]]
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; CHECK: [[COPY3:%[0-9]+]]:fpr32 = COPY [[UBFMWri1]]
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; CHECK: [[COPY4:%[0-9]+]]:fpr16 = COPY [[COPY3]].hsub
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; CHECK: %h1 = COPY [[COPY4]]
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%0:gpr(s32) = COPY %w0
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%1:gpr(s16) = G_EXTRACT %0, 0
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%2:gpr(s16) = G_EXTRACT %0, 15
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%h0 = COPY %1
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%h1 = COPY %2
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...
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